reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/AggressiveAntiDepBreaker.cpp

  601     bool IsSub = TRI->isSubRegister(SuperReg, Reg);
  936             if (R == AntiDepReg || TRI->isSubRegister(AntiDepReg, R))

lib/CodeGen/LiveVariables.cpp

  219     if (TRI->isSubRegister(Reg, DefReg)) {

lib/CodeGen/MachineCopyPropagation.cpp

  271   if (!TRI->isSubRegister(PreviousSrc, Src))

lib/CodeGen/MachineInstr.cpp

 1009         Found = TRI->isSubRegister(MOReg, Reg);
 1822       if (RegInfo->isSubRegister(IncomingReg, Reg))
 1887       if (RegInfo->isSubRegister(Reg, MOReg))

lib/MC/MCInstrDesc.cpp

   48       if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs)))

lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

 1513       if (DestReg == BaseReg || TRI->isSubRegister(BaseReg, DestReg))
 1567       if (DestReg == BaseReg || TRI->isSubRegister(BaseReg, DestReg))

lib/Target/AMDGPU/SIISelLowering.cpp

10685   assert(!TRI->isSubRegister(Info->getScratchRSrcReg(),

lib/Target/AMDGPU/SIInstrInfo.cpp

 3184     return TRI.isSubRegister(SuperVec.getReg(), SubReg.getReg());

lib/Target/AMDGPU/SIRegisterInfo.cpp

  230     assert(!isSubRegister(ScratchRSrcReg, ScratchWaveOffsetReg));
  240     assert(!isSubRegister(ScratchRSrcReg, StackPtrReg));
  246     assert(!isSubRegister(ScratchRSrcReg, FrameReg));

lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp

  582       unsigned BadR = RI.isSubRegister(Hexagon::USR, R) ? UsrR : R;
  595         unsigned BadR = RI.isSubRegister(Hexagon::USR, R) ? UsrR : R;