reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Overridden By

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

  539   unsigned getReg() const override {

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

  694   unsigned getReg() const override {

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

  898   unsigned getReg() const override {

lib/Target/AVR/AsmParser/AVRAsmParser.cpp

  190   unsigned getReg() const {

lib/Target/BPF/AsmParser/BPFAsmParser.cpp

  146   unsigned getReg() const override {

lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp

  250   unsigned getReg() const override {

lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp

  154   unsigned getReg() const override {

lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp

  183   unsigned getReg() const {

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 1411   unsigned getReg() const override {

lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

  281   unsigned getReg() const override {

lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

  596   unsigned getReg() const override {

lib/Target/Sparc/AsmParser/SparcAsmParser.cpp

  285   unsigned getReg() const override {

lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp

  225   unsigned getReg() const override {

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

   98   unsigned getReg() const override {

lib/Target/X86/AsmParser/X86Operand.h

  158   unsigned getReg() const override {

References

include/llvm/MC/MCParser/MCTargetAsmParser.h

  464     return Op1.getReg() == Op2.getReg();
  464     return Op1.getReg() == Op2.getReg();

lib/MC/MCParser/AsmParser.cpp

 5821           !getTargetParser().OmitRegisterFromClobberLists(Operand.getReg())) {
 5825           ClobberRegs.push_back(Operand.getReg());

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

 3680             Operands[1]->getReg());
 3728     return getXRegFromWReg(Op1.getReg()) == Op2.getReg();
 3728     return getXRegFromWReg(Op1.getReg()) == Op2.getReg();
 3730     return getWRegFromXReg(Op1.getReg()) == Op2.getReg();
 3730     return getWRegFromXReg(Op1.getReg()) == Op2.getReg();
 3732     return getXRegFromWReg(Op2.getReg()) == Op1.getReg();
 3732     return getXRegFromWReg(Op2.getReg()) == Op1.getReg();
 3734     return getWRegFromXReg(Op2.getReg()) == Op1.getReg();
 3734     return getWRegFromXReg(Op2.getReg()) == Op1.getReg();

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

 6660              (*Operand).getReg()) ||
 6662               (*Operand).getReg())))) {
 6675              Operand->getReg()))))
 7902     if (Operands[3]->getReg() == Operands[4]->getReg()) {
 7902     if (Operands[3]->getReg() == Operands[4]->getReg()) {
 7906     if (Operands[3]->getReg() == Operands[5]->getReg()) {
 7906     if (Operands[3]->getReg() == Operands[5]->getReg()) {
 7913     if (Operands[4]->getReg() != Operands[6]->getReg())
 7913     if (Operands[4]->getReg() != Operands[6]->getReg())
 7921     if (Operands[2]->getReg() != Operands[4]->getReg())
 7921     if (Operands[2]->getReg() != Operands[4]->getReg())

lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp

 1134          Operands[PossibleBaseIdx]->getReg() ==
 1135              Operands[PossibleDestIdx]->getReg();