reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/MIRParser/MIParser.cpp

 1106     for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)

lib/CodeGen/MachineInstr.cpp

  104     for (const MCPhysReg *ImpDefs = MCID->getImplicitDefs(); *ImpDefs;

lib/CodeGen/SelectionDAG/InstrEmitter.cpp

  831   bool HasPhysRegOuts = NumResults > NumDefs && II.getImplicitDefs()!=nullptr;
  934       Register Reg = II.getImplicitDefs()[i - NumDefs];
  969   if (!UsedRegs.empty() || II.getImplicitDefs() || II.hasOptionalDef())

lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp

  435     for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) {
  514     for (const MCPhysReg *Reg = MCID.getImplicitDefs(); *Reg; ++Reg) {

lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

 1286     for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) {
 1427     for (const MCPhysReg *Reg = MCID.getImplicitDefs(); *Reg; ++Reg)
 2842     = TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs();
 2878   const MCPhysReg *ImpDefs = TII->get(N->getMachineOpcode()).getImplicitDefs();
 2885       TII->get(SUNode->getMachineOpcode()).getImplicitDefs();

lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

  463           TII->get(N->getMachineOpcode()).getImplicitDefs()) {

lib/MC/MCParser/AsmParser.cpp

 5855     ArrayRef<MCPhysReg> ImpDefs(Desc.getImplicitDefs(),

lib/MCA/InstrBuilder.cpp

  343     Write.RegisterID = MCDesc.getImplicitDefs()[CurrentDef];

lib/Target/ARM/Thumb2SizeReduction.cpp

  255   for (const MCPhysReg *Regs = MCID.getImplicitDefs(); *Regs; ++Regs)

lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp

   99   if (const MCPhysReg *ImpDef = MCID.getImplicitDefs())

lib/Target/Hexagon/RDFGraph.cpp

  628   if (!D.getImplicitDefs() && !D.getImplicitUses())
  637   const MCPhysReg *ImpR = Op.isDef() ? D.getImplicitDefs()

lib/Target/PowerPC/PPCInstrInfo.cpp

 1980       for (const MCPhysReg *ImpDefs = NewDesc.getImplicitDefs();

lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp

  459     const MCPhysReg Reg = Desc.getImplicitDefs()[I];

tools/llvm-exegesis/lib/MCInstrDescView.cpp

  115   for (const MCPhysReg *MCPhysReg = Description->getImplicitDefs();

unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp

   78   EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[0], X86::AX);
   79   EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[1], X86::EFLAGS);
  104   EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[0], X86::EFLAGS);