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reference to multiple definitions → definitions
unreferenced

References

lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
  223     Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
  247   Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
  277   Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
  306   Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
  328   Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
  356       0, MO.getExpr(), MCFixupKind(AArch64::fixup_aarch64_movw), MI.getLoc()));
  376   Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
  400   Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
 1730           const_cast<AMDGPUAsmParser *>(AsmParser)->Warning(Inst.getLoc(),
lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
  189     Fixups.push_back(MCFixup::create(offset, MO.getExpr(), FK_SecRel_4, MI.getLoc()));
lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
  355     Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
  480       MCFixup::create(Offset, MO.getExpr(), Kind, MI.getLoc()));
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
  324       Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
  343       Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
  637   Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
 1003       Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
 1131     Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
 1237     Fixups.push_back(MCFixup::create(0, E, Kind, MI.getLoc()));
 1358     Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
 1440     Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
 1480     Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
 1916     Fixups.push_back(llvm::MCFixup::create(0, DiffExpr, Kind, MI.getLoc()));
lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
   99                      MCFixupKind(Fixup), MI.getLoc()));
  161                      MCFixupKind(AVR::fixup_6), MI.getLoc()));
  195     Fixups.push_back(MCFixup::create(Offset, MO.getExpr(), FixupKind, MI.getLoc()));
  211     Fixups.push_back(MCFixup::create(0, MO.getExpr(), FixupKind, MI.getLoc()));
lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
  542         Warning(MCI.getLoc(), "Signed/Unsigned mismatch");
lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
  289           HasSoloAXInst->getLoc(),
  292       reportError(I.getLoc(),
  304       reportNote(I.getLoc(), "Branching instruction");
  315       reportError(MCB.getLoc(),
  337         reportError(I.getLoc(),
  343         reportError(I.getLoc(),
  349         reportError(I.getLoc(),
  420       reportError(I.getLoc(), "New value register consumer has no producer");
  429             std::get<0>(Producer)->getLoc(),
  431         reportError(I.getLoc(),
  437         reportNote(std::get<0>(Producer)->getLoc(),
  440         reportError(I.getLoc(),
  448           std::get<0>(Producer)->getLoc(),
  450       reportError(I.getLoc(),
  458       reportNote(std::get<0>(Producer)->getLoc(),
  460       reportError(I.getLoc(),
  474         reportNote(std::get<0>(Producer)->getLoc(),
  477         reportError(I.getLoc(),
  483       reportNote(std::get<0>(Producer)->getLoc(),
  485       reportError(I.getLoc(),
  502         reportError(Inst.getLoc(), "Cannot write to read-only register `" +
  654         reportError(I.getLoc(), "Instruction is marked `isSolo' and "
  712   reportError(MCB.getLoc(), Msg);
  730     Context.reportWarning(MCB.getLoc(), Msg);
lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
  712                                   MCFixupKind(FixupKind), MI.getLoc());
lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
   96   XMCI->setLoc(MCI.getLoc());
lib/Target/Hexagon/MCTargetDesc/HexagonMCShuffler.cpp
   51   Loc = MCB.getLoc();
   75   Loc = MCB.getLoc();
lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
  232       RestrictLoc = Inst.getLoc();
  245               Inst.getLoc(),
  263       RestrictLoc = Inst.getLoc();
  275               Inst.getLoc(),
lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
  115       static_cast<MCFixupKind>(MSP430::fixup_16_byte), MI.getLoc()));
  147     static_cast<MCFixupKind>(FixupKind), MI.getLoc()));
  161     static_cast<MCFixupKind>(MSP430::fixup_10_pcrel), MI.getLoc()));
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
 4092                         false, Inst.getLoc(), Out, STI))
 4456       unsigned ATReg = getATReg(Inst.getLoc());
 4504     unsigned ATReg = getATReg(Inst.getLoc());
 4541     ATReg = getATReg(Inst.getLoc());
 4549                      Inst.getLoc(), Out, STI)) {
 4641       TmpReg = getATReg(Inst.getLoc());
 4647       TOut.emitRRR(Mips::SUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI);
 4648       TOut.emitRRR(Mips::ROTRV, DReg, SReg, TmpReg, Inst.getLoc(), STI);
 4653       TOut.emitRRR(Mips::ROTRV, DReg, SReg, TReg, Inst.getLoc(), STI);
 4674     ATReg = getATReg(Inst.getLoc());
 4678     TOut.emitRRR(Mips::SUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), STI);
 4679     TOut.emitRRR(FirstShift, ATReg, SReg, ATReg, Inst.getLoc(), STI);
 4680     TOut.emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), STI);
 4681     TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);
 4707       TOut.emitRRI(Mips::ROTR, DReg, SReg, ShiftValue, Inst.getLoc(), STI);
 4712       TOut.emitRRI(Mips::ROTR, DReg, SReg, ImmValue, Inst.getLoc(), STI);
 4721       TOut.emitRRI(Mips::SRL, DReg, SReg, 0, Inst.getLoc(), STI);
 4738     ATReg = getATReg(Inst.getLoc());
 4742     TOut.emitRRI(FirstShift, ATReg, SReg, ImmValue, Inst.getLoc(), STI);
 4743     TOut.emitRRI(SecondShift, DReg, SReg, 32 - ImmValue, Inst.getLoc(), STI);
 4744     TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);
 4766       TmpReg = getATReg(Inst.getLoc());
 4772       TOut.emitRRR(Mips::DSUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI);
 4773       TOut.emitRRR(Mips::DROTRV, DReg, SReg, TmpReg, Inst.getLoc(), STI);
 4778       TOut.emitRRR(Mips::DROTRV, DReg, SReg, TReg, Inst.getLoc(), STI);
 4799     ATReg = getATReg(Inst.getLoc());
 4803     TOut.emitRRR(Mips::DSUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), STI);
 4804     TOut.emitRRR(FirstShift, ATReg, SReg, ATReg, Inst.getLoc(), STI);
 4805     TOut.emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), STI);
 4806     TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);
 4850     TOut.emitRRI(FinalOpcode, DReg, SReg, ShiftValue, Inst.getLoc(), STI);
 4857       TOut.emitRRI(Mips::DSRL, DReg, SReg, 0, Inst.getLoc(), STI);
 4894     ATReg = getATReg(Inst.getLoc());
 4898     TOut.emitRRI(FirstShift, ATReg, SReg, ImmValue % 32, Inst.getLoc(), STI);
 4900                  Inst.getLoc(), STI);
 4901     TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);
 4956   ATReg = getATReg(Inst.getLoc());
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
 1590   CInst.setLoc(Inst.getLoc());
lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
  158       0, Expr, MCFixupKind(RISCV::fixup_riscv_tprel_add), MI.getLoc()));
  164         0, Dummy, MCFixupKind(RISCV::fixup_riscv_relax), MI.getLoc()));
  354       MCFixup::create(0, Expr, MCFixupKind(FixupKind), MI.getLoc()));
  364                     MI.getLoc()));
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
  165                                        FixupKind, MI.getLoc()));
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
  435     EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind),
  487         EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups);
  498     EmitImmediate(Disp, MI.getLoc(), 2, FK_Data_2, CurByte, OS, Fixups);
  519       EmitImmediate(Disp, MI.getLoc(), 4, FK_Data_4, CurByte, OS, Fixups);
  539           Fixups.push_back(MCFixup::create(0, Sym, FK_NONE, MI.getLoc()));
  550         EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups);
  558         EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups,
  569     EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind), CurByte, OS,
  635     EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups, ImmOffset);
  637     EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(X86::reloc_signed_4byte),
 1355     EmitImmediate(Op, MI.getLoc(), X86II::getSizeOfImm(TSFlags),
 1364     EmitImmediate(MI.getOperand(CurOp++), MI.getLoc(),
 1371     EmitImmediate(MI.getOperand(CurOp++), MI.getLoc(),
 1374     EmitImmediate(MI.getOperand(CurOp++), MI.getLoc(), 1, FK_Data_1, CurByte,
 1379     EmitImmediate(MI.getOperand(CurOp++), MI.getLoc(),
 1382     EmitImmediate(MI.getOperand(CurOp++), MI.getLoc(), 2, FK_Data_2, CurByte,
 1623     EmitImmediate(MCOperand::createImm(I8RegNum), MI.getLoc(), 1, FK_Data_1,
 1630       EmitImmediate(MI.getOperand(CurOp++), MI.getLoc(),
tools/llvm-mca/CodeRegion.cpp
  110   SMLoc Loc = Instruction.getLoc();