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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/MC/MCAsmBackend.h 28 struct MCFixupKindInfo;
lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h 28 struct MCFixupKindInfo;
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h 24 struct MCFixupKindInfo;
References
include/llvm/MC/MCAsmBackend.h 81 virtual const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const;
lib/MC/ELFObjectWriter.cpp 1449 MCFixupKindInfo::FKF_IsPCRel;
lib/MC/MCAsmBackend.cpp 69 const MCFixupKindInfo &MCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
70 static const MCFixupKindInfo Builtins[] = {
77 {"FK_PCRel_1", 0, 8, MCFixupKindInfo::FKF_IsPCRel},
78 {"FK_PCRel_2", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
79 {"FK_PCRel_4", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
80 {"FK_PCRel_8", 0, 64, MCFixupKindInfo::FKF_IsPCRel},
lib/MC/MCAsmStreamer.cpp 1861 const MCFixupKindInfo &Info =
1922 const MCFixupKindInfo &Info =
lib/MC/MCAssembler.cpp 229 MCFixupKindInfo::FKF_IsPCRel;
265 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits;
lib/MC/MachObjectWriter.cpp 75 const MCFixupKindInfo &FKI = Asm.getBackend().getFixupKindInfo(
78 return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp 35 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits | MCFixupKindInfo::FKF_IsPCRel;
35 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits | MCFixupKindInfo::FKF_IsPCRel;
49 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
50 const static MCFixupKindInfo Infos[AArch64::NumTargetFixupKinds] = {
376 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp 53 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp 51 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
142 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
157 const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(
159 const static MCFixupKindInfo Infos[AMDGPU::NumTargetFixupKinds] = {
161 { "fixup_si_sopp_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp 57 const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
58 const static MCFixupKindInfo InfosLE[ARM::NumTargetFixupKinds] = {
63 {"fixup_arm_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
65 MCFixupKindInfo::FKF_IsPCRel |
66 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
67 {"fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
68 {"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
70 MCFixupKindInfo::FKF_IsPCRel |
71 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
72 {"fixup_arm_pcrel_9", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
74 MCFixupKindInfo::FKF_IsPCRel |
75 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
77 MCFixupKindInfo::FKF_IsPCRel |
78 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
79 {"fixup_arm_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
81 MCFixupKindInfo::FKF_IsPCRel |
82 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
83 {"fixup_arm_condbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
84 {"fixup_arm_uncondbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
85 {"fixup_t2_condbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
86 {"fixup_t2_uncondbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
87 {"fixup_arm_thumb_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
88 {"fixup_arm_uncondbl", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
89 {"fixup_arm_condbl", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
90 {"fixup_arm_blx", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
91 {"fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
93 MCFixupKindInfo::FKF_IsPCRel |
94 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
95 {"fixup_arm_thumb_cb", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
97 MCFixupKindInfo::FKF_IsPCRel |
98 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
99 {"fixup_arm_thumb_bcc", 0, 8, MCFixupKindInfo::FKF_IsPCRel},
108 {"fixup_bf_branch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
109 {"fixup_bf_target", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
110 {"fixup_bfl_target", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
111 {"fixup_bfc_target", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
113 {"fixup_wls", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
114 {"fixup_le", 0, 32, MCFixupKindInfo::FKF_IsPCRel}
116 const static MCFixupKindInfo InfosBE[ARM::NumTargetFixupKinds] = {
121 {"fixup_arm_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
123 MCFixupKindInfo::FKF_IsPCRel |
124 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
125 {"fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
126 {"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
128 MCFixupKindInfo::FKF_IsPCRel |
129 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
130 {"fixup_arm_pcrel_9", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
132 MCFixupKindInfo::FKF_IsPCRel |
133 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
135 MCFixupKindInfo::FKF_IsPCRel |
136 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
137 {"fixup_arm_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
139 MCFixupKindInfo::FKF_IsPCRel |
140 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
141 {"fixup_arm_condbranch", 8, 24, MCFixupKindInfo::FKF_IsPCRel},
142 {"fixup_arm_uncondbranch", 8, 24, MCFixupKindInfo::FKF_IsPCRel},
143 {"fixup_t2_condbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
144 {"fixup_t2_uncondbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
145 {"fixup_arm_thumb_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
146 {"fixup_arm_uncondbl", 8, 24, MCFixupKindInfo::FKF_IsPCRel},
147 {"fixup_arm_condbl", 8, 24, MCFixupKindInfo::FKF_IsPCRel},
148 {"fixup_arm_blx", 8, 24, MCFixupKindInfo::FKF_IsPCRel},
149 {"fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
151 MCFixupKindInfo::FKF_IsPCRel |
152 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
153 {"fixup_arm_thumb_cb", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
155 MCFixupKindInfo::FKF_IsPCRel |
156 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
157 {"fixup_arm_thumb_bcc", 8, 8, MCFixupKindInfo::FKF_IsPCRel},
166 {"fixup_bf_branch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
167 {"fixup_bf_target", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
168 {"fixup_bfl_target", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
169 {"fixup_bfc_target", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
171 {"fixup_wls", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
172 {"fixup_le", 0, 32, MCFixupKindInfo::FKF_IsPCRel}
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h 42 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp 58 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp 368 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
388 MCFixupKindInfo const &AVRAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
391 const static MCFixupKindInfo Infos[AVR::NumTargetFixupKinds] = {
398 {"fixup_7_pcrel", 3, 7, MCFixupKindInfo::FKF_IsPCRel},
399 {"fixup_13_pcrel", 0, 12, MCFixupKindInfo::FKF_IsPCRel},
lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h 47 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp 88 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
89 const static MCFixupKindInfo Infos[Hexagon::NumTargetFixupKinds] = {
94 { "fixup_Hexagon_B22_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
95 { "fixup_Hexagon_B15_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
96 { "fixup_Hexagon_B7_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
107 { "fixup_Hexagon_B13_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
108 { "fixup_Hexagon_B9_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
109 { "fixup_Hexagon_B32_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
111 { "fixup_Hexagon_B22_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
112 { "fixup_Hexagon_B15_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
113 { "fixup_Hexagon_B13_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
114 { "fixup_Hexagon_B9_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
115 { "fixup_Hexagon_B7_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
124 { "fixup_Hexagon_32_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
129 { "fixup_Hexagon_PLT_B22_PCREL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
142 { "fixup_Hexagon_GD_PLT_B22_PCREL",0, 32, MCFixupKindInfo::FKF_IsPCRel },
143 { "fixup_Hexagon_LD_PLT_B22_PCREL",0, 32, MCFixupKindInfo::FKF_IsPCRel },
164 { "fixup_Hexagon_6_PCREL_X", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
188 { "fixup_Hexagon_GD_PLT_B22_PCREL_X",0, 32, MCFixupKindInfo::FKF_IsPCRel },
189 { "fixup_Hexagon_GD_PLT_B32_PCREL_X",0, 32, MCFixupKindInfo::FKF_IsPCRel },
190 { "fixup_Hexagon_LD_PLT_B22_PCREL_X",0, 32, MCFixupKindInfo::FKF_IsPCRel },
191 { "fixup_Hexagon_LD_PLT_B32_PCREL_X",0, 32, MCFixupKindInfo::FKF_IsPCRel }
lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp 66 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
137 const MCFixupKindInfo &
139 static const MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds] = {
lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp 68 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
69 const static MCFixupKindInfo Infos[MSP430::NumTargetFixupKinds] = {
74 {"fixup_10_pcrel", 0, 10, MCFixupKindInfo::FKF_IsPCRel},
76 {"fixup_16_pcrel", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
78 {"fixup_16_pcrel_byte", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
79 {"fixup_2x_pcrel", 0, 10, MCFixupKindInfo::FKF_IsPCRel},
80 {"fixup_rl_pcrel", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
139 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp 345 const MCFixupKindInfo &MipsAsmBackend::
347 const static MCFixupKindInfo LittleEndianInfos[] = {
361 { "fixup_Mips_PC16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
374 { "fixup_Mips_Branch_PCRel", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
390 { "fixup_Mips_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
391 { "fixup_MIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
392 { "fixup_MIPS_PC21_S2", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
393 { "fixup_MIPS_PC26_S2", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
394 { "fixup_MIPS_PCHI16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
395 { "fixup_MIPS_PCLO16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
400 { "fixup_MICROMIPS_PC7_S1", 0, 7, MCFixupKindInfo::FKF_IsPCRel },
401 { "fixup_MICROMIPS_PC10_S1", 0, 10, MCFixupKindInfo::FKF_IsPCRel },
402 { "fixup_MICROMIPS_PC16_S1", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
403 { "fixup_MICROMIPS_PC26_S1", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
404 { "fixup_MICROMIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
405 { "fixup_MICROMIPS_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
406 { "fixup_MICROMIPS_PC21_S1", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
426 const static MCFixupKindInfo BigEndianInfos[] = {
440 { "fixup_Mips_PC16", 16, 16, MCFixupKindInfo::FKF_IsPCRel },
453 { "fixup_Mips_Branch_PCRel",16, 16, MCFixupKindInfo::FKF_IsPCRel },
469 { "fixup_Mips_PC18_S3", 14, 18, MCFixupKindInfo::FKF_IsPCRel },
470 { "fixup_MIPS_PC19_S2", 13, 19, MCFixupKindInfo::FKF_IsPCRel },
471 { "fixup_MIPS_PC21_S2", 11, 21, MCFixupKindInfo::FKF_IsPCRel },
472 { "fixup_MIPS_PC26_S2", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
473 { "fixup_MIPS_PCHI16", 16, 16, MCFixupKindInfo::FKF_IsPCRel },
474 { "fixup_MIPS_PCLO16", 16, 16, MCFixupKindInfo::FKF_IsPCRel },
479 { "fixup_MICROMIPS_PC7_S1", 9, 7, MCFixupKindInfo::FKF_IsPCRel },
480 { "fixup_MICROMIPS_PC10_S1", 6, 10, MCFixupKindInfo::FKF_IsPCRel },
481 { "fixup_MICROMIPS_PC16_S1",16, 16, MCFixupKindInfo::FKF_IsPCRel },
482 { "fixup_MICROMIPS_PC26_S1", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
483 { "fixup_MICROMIPS_PC19_S2",13, 19, MCFixupKindInfo::FKF_IsPCRel },
484 { "fixup_MICROMIPS_PC18_S3",14, 18, MCFixupKindInfo::FKF_IsPCRel },
485 { "fixup_MICROMIPS_PC21_S1",11, 21, MCFixupKindInfo::FKF_IsPCRel },
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h 49 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp 90 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
91 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
93 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
94 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
101 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
103 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel },
104 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel },
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp 289 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h 95 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
96 const static MCFixupKindInfo Infos[] = {
104 { "fixup_riscv_pcrel_hi20", 12, 20, MCFixupKindInfo::FKF_IsPCRel },
105 { "fixup_riscv_pcrel_lo12_i", 20, 12, MCFixupKindInfo::FKF_IsPCRel },
106 { "fixup_riscv_pcrel_lo12_s", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
107 { "fixup_riscv_got_hi20", 12, 20, MCFixupKindInfo::FKF_IsPCRel },
112 { "fixup_riscv_tls_got_hi20", 12, 20, MCFixupKindInfo::FKF_IsPCRel },
113 { "fixup_riscv_tls_gd_hi20", 12, 20, MCFixupKindInfo::FKF_IsPCRel },
114 { "fixup_riscv_jal", 12, 20, MCFixupKindInfo::FKF_IsPCRel },
115 { "fixup_riscv_branch", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
116 { "fixup_riscv_rvc_jump", 2, 11, MCFixupKindInfo::FKF_IsPCRel },
117 { "fixup_riscv_rvc_branch", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
118 { "fixup_riscv_call", 0, 64, MCFixupKindInfo::FKF_IsPCRel },
119 { "fixup_riscv_call_plt", 0, 64, MCFixupKindInfo::FKF_IsPCRel },
lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp 132 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
133 const static MCFixupKindInfo InfosBE[Sparc::NumTargetFixupKinds] = {
135 { "fixup_sparc_call30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
136 { "fixup_sparc_br22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
137 { "fixup_sparc_br19", 13, 19, MCFixupKindInfo::FKF_IsPCRel },
138 { "fixup_sparc_br16_2", 10, 2, MCFixupKindInfo::FKF_IsPCRel },
139 { "fixup_sparc_br16_14", 18, 14, MCFixupKindInfo::FKF_IsPCRel },
148 { "fixup_sparc_pc22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
149 { "fixup_sparc_pc10", 22, 10, MCFixupKindInfo::FKF_IsPCRel },
153 { "fixup_sparc_wplt30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
174 const static MCFixupKindInfo InfosLE[Sparc::NumTargetFixupKinds] = {
176 { "fixup_sparc_call30", 0, 30, MCFixupKindInfo::FKF_IsPCRel },
177 { "fixup_sparc_br22", 0, 22, MCFixupKindInfo::FKF_IsPCRel },
178 { "fixup_sparc_br19", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
179 { "fixup_sparc_br16_2", 20, 2, MCFixupKindInfo::FKF_IsPCRel },
180 { "fixup_sparc_br16_14", 0, 14, MCFixupKindInfo::FKF_IsPCRel },
189 { "fixup_sparc_pc22", 0, 22, MCFixupKindInfo::FKF_IsPCRel },
190 { "fixup_sparc_pc10", 0, 10, MCFixupKindInfo::FKF_IsPCRel },
194 { "fixup_sparc_wplt30", 0, 30, MCFixupKindInfo::FKF_IsPCRel },
lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp 52 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
78 const MCFixupKindInfo &
80 const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = {
81 { "FK_390_PC12DBL", 4, 12, MCFixupKindInfo::FKF_IsPCRel },
82 { "FK_390_PC16DBL", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
83 { "FK_390_PC24DBL", 0, 24, MCFixupKindInfo::FKF_IsPCRel },
84 { "FK_390_PC32DBL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp 45 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
73 const MCFixupKindInfo &
75 const static MCFixupKindInfo Infos[WebAssembly::NumTargetFixupKinds] = {
107 const MCFixupKindInfo &Info = getFixupKindInfo(Fixup.getKind());
lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 84 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
85 const static MCFixupKindInfo Infos[X86::NumTargetFixupKinds] = {
86 {"reloc_riprel_4byte", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
87 {"reloc_riprel_4byte_movq_load", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
88 {"reloc_riprel_4byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
89 {"reloc_riprel_4byte_relax_rex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
94 {"reloc_branch_4byte_pcrel", 0, 32, MCFixupKindInfo::FKF_IsPCRel},