|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
include/llvm/DebugInfo/CodeView/CodeView.h 526 CPURegister(CPUType Cpu, codeview::RegisterId Reg) {
531 RegisterId Reg;
543 RegisterId decodeFramePtrReg(EncodedFramePtrReg EncodedReg, CPUType CPU);
545 EncodedFramePtrReg encodeFramePtrReg(RegisterId Reg, CPUType CPU);
include/llvm/DebugInfo/CodeView/CodeViewRecordIO.h 113 template <typename T> Error mapEnum(T &Value, const Twine &Comment = "") {
117 using U = typename std::underlying_type<T>::type;
include/llvm/DebugInfo/CodeView/SymbolRecord.h 379 RegisterId Register;
777 RegisterId getLocalFramePtrReg(CPUType CPU) const {
783 RegisterId getParamFramePtrReg(CPUType CPU) const {
907 RegisterId Register;
include/llvm/DebugInfo/PDB/IPDBRawSymbol.h 113 virtual codeview::RegisterId getLocalBasePointerRegisterId() const = 0;
128 virtual codeview::RegisterId getRegisterId() const = 0;
include/llvm/DebugInfo/PDB/Native/NativeRawSymbol.h 88 codeview::RegisterId getLocalBasePointerRegisterId() const override;
103 codeview::RegisterId getRegisterId() const override;
include/llvm/Support/YAMLTraits.h 313 using Signature_enumeration = void (*)(class IO&, T&);
322 (sizeof(test<ScalarEnumerationTraits<T>>(nullptr)) == 1);
329 using Signature_bitset = void (*)(class IO&, T&);
337 static bool const value = (sizeof(test<ScalarBitSetTraits<T>>(nullptr)) == 1);
344 using Signature_input = StringRef (*)(StringRef, void*, T&);
345 using Signature_output = void (*)(const T&, void*, raw_ostream&);
357 (sizeof(test<ScalarTraits<T>>(nullptr, nullptr, nullptr)) == 1);
364 using Signature_input = StringRef (*)(StringRef, void *, T &);
365 using Signature_output = void (*)(const T &, void *, raw_ostream &);
375 (sizeof(test<BlockScalarTraits<T>>(nullptr, nullptr)) == 1);
380 using Signature_input = StringRef (*)(StringRef, StringRef, void *, T &);
381 using Signature_output = void (*)(const T &, void *, raw_ostream &,
383 using Signature_mustQuote = QuotingType (*)(const T &, StringRef);
393 (sizeof(test<TaggedScalarTraits<T>>(nullptr, nullptr, nullptr)) == 1);
412 using Signature_mapping = void (*)(class IO &, T &);
419 static bool const value = (sizeof(test<MappingTraits<T>>(nullptr)) == 1);
438 using Signature_validate = StringRef (*)(class IO &, T &);
445 static bool const value = (sizeof(test<MappingTraits<T>>(nullptr)) == 1);
452 using Signature_size = size_t (*)(class IO&, T&);
460 static bool const value = (sizeof(test<SequenceTraits<T>>(nullptr)) == 1);
467 using Signature_input = void (*)(IO &io, StringRef key, T &v);
476 (sizeof(test<CustomMappingTraits<T>>(nullptr)) == 1);
516 using Signature_size = size_t (*)(class IO &, T &);
524 static bool const value = (sizeof(test<DocumentListTraits<T>>(nullptr))==1);
528 using Signature_getKind = NodeKind (*)(const T &);
535 static bool const value = (sizeof(test<PolymorphicTraits<T>>(nullptr)) == 1);
793 void enumCase(T &Val, const char* Str, const T ConstVal) {
793 void enumCase(T &Val, const char* Str, const T ConstVal) {
801 void enumCase(T &Val, const char* Str, const uint32_t ConstVal) {
808 void enumFallback(T &Val) {
849 template <typename T> void mapRequired(const char *Key, T &Val) {
941 void processKey(const char *Key, T &Val, bool Required, Context &Ctx) {
968 typename std::enable_if<has_ScalarEnumerationTraits<T>::value, void>::type
969 yamlize(IO &io, T &Val, bool, EmptyContext &Ctx) {
971 ScalarEnumerationTraits<T>::enumeration(io, Val);
lib/CodeGen/AsmPrinter/CodeViewDebug.cpp 2648 if (RegisterId(Reg) == RegisterId::ESP) {
2649 Reg = unsigned(RegisterId::VFRAME);
lib/DebugInfo/CodeView/SymbolRecordMapping.cpp 486 RegisterId codeview::decodeFramePtrReg(EncodedFramePtrReg EncodedReg,
502 case EncodedFramePtrReg::None: return RegisterId::NONE;
503 case EncodedFramePtrReg::StackPtr: return RegisterId::VFRAME;
504 case EncodedFramePtrReg::FramePtr: return RegisterId::EBP;
505 case EncodedFramePtrReg::BasePtr: return RegisterId::EBX;
510 case EncodedFramePtrReg::None: return RegisterId::NONE;
511 case EncodedFramePtrReg::StackPtr: return RegisterId::RSP;
512 case EncodedFramePtrReg::FramePtr: return RegisterId::RBP;
513 case EncodedFramePtrReg::BasePtr: return RegisterId::R13;
517 return RegisterId::NONE;
520 EncodedFramePtrReg codeview::encodeFramePtrReg(RegisterId Reg, CPUType CPU) {
534 case RegisterId::VFRAME:
536 case RegisterId::EBP:
538 case RegisterId::EBX:
546 case RegisterId::RSP:
548 case RegisterId::RBP:
550 case RegisterId::R13:
lib/DebugInfo/PDB/Native/NativeRawSymbol.cpp 191 codeview::RegisterId NativeRawSymbol::getLocalBasePointerRegisterId() const {
192 return codeview::RegisterId::EAX;
247 codeview::RegisterId NativeRawSymbol::getRegisterId() const {
248 return codeview::RegisterId::EAX;
lib/ObjectYAML/CodeViewYAMLSymbols.cpp 149 void ScalarEnumerationTraits<RegisterId>::enumeration(IO &io, RegisterId &Reg) {
lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp 62 codeview::RegisterId CVReg;
65 {codeview::RegisterId::ARM64_W0, AArch64::W0},
66 {codeview::RegisterId::ARM64_W1, AArch64::W1},
67 {codeview::RegisterId::ARM64_W2, AArch64::W2},
68 {codeview::RegisterId::ARM64_W3, AArch64::W3},
69 {codeview::RegisterId::ARM64_W4, AArch64::W4},
70 {codeview::RegisterId::ARM64_W5, AArch64::W5},
71 {codeview::RegisterId::ARM64_W6, AArch64::W6},
72 {codeview::RegisterId::ARM64_W7, AArch64::W7},
73 {codeview::RegisterId::ARM64_W8, AArch64::W8},
74 {codeview::RegisterId::ARM64_W9, AArch64::W9},
75 {codeview::RegisterId::ARM64_W10, AArch64::W10},
76 {codeview::RegisterId::ARM64_W11, AArch64::W11},
77 {codeview::RegisterId::ARM64_W12, AArch64::W12},
78 {codeview::RegisterId::ARM64_W13, AArch64::W13},
79 {codeview::RegisterId::ARM64_W14, AArch64::W14},
80 {codeview::RegisterId::ARM64_W15, AArch64::W15},
81 {codeview::RegisterId::ARM64_W16, AArch64::W16},
82 {codeview::RegisterId::ARM64_W17, AArch64::W17},
83 {codeview::RegisterId::ARM64_W18, AArch64::W18},
84 {codeview::RegisterId::ARM64_W19, AArch64::W19},
85 {codeview::RegisterId::ARM64_W20, AArch64::W20},
86 {codeview::RegisterId::ARM64_W21, AArch64::W21},
87 {codeview::RegisterId::ARM64_W22, AArch64::W22},
88 {codeview::RegisterId::ARM64_W23, AArch64::W23},
89 {codeview::RegisterId::ARM64_W24, AArch64::W24},
90 {codeview::RegisterId::ARM64_W25, AArch64::W25},
91 {codeview::RegisterId::ARM64_W26, AArch64::W26},
92 {codeview::RegisterId::ARM64_W27, AArch64::W27},
93 {codeview::RegisterId::ARM64_W28, AArch64::W28},
94 {codeview::RegisterId::ARM64_W29, AArch64::W29},
95 {codeview::RegisterId::ARM64_W30, AArch64::W30},
96 {codeview::RegisterId::ARM64_WZR, AArch64::WZR},
97 {codeview::RegisterId::ARM64_X0, AArch64::X0},
98 {codeview::RegisterId::ARM64_X1, AArch64::X1},
99 {codeview::RegisterId::ARM64_X2, AArch64::X2},
100 {codeview::RegisterId::ARM64_X3, AArch64::X3},
101 {codeview::RegisterId::ARM64_X4, AArch64::X4},
102 {codeview::RegisterId::ARM64_X5, AArch64::X5},
103 {codeview::RegisterId::ARM64_X6, AArch64::X6},
104 {codeview::RegisterId::ARM64_X7, AArch64::X7},
105 {codeview::RegisterId::ARM64_X8, AArch64::X8},
106 {codeview::RegisterId::ARM64_X9, AArch64::X9},
107 {codeview::RegisterId::ARM64_X10, AArch64::X10},
108 {codeview::RegisterId::ARM64_X11, AArch64::X11},
109 {codeview::RegisterId::ARM64_X12, AArch64::X12},
110 {codeview::RegisterId::ARM64_X13, AArch64::X13},
111 {codeview::RegisterId::ARM64_X14, AArch64::X14},
112 {codeview::RegisterId::ARM64_X15, AArch64::X15},
113 {codeview::RegisterId::ARM64_X16, AArch64::X16},
114 {codeview::RegisterId::ARM64_X17, AArch64::X17},
115 {codeview::RegisterId::ARM64_X18, AArch64::X18},
116 {codeview::RegisterId::ARM64_X19, AArch64::X19},
117 {codeview::RegisterId::ARM64_X20, AArch64::X20},
118 {codeview::RegisterId::ARM64_X21, AArch64::X21},
119 {codeview::RegisterId::ARM64_X22, AArch64::X22},
120 {codeview::RegisterId::ARM64_X23, AArch64::X23},
121 {codeview::RegisterId::ARM64_X24, AArch64::X24},
122 {codeview::RegisterId::ARM64_X25, AArch64::X25},
123 {codeview::RegisterId::ARM64_X26, AArch64::X26},
124 {codeview::RegisterId::ARM64_X27, AArch64::X27},
125 {codeview::RegisterId::ARM64_X28, AArch64::X28},
126 {codeview::RegisterId::ARM64_FP, AArch64::FP},
127 {codeview::RegisterId::ARM64_LR, AArch64::LR},
128 {codeview::RegisterId::ARM64_SP, AArch64::SP},
129 {codeview::RegisterId::ARM64_ZR, AArch64::XZR},
130 {codeview::RegisterId::ARM64_NZCV, AArch64::NZCV},
131 {codeview::RegisterId::ARM64_S0, AArch64::S0},
132 {codeview::RegisterId::ARM64_S1, AArch64::S1},
133 {codeview::RegisterId::ARM64_S2, AArch64::S2},
134 {codeview::RegisterId::ARM64_S3, AArch64::S3},
135 {codeview::RegisterId::ARM64_S4, AArch64::S4},
136 {codeview::RegisterId::ARM64_S5, AArch64::S5},
137 {codeview::RegisterId::ARM64_S6, AArch64::S6},
138 {codeview::RegisterId::ARM64_S7, AArch64::S7},
139 {codeview::RegisterId::ARM64_S8, AArch64::S8},
140 {codeview::RegisterId::ARM64_S9, AArch64::S9},
141 {codeview::RegisterId::ARM64_S10, AArch64::S10},
142 {codeview::RegisterId::ARM64_S11, AArch64::S11},
143 {codeview::RegisterId::ARM64_S12, AArch64::S12},
144 {codeview::RegisterId::ARM64_S13, AArch64::S13},
145 {codeview::RegisterId::ARM64_S14, AArch64::S14},
146 {codeview::RegisterId::ARM64_S15, AArch64::S15},
147 {codeview::RegisterId::ARM64_S16, AArch64::S16},
148 {codeview::RegisterId::ARM64_S17, AArch64::S17},
149 {codeview::RegisterId::ARM64_S18, AArch64::S18},
150 {codeview::RegisterId::ARM64_S19, AArch64::S19},
151 {codeview::RegisterId::ARM64_S20, AArch64::S20},
152 {codeview::RegisterId::ARM64_S21, AArch64::S21},
153 {codeview::RegisterId::ARM64_S22, AArch64::S22},
154 {codeview::RegisterId::ARM64_S23, AArch64::S23},
155 {codeview::RegisterId::ARM64_S24, AArch64::S24},
156 {codeview::RegisterId::ARM64_S25, AArch64::S25},
157 {codeview::RegisterId::ARM64_S26, AArch64::S26},
158 {codeview::RegisterId::ARM64_S27, AArch64::S27},
159 {codeview::RegisterId::ARM64_S28, AArch64::S28},
160 {codeview::RegisterId::ARM64_S29, AArch64::S29},
161 {codeview::RegisterId::ARM64_S30, AArch64::S30},
162 {codeview::RegisterId::ARM64_S31, AArch64::S31},
163 {codeview::RegisterId::ARM64_D0, AArch64::D0},
164 {codeview::RegisterId::ARM64_D1, AArch64::D1},
165 {codeview::RegisterId::ARM64_D2, AArch64::D2},
166 {codeview::RegisterId::ARM64_D3, AArch64::D3},
167 {codeview::RegisterId::ARM64_D4, AArch64::D4},
168 {codeview::RegisterId::ARM64_D5, AArch64::D5},
169 {codeview::RegisterId::ARM64_D6, AArch64::D6},
170 {codeview::RegisterId::ARM64_D7, AArch64::D7},
171 {codeview::RegisterId::ARM64_D8, AArch64::D8},
172 {codeview::RegisterId::ARM64_D9, AArch64::D9},
173 {codeview::RegisterId::ARM64_D10, AArch64::D10},
174 {codeview::RegisterId::ARM64_D11, AArch64::D11},
175 {codeview::RegisterId::ARM64_D12, AArch64::D12},
176 {codeview::RegisterId::ARM64_D13, AArch64::D13},
177 {codeview::RegisterId::ARM64_D14, AArch64::D14},
178 {codeview::RegisterId::ARM64_D15, AArch64::D15},
179 {codeview::RegisterId::ARM64_D16, AArch64::D16},
180 {codeview::RegisterId::ARM64_D17, AArch64::D17},
181 {codeview::RegisterId::ARM64_D18, AArch64::D18},
182 {codeview::RegisterId::ARM64_D19, AArch64::D19},
183 {codeview::RegisterId::ARM64_D20, AArch64::D20},
184 {codeview::RegisterId::ARM64_D21, AArch64::D21},
185 {codeview::RegisterId::ARM64_D22, AArch64::D22},
186 {codeview::RegisterId::ARM64_D23, AArch64::D23},
187 {codeview::RegisterId::ARM64_D24, AArch64::D24},
188 {codeview::RegisterId::ARM64_D25, AArch64::D25},
189 {codeview::RegisterId::ARM64_D26, AArch64::D26},
190 {codeview::RegisterId::ARM64_D27, AArch64::D27},
191 {codeview::RegisterId::ARM64_D28, AArch64::D28},
192 {codeview::RegisterId::ARM64_D29, AArch64::D29},
193 {codeview::RegisterId::ARM64_D30, AArch64::D30},
194 {codeview::RegisterId::ARM64_D31, AArch64::D31},
195 {codeview::RegisterId::ARM64_Q0, AArch64::Q0},
196 {codeview::RegisterId::ARM64_Q1, AArch64::Q1},
197 {codeview::RegisterId::ARM64_Q2, AArch64::Q2},
198 {codeview::RegisterId::ARM64_Q3, AArch64::Q3},
199 {codeview::RegisterId::ARM64_Q4, AArch64::Q4},
200 {codeview::RegisterId::ARM64_Q5, AArch64::Q5},
201 {codeview::RegisterId::ARM64_Q6, AArch64::Q6},
202 {codeview::RegisterId::ARM64_Q7, AArch64::Q7},
203 {codeview::RegisterId::ARM64_Q8, AArch64::Q8},
204 {codeview::RegisterId::ARM64_Q9, AArch64::Q9},
205 {codeview::RegisterId::ARM64_Q10, AArch64::Q10},
206 {codeview::RegisterId::ARM64_Q11, AArch64::Q11},
207 {codeview::RegisterId::ARM64_Q12, AArch64::Q12},
208 {codeview::RegisterId::ARM64_Q13, AArch64::Q13},
209 {codeview::RegisterId::ARM64_Q14, AArch64::Q14},
210 {codeview::RegisterId::ARM64_Q15, AArch64::Q15},
211 {codeview::RegisterId::ARM64_Q16, AArch64::Q16},
212 {codeview::RegisterId::ARM64_Q17, AArch64::Q17},
213 {codeview::RegisterId::ARM64_Q18, AArch64::Q18},
214 {codeview::RegisterId::ARM64_Q19, AArch64::Q19},
215 {codeview::RegisterId::ARM64_Q20, AArch64::Q20},
216 {codeview::RegisterId::ARM64_Q21, AArch64::Q21},
217 {codeview::RegisterId::ARM64_Q22, AArch64::Q22},
218 {codeview::RegisterId::ARM64_Q23, AArch64::Q23},
219 {codeview::RegisterId::ARM64_Q24, AArch64::Q24},
220 {codeview::RegisterId::ARM64_Q25, AArch64::Q25},
221 {codeview::RegisterId::ARM64_Q26, AArch64::Q26},
222 {codeview::RegisterId::ARM64_Q27, AArch64::Q27},
223 {codeview::RegisterId::ARM64_Q28, AArch64::Q28},
224 {codeview::RegisterId::ARM64_Q29, AArch64::Q29},
225 {codeview::RegisterId::ARM64_Q30, AArch64::Q30},
226 {codeview::RegisterId::ARM64_Q31, AArch64::Q31},
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp 86 codeview::RegisterId CVReg;
89 {codeview::RegisterId::AL, X86::AL},
90 {codeview::RegisterId::CL, X86::CL},
91 {codeview::RegisterId::DL, X86::DL},
92 {codeview::RegisterId::BL, X86::BL},
93 {codeview::RegisterId::AH, X86::AH},
94 {codeview::RegisterId::CH, X86::CH},
95 {codeview::RegisterId::DH, X86::DH},
96 {codeview::RegisterId::BH, X86::BH},
97 {codeview::RegisterId::AX, X86::AX},
98 {codeview::RegisterId::CX, X86::CX},
99 {codeview::RegisterId::DX, X86::DX},
100 {codeview::RegisterId::BX, X86::BX},
101 {codeview::RegisterId::SP, X86::SP},
102 {codeview::RegisterId::BP, X86::BP},
103 {codeview::RegisterId::SI, X86::SI},
104 {codeview::RegisterId::DI, X86::DI},
105 {codeview::RegisterId::EAX, X86::EAX},
106 {codeview::RegisterId::ECX, X86::ECX},
107 {codeview::RegisterId::EDX, X86::EDX},
108 {codeview::RegisterId::EBX, X86::EBX},
109 {codeview::RegisterId::ESP, X86::ESP},
110 {codeview::RegisterId::EBP, X86::EBP},
111 {codeview::RegisterId::ESI, X86::ESI},
112 {codeview::RegisterId::EDI, X86::EDI},
114 {codeview::RegisterId::EFLAGS, X86::EFLAGS},
116 {codeview::RegisterId::ST0, X86::FP0},
117 {codeview::RegisterId::ST1, X86::FP1},
118 {codeview::RegisterId::ST2, X86::FP2},
119 {codeview::RegisterId::ST3, X86::FP3},
120 {codeview::RegisterId::ST4, X86::FP4},
121 {codeview::RegisterId::ST5, X86::FP5},
122 {codeview::RegisterId::ST6, X86::FP6},
123 {codeview::RegisterId::ST7, X86::FP7},
125 {codeview::RegisterId::MM0, X86::MM0},
126 {codeview::RegisterId::MM1, X86::MM1},
127 {codeview::RegisterId::MM2, X86::MM2},
128 {codeview::RegisterId::MM3, X86::MM3},
129 {codeview::RegisterId::MM4, X86::MM4},
130 {codeview::RegisterId::MM5, X86::MM5},
131 {codeview::RegisterId::MM6, X86::MM6},
132 {codeview::RegisterId::MM7, X86::MM7},
134 {codeview::RegisterId::XMM0, X86::XMM0},
135 {codeview::RegisterId::XMM1, X86::XMM1},
136 {codeview::RegisterId::XMM2, X86::XMM2},
137 {codeview::RegisterId::XMM3, X86::XMM3},
138 {codeview::RegisterId::XMM4, X86::XMM4},
139 {codeview::RegisterId::XMM5, X86::XMM5},
140 {codeview::RegisterId::XMM6, X86::XMM6},
141 {codeview::RegisterId::XMM7, X86::XMM7},
143 {codeview::RegisterId::XMM8, X86::XMM8},
144 {codeview::RegisterId::XMM9, X86::XMM9},
145 {codeview::RegisterId::XMM10, X86::XMM10},
146 {codeview::RegisterId::XMM11, X86::XMM11},
147 {codeview::RegisterId::XMM12, X86::XMM12},
148 {codeview::RegisterId::XMM13, X86::XMM13},
149 {codeview::RegisterId::XMM14, X86::XMM14},
150 {codeview::RegisterId::XMM15, X86::XMM15},
152 {codeview::RegisterId::SIL, X86::SIL},
153 {codeview::RegisterId::DIL, X86::DIL},
154 {codeview::RegisterId::BPL, X86::BPL},
155 {codeview::RegisterId::SPL, X86::SPL},
156 {codeview::RegisterId::RAX, X86::RAX},
157 {codeview::RegisterId::RBX, X86::RBX},
158 {codeview::RegisterId::RCX, X86::RCX},
159 {codeview::RegisterId::RDX, X86::RDX},
160 {codeview::RegisterId::RSI, X86::RSI},
161 {codeview::RegisterId::RDI, X86::RDI},
162 {codeview::RegisterId::RBP, X86::RBP},
163 {codeview::RegisterId::RSP, X86::RSP},
164 {codeview::RegisterId::R8, X86::R8},
165 {codeview::RegisterId::R9, X86::R9},
166 {codeview::RegisterId::R10, X86::R10},
167 {codeview::RegisterId::R11, X86::R11},
168 {codeview::RegisterId::R12, X86::R12},
169 {codeview::RegisterId::R13, X86::R13},
170 {codeview::RegisterId::R14, X86::R14},
171 {codeview::RegisterId::R15, X86::R15},
172 {codeview::RegisterId::R8B, X86::R8B},
173 {codeview::RegisterId::R9B, X86::R9B},
174 {codeview::RegisterId::R10B, X86::R10B},
175 {codeview::RegisterId::R11B, X86::R11B},
176 {codeview::RegisterId::R12B, X86::R12B},
177 {codeview::RegisterId::R13B, X86::R13B},
178 {codeview::RegisterId::R14B, X86::R14B},
179 {codeview::RegisterId::R15B, X86::R15B},
180 {codeview::RegisterId::R8W, X86::R8W},
181 {codeview::RegisterId::R9W, X86::R9W},
182 {codeview::RegisterId::R10W, X86::R10W},
183 {codeview::RegisterId::R11W, X86::R11W},
184 {codeview::RegisterId::R12W, X86::R12W},
185 {codeview::RegisterId::R13W, X86::R13W},
186 {codeview::RegisterId::R14W, X86::R14W},
187 {codeview::RegisterId::R15W, X86::R15W},
188 {codeview::RegisterId::R8D, X86::R8D},
189 {codeview::RegisterId::R9D, X86::R9D},
190 {codeview::RegisterId::R10D, X86::R10D},
191 {codeview::RegisterId::R11D, X86::R11D},
192 {codeview::RegisterId::R12D, X86::R12D},
193 {codeview::RegisterId::R13D, X86::R13D},
194 {codeview::RegisterId::R14D, X86::R14D},
195 {codeview::RegisterId::R15D, X86::R15D},
196 {codeview::RegisterId::AMD64_YMM0, X86::YMM0},
197 {codeview::RegisterId::AMD64_YMM1, X86::YMM1},
198 {codeview::RegisterId::AMD64_YMM2, X86::YMM2},
199 {codeview::RegisterId::AMD64_YMM3, X86::YMM3},
200 {codeview::RegisterId::AMD64_YMM4, X86::YMM4},
201 {codeview::RegisterId::AMD64_YMM5, X86::YMM5},
202 {codeview::RegisterId::AMD64_YMM6, X86::YMM6},
203 {codeview::RegisterId::AMD64_YMM7, X86::YMM7},
204 {codeview::RegisterId::AMD64_YMM8, X86::YMM8},
205 {codeview::RegisterId::AMD64_YMM9, X86::YMM9},
206 {codeview::RegisterId::AMD64_YMM10, X86::YMM10},
207 {codeview::RegisterId::AMD64_YMM11, X86::YMM11},
208 {codeview::RegisterId::AMD64_YMM12, X86::YMM12},
209 {codeview::RegisterId::AMD64_YMM13, X86::YMM13},
210 {codeview::RegisterId::AMD64_YMM14, X86::YMM14},
211 {codeview::RegisterId::AMD64_YMM15, X86::YMM15},
212 {codeview::RegisterId::AMD64_YMM16, X86::YMM16},
213 {codeview::RegisterId::AMD64_YMM17, X86::YMM17},
214 {codeview::RegisterId::AMD64_YMM18, X86::YMM18},
215 {codeview::RegisterId::AMD64_YMM19, X86::YMM19},
216 {codeview::RegisterId::AMD64_YMM20, X86::YMM20},
217 {codeview::RegisterId::AMD64_YMM21, X86::YMM21},
218 {codeview::RegisterId::AMD64_YMM22, X86::YMM22},
219 {codeview::RegisterId::AMD64_YMM23, X86::YMM23},
220 {codeview::RegisterId::AMD64_YMM24, X86::YMM24},
221 {codeview::RegisterId::AMD64_YMM25, X86::YMM25},
222 {codeview::RegisterId::AMD64_YMM26, X86::YMM26},
223 {codeview::RegisterId::AMD64_YMM27, X86::YMM27},
224 {codeview::RegisterId::AMD64_YMM28, X86::YMM28},
225 {codeview::RegisterId::AMD64_YMM29, X86::YMM29},
226 {codeview::RegisterId::AMD64_YMM30, X86::YMM30},
227 {codeview::RegisterId::AMD64_YMM31, X86::YMM31},
228 {codeview::RegisterId::AMD64_ZMM0, X86::ZMM0},
229 {codeview::RegisterId::AMD64_ZMM1, X86::ZMM1},
230 {codeview::RegisterId::AMD64_ZMM2, X86::ZMM2},
231 {codeview::RegisterId::AMD64_ZMM3, X86::ZMM3},
232 {codeview::RegisterId::AMD64_ZMM4, X86::ZMM4},
233 {codeview::RegisterId::AMD64_ZMM5, X86::ZMM5},
234 {codeview::RegisterId::AMD64_ZMM6, X86::ZMM6},
235 {codeview::RegisterId::AMD64_ZMM7, X86::ZMM7},
236 {codeview::RegisterId::AMD64_ZMM8, X86::ZMM8},
237 {codeview::RegisterId::AMD64_ZMM9, X86::ZMM9},
238 {codeview::RegisterId::AMD64_ZMM10, X86::ZMM10},
239 {codeview::RegisterId::AMD64_ZMM11, X86::ZMM11},
240 {codeview::RegisterId::AMD64_ZMM12, X86::ZMM12},
241 {codeview::RegisterId::AMD64_ZMM13, X86::ZMM13},
242 {codeview::RegisterId::AMD64_ZMM14, X86::ZMM14},
243 {codeview::RegisterId::AMD64_ZMM15, X86::ZMM15},
244 {codeview::RegisterId::AMD64_ZMM16, X86::ZMM16},
245 {codeview::RegisterId::AMD64_ZMM17, X86::ZMM17},
246 {codeview::RegisterId::AMD64_ZMM18, X86::ZMM18},
247 {codeview::RegisterId::AMD64_ZMM19, X86::ZMM19},
248 {codeview::RegisterId::AMD64_ZMM20, X86::ZMM20},
249 {codeview::RegisterId::AMD64_ZMM21, X86::ZMM21},
250 {codeview::RegisterId::AMD64_ZMM22, X86::ZMM22},
251 {codeview::RegisterId::AMD64_ZMM23, X86::ZMM23},
252 {codeview::RegisterId::AMD64_ZMM24, X86::ZMM24},
253 {codeview::RegisterId::AMD64_ZMM25, X86::ZMM25},
254 {codeview::RegisterId::AMD64_ZMM26, X86::ZMM26},
255 {codeview::RegisterId::AMD64_ZMM27, X86::ZMM27},
256 {codeview::RegisterId::AMD64_ZMM28, X86::ZMM28},
257 {codeview::RegisterId::AMD64_ZMM29, X86::ZMM29},
258 {codeview::RegisterId::AMD64_ZMM30, X86::ZMM30},
259 {codeview::RegisterId::AMD64_ZMM31, X86::ZMM31},
260 {codeview::RegisterId::AMD64_K0, X86::K0},
261 {codeview::RegisterId::AMD64_K1, X86::K1},
262 {codeview::RegisterId::AMD64_K2, X86::K2},
263 {codeview::RegisterId::AMD64_K3, X86::K3},
264 {codeview::RegisterId::AMD64_K4, X86::K4},
265 {codeview::RegisterId::AMD64_K5, X86::K5},
266 {codeview::RegisterId::AMD64_K6, X86::K6},
267 {codeview::RegisterId::AMD64_K7, X86::K7},
268 {codeview::RegisterId::AMD64_XMM16, X86::XMM16},
269 {codeview::RegisterId::AMD64_XMM17, X86::XMM17},
270 {codeview::RegisterId::AMD64_XMM18, X86::XMM18},
271 {codeview::RegisterId::AMD64_XMM19, X86::XMM19},
272 {codeview::RegisterId::AMD64_XMM20, X86::XMM20},
273 {codeview::RegisterId::AMD64_XMM21, X86::XMM21},
274 {codeview::RegisterId::AMD64_XMM22, X86::XMM22},
275 {codeview::RegisterId::AMD64_XMM23, X86::XMM23},
276 {codeview::RegisterId::AMD64_XMM24, X86::XMM24},
277 {codeview::RegisterId::AMD64_XMM25, X86::XMM25},
278 {codeview::RegisterId::AMD64_XMM26, X86::XMM26},
279 {codeview::RegisterId::AMD64_XMM27, X86::XMM27},
280 {codeview::RegisterId::AMD64_XMM28, X86::XMM28},
281 {codeview::RegisterId::AMD64_XMM29, X86::XMM29},
282 {codeview::RegisterId::AMD64_XMM30, X86::XMM30},
283 {codeview::RegisterId::AMD64_XMM31, X86::XMM31},
tools/lldb/source/Plugins/SymbolFile/NativePDB/CodeViewRegisterMapping.cpp 425 llvm::Triple::ArchType arch_type, llvm::codeview::RegisterId register_id) {
435 case llvm::codeview::RegisterId::MXCSR:
437 case llvm::codeview::RegisterId::BND0:
439 case llvm::codeview::RegisterId::BND1:
441 case llvm::codeview::RegisterId::BND2:
tools/lldb/source/Plugins/SymbolFile/NativePDB/CodeViewRegisterMapping.h 19 llvm::codeview::RegisterId register_id);
tools/lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.cpp 34 uint32_t GetGenericRegisterNumber(llvm::codeview::RegisterId register_id) {
35 if (register_id == llvm::codeview::RegisterId::VFRAME)
42 llvm::codeview::RegisterId register_id,
132 llvm::codeview::RegisterId reg, llvm::Optional<int32_t> relative_offset,
162 llvm::codeview::RegisterId reg, lldb::ModuleSP module) {
167 llvm::codeview::RegisterId reg, int32_t offset, lldb::ModuleSP module) {
tools/lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.h 27 MakeEnregisteredLocationExpression(llvm::codeview::RegisterId reg,
30 DWARFExpression MakeRegRelLocationExpression(llvm::codeview::RegisterId reg,
tools/lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp 50 auto reg_id = static_cast<llvm::codeview::RegisterId>(it->Value);
tools/lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.cpp 562 static RegisterId GetBaseFrameRegister(PdbIndex &index,
637 RegisterId base_reg =
640 if (base_reg == RegisterId::VFRAME) {
661 RegisterId base_reg = (RegisterId)(uint16_t)loc.Hdr.Register;
663 if (base_reg == RegisterId::VFRAME) {
tools/lldb/source/Plugins/SymbolFile/PDB/PDBLocationToDWARFExpression.cpp 109 auto reg_id = symbol.getRegisterId();
110 if (reg_id == llvm::codeview::RegisterId::VFRAME) {
tools/llvm-pdbutil/FormatUtil.h 44 template <typename T> std::string formatUnknownEnum(T Value) {
tools/llvm-pdbutil/MinimalSymbolDumper.cpp 290 static std::string formatRegisterId(RegisterId Id, CPUType Cpu) {
unittests/DebugInfo/CodeView/TypeIndexDiscoveryTest.cpp 557 Reg.Register = RegisterId::EAX;