|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenDAGISel.inc54211 return !SDValue(N,0)->getValueType(0).isVector() &&
include/llvm/CodeGen/SelectionDAG.h 979 assert(LHS.getValueType().isVector() == RHS.getValueType().isVector() &&
979 assert(LHS.getValueType().isVector() == RHS.getValueType().isVector() &&
981 assert(LHS.getValueType().isVector() == VT.isVector() &&
981 assert(LHS.getValueType().isVector() == VT.isVector() &&
994 assert(VT.isVector() == LHS.getValueType().isVector() &&
994 assert(VT.isVector() == LHS.getValueType().isVector() &&
996 auto Opcode = Cond.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT;
include/llvm/CodeGen/TargetLowering.h 680 return getBooleanContents(Type.isVector(), Type.isFloatingPoint());
796 assert(!VT.isVector());
1300 if (VT.isVector()) {
1328 if (VT.isVector()) {
1377 if (NewVT.isVector() && !Load->hasOneUse())
2596 if (VT.isVector())
include/llvm/CodeGen/ValueTypes.h 115 if (isVector())
260 return isVector() ? getVectorElementType() : *this;
265 assert(isVector() && "Invalid vector type!");
273 assert(isVector() && "Invalid vector type!");
281 assert((isVector()) && "Invalid vector type!");
317 assert(isInteger() && !isVector() && "Invalid integer type!");
328 assert(isInteger() && !isVector() && "Invalid integer type!");
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 302 unsigned NumElts = VT.isVector() ? VT.getVectorNumElements() : 1;
1176 if (VT.isVector() || !VT.isInteger())
1241 if (VT.isVector() || !VT.isInteger())
1290 if (VT.isVector() || !VT.isInteger())
1321 if (VT.isVector() || !VT.isInteger())
2081 if (VT.isVector()) {
2323 if (VT.isVector()) {
2636 if (VT.isVector())
2846 if (!VT.isVector())
2860 if (VT.isVector()) {
3169 if (VT.isVector()) {
3332 if (VT.isVector()) {
3385 (!VT.isVector() || Level <= AfterLegalizeVectorOps)) {
3517 if (VT.isVector() || !VT.isInteger())
3630 if (VT.isVector())
3774 if (VT.isVector())
3956 if (VT.isVector()) {
3979 if (VT.isSimple() && !VT.isVector()) {
4003 if (VT.isVector()) {
4035 if (VT.isSimple() && !VT.isVector()) {
4111 if (VT.isSimple() && !VT.isVector()) {
4154 if (VT.isSimple() && !VT.isVector()) {
4210 if (VT.isVector())
4281 if ((VT.isVector() || LegalOperations) &&
4348 !(VT.isVector() && TLI.isTypeLegal(VT) &&
4349 !XVT.isVector() && !TLI.isTypeLegal(XVT))) {
4778 if (Op.getValueType().isVector())
5044 if (VT.isVector()) {
5091 if (VT.isVector())
5229 if (!VT.isVector() && N1C && (N0.getOpcode() == ISD::LOAD ||
5682 if (VT.isVector()) {
6862 if (VT.isVector()) {
7292 if (VT.isVector()) {
7547 if (VT.isVector())
7567 if (VT.isVector())
7596 if (VT.isVector())
7617 if (VT.isVector())
7657 if (VT.isVector())
7732 if (VT.isVector())
8934 if (!(VT.isVector() && (!LegalTypes || TLI.isTypeLegal(SVT)) &&
9088 !DstVT.isVector() || !DstVT.isPow2VectorType() ||
9293 VT.isVector()) &&
9317 ((LegalOperations || VT.isVector() ||
9326 if (VT.isVector())
9550 if (VT.isVector() && !LegalOperations &&
9599 if (!VT.isVector() && !TLI.convertSelectOfConstantsToMath(VT)) {
9748 if (SrcVT.bitsLT(VT) && VT.isVector()) {
9879 if (!LegalOperations && VT.isVector() &&
10008 if (ISD::isNON_EXTLoad(N0.getNode()) && !VT.isVector() &&
10063 if (VT.isVector() && !LegalOperations) {
10174 if (VT.isVector())
10661 if (Level == AfterLegalizeVectorOps && VT.isVector() &&
10692 if (!VT.isVector()) {
10767 if (N0.getOpcode() == ISD::BITCAST && !VT.isVector()) {
10770 if (VecSrcVT.isVector() && VecSrcVT.getScalarType() == VT &&
10783 if (!VT.isVector() &&
10963 if (VT.isVector() &&
10978 (isa<ConstantSDNode>(N0) && VT.isFloatingPoint() && !VT.isVector() &&
10980 (isa<ConstantFPSDNode>(N0) && VT.isInteger() && !VT.isVector() &&
11036 !VT.isVector() && !N0.getValueType().isVector()) {
11036 !VT.isVector() && !N0.getValueType().isVector()) {
11086 VT.isInteger() && !VT.isVector()) {
11156 if (Level < AfterLegalizeDAG && TLI.isTypeLegal(VT) && VT.isVector() &&
11930 if (VT.isVector())
12109 if (VT.isVector())
12201 if (VT.isVector()) {
12470 if (VT.isVector() && DAG.isSplatValue(N1))
12524 if (VT.isVector())
12852 !VT.isVector() &&
12866 N0.getOperand(0).getOpcode() == ISD::SETCC &&!VT.isVector() &&
12912 if (N0.getOpcode() == ISD::SETCC && !VT.isVector() &&
13176 if (IntVT.isInteger() && !IntVT.isVector()) {
13178 if (N0.getValueType().isVector()) {
13274 if (IntVT.isInteger() && !IntVT.isVector()) {
13276 if (N0.getValueType().isVector()) {
13878 return T.isVector() ? T.getVectorNumElements() : 0;
13987 if (STType.isInteger() && LDMemType.isInteger() && !STType.isVector() &&
13988 !LDMemType.isVector() && LD->getExtensionType() != ISD::SEXTLOAD) {
14012 if (!STMemType.isVector() && !LDMemType.isVector() &&
14012 if (!STMemType.isVector() && !LDMemType.isVector() &&
14848 if (ST->isTruncatingStore() || VT.isVector() || !Value.hasOneUse())
15117 unsigned NumMemElts = MemVT.isVector() ? MemVT.getVectorNumElements() : 1;
15155 StoredVal = DAG.getNode(MemVT.isVector() ? ISD::CONCAT_VECTORS
15177 unsigned OpC = MemVT.isVector() ? ISD::EXTRACT_SUBVECTOR
15188 StoredVal = DAG.getNode(MemVT.isVector() ? ISD::CONCAT_VECTORS
15491 unsigned NumMemElts = MemVT.isVector() ? MemVT.getVectorNumElements() : 1;
16544 !InsertVal.getOperand(0).getValueType().isVector())
16971 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType()))
17643 if (SrcVT.isVector()) {
17725 !Op.getOperand(0).getValueType().isVector())
17857 assert(In.getValueType().isVector() && "Must concat vectors");
17880 if (!Scalar.getValueType().isVector()) {
18092 if (!WideBVT.isVector())
18250 V.getOperand(0).getValueType().isVector()) {
18924 if (ConvInput.getValueType().isVector() &&
19281 if (CN0VT.isVector() && CN1VT.isVector() &&
19281 if (CN0VT.isVector() && CN1VT.isVector() &&
19322 N0Src.getValueType().isVector() && N1Src.getValueType().isVector()) {
19322 N0Src.getValueType().isVector() && N1Src.getValueType().isVector()) {
19581 assert(N->getValueType(0).isVector() &&
19751 if (TheSelect->getOperand(0).getValueType().isVector()) return false;
20440 ISD::NodeType SelOpcode = VT.isVector() ? ISD::VSELECT : ISD::SELECT;
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 558 assert(!StVT.isVector() && "Unsupported truncstore!");
637 assert(!StVT.isVector() &&
772 assert(!SrcVT.isVector() && "Unsupported extload!");
919 assert(!SrcVT.isVector() &&
1180 if (!Op1.getValueType().isVector()) {
1202 if (!Op2.getValueType().isVector()) {
1337 if (Op.getValueType().isVector())
1359 assert(Op.getValueType().isVector() && "Non-vector insert subvector!");
3663 assert(VT.isVector() && "Unable to legalize non-vector shift");
4280 if (Node->getValueType(0).isVector() ||
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 294 if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector() && !NInVT.isVector())
294 if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector() && !NInVT.isVector())
303 if (!NOutVT.isVector())
312 if (!NOutVT.isVector())
317 if (!NOutVT.isVector()) {
340 if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector())
345 if (NOutVT.isVector()) {
375 if (!ShiftVT.isVector() &&
838 assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() &&
838 assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() &&
924 assert(InVT.isVector() && "Cannot split scalar types");
4072 assert(NOutVT.isVector() && "This type must be promoted to a vector type");
4122 assert(NOutVT.isVector() && "This type must be promoted to a vector type");
4150 assert(!N->getOperand(0).getValueType().isVector() &&
4155 assert(NOutVT.isVector() && "This type must be promoted to a vector type");
4168 assert(!SplatVal.getValueType().isVector() && "Input must be a scalar");
4172 assert(NOutVT.isVector() && "Type must be promoted to a vector type");
4185 assert(NOutVT.isVector() && "This type must be promoted to a vector type");
4219 assert(NVT.isVector() && "This type must be promoted to a vector type");
4254 assert(NOutVT.isVector() && "This type must be promoted to a vector type");
lib/CodeGen/SelectionDAG/LegalizeTypes.cpp 848 assert(Op.getValueType().isVector() && "Only applies to vectors!");
lib/CodeGen/SelectionDAG/LegalizeTypes.h 900 if (Op.getValueType().isVector())
lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp 99 if (InVT.isVector() && OutVT.isInteger()) {
333 if (N->getValueType(0).isVector() &&
514 if (Cond.getValueType().isVector()) {
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp 187 HasVectors |= J->isVector();
248 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) {
277 if (StVT.isVector() && ST->isTruncatingStore()) {
302 HasVectorValueOrOp |= J->isVector();
304 HasVectorValueOrOp |= Op.getValueType().isVector();
547 if (Op.getOperand(j).getValueType().isVector())
583 if (Op.getOperand(j).getValueType().isVector())
898 assert(VT.isVector() && !Mask.getValueType().isVector()
898 assert(VT.isVector() && !Mask.getValueType().isVector()
1393 if (OperVT.isVector())
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 238 if (Oper.getValueType().isVector())
297 if (Op.getValueType().isVector()
543 assert(N->getValueType(0).isVector() &&
544 N->getOperand(0).getValueType().isVector() &&
740 assert(N->getValueType(0).isVector() &&
741 N->getOperand(0).getValueType().isVector() &&
1321 if (InVT.isVector()) {
1375 if (OperandVT.isVector()) {
1705 assert(N->getValueType(0).isVector() &&
1706 N->getOperand(0).getValueType().isVector() &&
2083 assert(Mask.getValueType().isVector() && "VSELECT without a vector mask?");
2114 assert(VecVT.isVector() && "Can only split reduce vector operand");
2627 assert(N->getValueType(0).isVector() &&
2628 N->getOperand(0).getValueType().isVector() &&
2964 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
2971 if (!VT.isVector()) {
3128 if (Oper.getValueType().isVector()) {
3149 if (Op.getValueType().isVector())
3176 if (Op.getValueType().isVector())
3504 if (InVT.isVector())
3541 if (InVT.isVector()) {
3551 if (InVT.isVector()) {
4010 if (CondVT.isVector()) {
4081 assert(N->getValueType(0).isVector() &&
4082 N->getOperand(0).getValueType().isVector() &&
4089 assert(InVT.isVector() && "can not widen non-vector type");
4350 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
4365 if (VT.isVector()) {
4644 assert(VT.isVector() && !VT.isPow2VectorType() && isTypeLegal(VT));
4770 assert(LdVT.isVector() && WidenVT.isVector());
4770 assert(LdVT.isVector() && WidenVT.isVector());
4793 if (!NewVT.isVector()) {
4833 if (L->getValueType(0).isVector() && NewVTWidth >= LdWidth) {
4861 if (!LdOps[0].getValueType().isVector())
4873 if (!LdTy.isVector()) {
4876 if (LdTy.isVector())
4921 assert(LdVT.isVector() && WidenVT.isVector());
4921 assert(LdVT.isVector() && WidenVT.isVector());
4987 if (NewVT.isVector()) {
5045 assert(StVT.isVector() && ValOp.getValueType().isVector());
5045 assert(StVT.isVector() && ValOp.getValueType().isVector());
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 798 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
811 assert(N->getValueType(0).isVector() && "Wrong return type!");
1132 assert(!VT.isVector() &&
1208 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1220 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1271 if (!VT.isVector())
1284 else if (VT.isVector())
1322 if (!VT.isVector())
1332 if (VT.isVector())
1891 if (OpTy == ShTy || OpTy.isVector()) return Op;
2129 APInt DemandedElts = VT.isVector()
2219 APInt DemandedElts = VT.isVector()
2248 assert(VT.isVector() && "Vector type expected");
2327 assert(VT.isVector() && "Vector type expected");
2423 APInt DemandedElts = VT.isVector()
2456 assert((!Op.getValueType().isVector() ||
2637 assert(N0.getValueType().isVector() && "Expected bitcast from vector");
2660 assert(Op.getValueType().isVector() && "Expected bitcast to vector");
2783 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
3404 APInt DemandedElts = VT.isVector()
3510 assert(VT.isVector() && "Expected bitcast to vector");
3648 if (TLI->getBooleanContents(VT.isVector(), false) ==
4476 assert((!VT.isVector() ||
4499 assert(VT.isVector() == Operand.getValueType().isVector() &&
4499 assert(VT.isVector() == Operand.getValueType().isVector() &&
4503 assert((!VT.isVector() ||
4518 assert(VT.isVector() == Operand.getValueType().isVector() &&
4518 assert(VT.isVector() == Operand.getValueType().isVector() &&
4522 assert((!VT.isVector() ||
4537 assert(VT.isVector() == Operand.getValueType().isVector() &&
4537 assert(VT.isVector() == Operand.getValueType().isVector() &&
4541 assert((!VT.isVector() ||
4567 assert(VT.isVector() == Operand.getValueType().isVector() &&
4567 assert(VT.isVector() == Operand.getValueType().isVector() &&
4571 assert((!VT.isVector() ||
4595 assert(VT.isVector() && "This DAG node is restricted to vector types.");
4633 assert(VT.isVector() && !Operand.getValueType().isVector() &&
4633 assert(VT.isVector() && !Operand.getValueType().isVector() &&
4809 assert((!Folded || !VT.isVector()) &&
4896 if (!VT.isVector())
4902 return !Op.getValueType().isVector() ||
5148 assert((!VT.isVector() || VT == N2.getValueType()) &&
5179 assert(!EVT.isVector() &&
5191 assert(EVT.isVector() == VT.isVector() &&
5191 assert(EVT.isVector() == VT.isVector() &&
5194 assert((!EVT.isVector() ||
5300 assert(!N1.getValueType().isVector() && !VT.isVector() &&
5300 assert(!N1.getValueType().isVector() && !VT.isVector() &&
5321 assert(VT.isVector() && N1.getValueType().isVector() &&
5321 assert(VT.isVector() && N1.getValueType().isVector() &&
5483 assert(VT.isVector() == N1.getValueType().isVector() &&
5483 assert(VT.isVector() == N1.getValueType().isVector() &&
5485 assert((!VT.isVector() ||
5529 assert(VT.isVector() && N1.getValueType().isVector() &&
5529 assert(VT.isVector() && N1.getValueType().isVector() &&
5530 N2.getValueType().isVector() &&
5678 else if (VT.isVector()) {
5689 assert(!VT.isVector() && "Can't handle vector type here!");
5852 (isZeroConstant || (VT.isInteger() && !VT.isVector()))) {
6130 if (!LargestVT.isVector() && !VT.isVector() &&
6130 if (!LargestVT.isVector() && !VT.isVector() &&
6732 assert(VT.isVector() == MemVT.isVector() &&
6732 assert(VT.isVector() == MemVT.isVector() &&
6734 assert((!VT.isVector() ||
6905 assert(VT.isVector() == SVT.isVector() &&
6905 assert(VT.isVector() == SVT.isVector() &&
6907 assert((!VT.isVector() ||
9133 if (OperandVT.isVector()) {
9299 if (!VT.isVector())
9366 assert(VT.isVector() && "Expected a vector type");
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 205 if (ValueVT.isVector())
361 assert(ValueVT.isVector() && "Not a vector value");
415 (IntermediateVT.isVector()
418 Val = DAG.getNode(IntermediateVT.isVector() ? ISD::CONCAT_VECTORS
429 if (PartEVT.isVector()) {
506 if (ValueVT.isVector())
518 assert(!ValueVT.isVector() && "Vector case handled elsewhere");
632 if (!PartVT.isVector())
663 assert(ValueVT.isVector() && "Not a vector");
722 unsigned IntermediateNumElts = IntermediateVT.isVector() ?
741 if (IntermediateVT.isVector()) {
3262 ISD::NodeType OpCode = Cond.getValueType().isVector() ?
3281 bool UseScalarMinMax = VT.isVector() &&
3850 if (VectorWidth && !N.getValueType().isVector()) {
3909 if (!IdxN.getValueType().isVector() && VectorWidth) {
4376 if (!Index.getValueType().isVector()) {
6280 if (VT.isVector())
6535 if (ResultVT.isVector())
9210 if (Args[i].IsReturned && !Op.getValueType().isVector() &&
lib/CodeGen/SelectionDAG/TargetLowering.cpp 226 if (VT.isVector() || VT.isFloatingPoint()) {
522 if (Op.getValueType().isVector())
575 APInt DemandedElts = VT.isVector()
615 if (SrcVT.isVector() && (NumDstEltBits % NumSrcEltBits) == 0 &&
641 unsigned NumSrcElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
762 assert((!Op.getValueType().isVector() ||
1556 if (TLO.LegalTypes() && !ShiftAmtTy.isVector())
1625 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
1658 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
1706 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
1833 if (!TLO.LegalOperations() && !VT.isVector() && !SrcVT.isVector() &&
1833 if (!TLO.LegalOperations() && !VT.isVector() && !SrcVT.isVector() &&
1858 if (SrcVT.isVector() && (BitWidth % NumSrcEltBits) == 0 &&
1887 unsigned NumSrcElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
1897 if (SrcVT.isVector()) {
2041 assert(DAG.getTargetLoweringInfo().isBinOp(BO.getOpcode()) && VT.isVector() &&
2090 assert(VT.isVector() && "Expected vector op");
2134 if (!SrcVT.isVector())
3505 if (!VT.isVector()) { // TODO: Support this for vectors.
3526 if (!VT.isVector()) { // TODO: Support this for vectors.
3545 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) {
3563 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) {
3587 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) {
4599 if (VT.isVector()) {
4694 if (VT.isVector()) {
4812 if (VT.isVector()) {
4854 if (VT.isVector())
5026 if (VT.isVector()) {
5229 if (VT.isVector()) {
5294 assert(VT.isVector() && "Can/should only get here for vectors.");
5659 if (!VT.isVector() && Opcode == ISD::MUL && LHSSB > InnerBitSize &&
5789 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::SHL, VT) ||
5854 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::SHL, VT) ||
5964 if (DstVT.isVector() && (!isOperationLegalOrCustom(SIntOpcode, DstVT) ||
6049 if (SrcVT.isVector() &&
6086 if (SrcVT.isVector() &&
6173 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::ADD, VT) ||
6247 if (VT.isVector() && (!isPowerOf2_32(NumBitsPerElt) ||
6299 if (VT.isVector() && (!isPowerOf2_32(NumBitsPerElt) ||
6335 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::SRA, VT) ||
6471 if (VT.isFloatingPoint() || VT.isVector()) {
6475 LoadedVT.isVector()) {
6560 assert(LoadedVT.isInteger() && !LoadedVT.isVector() &&
6628 if (StoreMemVT.isFloatingPoint() || StoreMemVT.isVector()) {
6632 StoreMemVT.isVector()) {
6709 assert(StoreMemVT.isInteger() && !StoreMemVT.isVector() &&
7030 } else if (VT.isVector()) {
7199 if (VT.isVector())
7225 if (VT.isVector())
lib/CodeGen/TargetLoweringBase.cpp 800 if (LHSTy.isVector())
849 if (!VT.isVector()) {
1378 assert(!VT.isVector() && "No default SetCC type for vectors!");
1833 std::string Name = VT.isVector() ? "vec-" : "";
lib/CodeGen/ValueTypes.cpp 117 if (isVector())
lib/Target/AArch64/AArch64FastISel.cpp 3902 if (RVEVT.isVector() && RVEVT.getVectorNumElements() > 1 &&
lib/Target/AArch64/AArch64ISelLowering.cpp 908 if (!VT.isVector())
1018 if (VT.isVector())
2476 if (Op.getOperand(0).getValueType().isVector())
2534 if (Op.getValueType().isVector())
2836 } else if (Ty.isVector() && Ty.isInteger() && isTypeLegal(Ty)) {
2900 assert(VT.isVector() && "VT should be a vector type");
2942 assert (VT.isVector() && "Can only custom lower vector store types");
4830 if (!VT.isVector()) {
4945 if (Op.getValueType().isVector())
5473 if (VT.isInteger() && !VT.isVector())
5476 if (VT.isFloatingPoint() && !VT.isVector() && VT != MVT::f64) {
5802 Estimate = DAG.getNode(VT.isVector() ? ISD::VSELECT : ISD::SELECT, DL,
5881 if (ConstraintVT.isVector() &&
7366 if (!VT.isVector())
7899 if (!VT.isVector())
7983 assert(VT.isVector() && "vector shift count is not a vector type");
7994 assert(VT.isVector() && "vector shift count is not a vector type");
8007 if (!Op.getOperand(1).getValueType().isVector())
8502 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger())
8502 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger())
8546 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger())
8546 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger())
8563 return (VT1.isSimple() && !VT1.isVector() && VT1.isInteger() &&
8564 VT2.isSimple() && !VT2.isVector() && VT2.isInteger() &&
9272 if (!Subtarget->hasNEON() || !VT.isVector())
9489 if (!VT.isVector() || N->getOperand(0)->getOpcode() != ISD::AND ||
9572 if (!Op.getValueType().isVector() || !Op.getValueType().isSimple() ||
9645 if (!Op.getValueType().isVector() || !Op.getValueType().isSimple() ||
9774 if (!VT.isVector())
9838 if (!VT.isVector() || !DAG.getTargetLoweringInfo().isTypeLegal(VT))
9918 if (!VT.isVector())
9947 if (!SVT.isVector() ||
10580 if (!ResVT.isVector() || TLI.isTypeLegal(ResVT))
10805 if (!VT.isVector())
11620 if (!ResVT.isVector() || NumMaskElts == 0)
12425 return OptSize && !VT.isVector();
lib/Target/AArch64/AArch64ISelLowering.h 498 if (!VT.isVector())
514 if (XVT.isVector())
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 962 } else if (ArgVT.isVector() && RegisterVT.isVector() &&
969 } else if (ArgVT.isVector() &&
997 if (MemVT.isVector() && MemVT.getVectorNumElements() == 1)
1001 if (MemVT.isVector() && !MemVT.isPow2VectorType()) {
1386 (HiVT.isVector() ? HiVT.getVectorNumElements() : 1) <=
1393 HiVT.isVector() ? ISD::EXTRACT_SUBVECTOR : ISD::EXTRACT_VECTOR_ELT, DL,
1444 Join = DAG.getNode(HiVT.isVector() ? ISD::INSERT_SUBVECTOR
2833 if ((Size == 1 || Size == 2 || Size == 4) && !VT.isVector())
2868 if (VT.isVector())
2921 if (VT.isVector())
3173 if (Src.getOpcode() == ISD::BITCAST && !VT.isVector()) {
3192 if (Src.getOpcode() == ISD::SRL && !VT.isVector()) {
3226 EVT MidVT = VT.isVector() ?
3279 if (VT.isVector() || Size > 64)
3325 if (!Subtarget->hasMulI24() || VT.isVector())
3349 if (!Subtarget->hasMulU24() || VT.isVector() || VT.getSizeInBits() > 32)
3886 if (DestVT.isVector()) {
3907 if (DestVT.getSizeInBits() != 64 && !DestVT.isVector())
3984 assert(!N->getValueType(0).isVector() &&
lib/Target/AMDGPU/R600ISelLowering.cpp 1248 VT.isVector()) {
1459 VT.isVector()) {
1483 if (!VT.isVector()) {
1504 assert(!MemVT.isVector() && (MemVT == MVT::i16 || MemVT == MVT::i8));
1599 if (!VT.isVector() && MemVT.isVector()) {
1599 if (!VT.isVector() && MemVT.isVector()) {
1654 if (!VT.isVector())
1831 if (VT.isVector()) {
1836 if (!VT.isVector()) {
2110 if (ParentNode->getValueType(0).isVector())
lib/Target/AMDGPU/SIISelLowering.cpp 784 if (VT.isVector()) {
807 if (VT.isVector()) {
830 if (CC != CallingConv::AMDGPU_KERNEL && VT.isVector()) {
1431 if (VT.isVector() &&
3889 if (!VT.isVector()) {
4089 if (!LoadVT.isVector())
4124 if (Unpacked && LoadVT.isVector()) {
4125 EquivLoadVT = LoadVT.isVector() ?
4164 if (!IsD16 && !LoadVT.isVector() && EltType.getSizeInBits() < 32)
5225 EVT ReqRetEltVT = ReqRetVT.isVector() ? ReqRetVT.getVectorElementType() : ReqRetVT;
5226 int ReqRetNumElts = ReqRetVT.isVector() ? ReqRetVT.getVectorNumElements() : 1;
5260 if (CastVT.isVector()) {
6745 if (!StoreVT.isVector())
6990 if (!IsD16 && !VDataVT.isVector() && EltType.getSizeInBits() < 32)
7037 if (!IsD16 && !VDataVT.isVector() && EltType.getSizeInBits() < 32)
7068 unsigned Opcode = VT.isVector() ? AMDGPUISD::BUFFER_ATOMIC_PK_FADD
7084 unsigned Opcode = VT.isVector() ? AMDGPUISD::ATOMIC_PK_FADD
7272 assert((!MemVT.isVector() || Ld->getExtensionType() == ISD::NON_EXTLOAD) &&
7342 if (!MemVT.isVector()) {
7367 if (!MemVT.isVector())
7872 assert(VT.isVector() &&
9128 !VT.isVector() &&
9490 !VT.isVector() && VT.getScalarSizeInBits() > 32 &&
9655 assert(!VT.isVector());
lib/Target/ARM/ARMCallLowering.cpp 71 if (!VT.isSimple() || VT.isVector() ||
lib/Target/ARM/ARMISelDAGToDAG.cpp 1632 if (!LoadedVT.isVector())
lib/Target/ARM/ARMISelLowering.cpp 1679 if (!VT.isVector())
1737 if (VT.isFloatingPoint() || VT.isVector())
5361 if (VT.isVector())
5426 if (VT.isVector())
5619 if (!DstVT.isVector() || Op.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
5757 if (DAG.getDataLayout().isBigEndian() && SrcVT.isVector() &&
5779 assert(VT.isVector() && "Expected a vector type");
5893 if (VT.isVector() && ST->hasNEON()) {
6003 assert(VT.isVector() && "vector shift count is not a vector type");
6018 assert(VT.isVector() && "vector shift count is not a vector type");
6037 if (!VT.isVector())
8856 if (N->getOperand(0).getValueType().isVector())
9202 if (Subtarget->isTargetWindows() && !Op.getValueType().isVector())
9206 if (Subtarget->isTargetWindows() && !Op.getValueType().isVector())
12360 if (Subtarget->hasNEON() && N1.getOpcode() == ISD::AND && VT.isVector() &&
13243 if (ISD::isNormalLoad(N) && VT.isVector() &&
13257 if (!St->isTruncatingStore() || !VT.isVector())
13347 if (!ToVT.isVector())
13458 if (Subtarget->hasNEON() && ISD::isNormalStore(N) && VT.isVector() &&
13480 if (!Op.getValueType().isVector() || !Op.getValueType().isSimple() ||
13538 if (!N->getValueType(0).isVector() || !N->getValueType(0).isSimple() ||
13795 if (!VT.isVector() || !TLI.isTypeLegal(VT))
13839 if (!ToVT.isVector())
14684 if (SrcVT.isVector() || DstVT.isVector() || !SrcVT.isInteger() ||
14684 if (SrcVT.isVector() || DstVT.isVector() || !SrcVT.isInteger() ||
14891 if (VT.isVector() && Subtarget->hasNEON())
14893 if (VT.isVector() && VT.isFloatingPoint() && Subtarget->hasMVEIntegerOps() &&
14906 if (VT.isVector() && Subtarget->hasMVEIntegerOps()) {
15282 if (VT.isVector())
15346 if (VT.isVector())
15445 assert(VecVT.isVector() && "VGETLANE expected a vector type");
15487 if (VT.isVector())
15602 if (ConstraintVT.isVector() && Subtarget->hasNEON() &&
lib/Target/ARM/ARMTargetTransformInfo.cpp 202 if (SrcTy.isVector() && ST->hasMVEIntegerOps()) {
288 if (SrcTy.isVector() && ST->hasNEON()) {
374 if (SrcTy.isVector() && ST->hasMVEIntegerOps()) {
lib/Target/AVR/AVRISelLowering.cpp 274 assert(!VT.isVector() && "No AVR SetCC type for vectors!");
lib/Target/Hexagon/HexagonISelLowering.h 255 if (!VT.isVector())
lib/Target/Mips/MipsCCState.cpp 55 if (Ty.isVector() && Ty.getVectorElementType().isFloatingPoint())
lib/Target/Mips/MipsFastISel.cpp 1740 if (RVEVT.isVector())
lib/Target/Mips/MipsISelDAGToDAG.cpp 227 assert(VT.isVector() && "Should only be called for vectors.");
lib/Target/Mips/MipsISelLowering.cpp 114 if (VT.isVector()) {
127 if (VT.isVector())
562 if (!VT.isVector())
971 if (ROOTNode->getValueType(0).isVector())
1193 if (N->getOperand(0).getValueType().isVector())
lib/Target/Mips/MipsSEISelLowering.cpp 835 if (!VT.isVector() && shouldTransformMulToShiftsAddsSubs(
2520 assert(ResTy.isVector());
lib/Target/NVPTX/NVPTXAsmPrinter.cpp 380 if (vtparts[i].isVector()) {
1591 if (vtparts[i].isVector()) {
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 1269 if (EltVT.isVector()) {
lib/Target/NVPTX/NVPTXISelLowering.cpp 200 if (VT.isVector()) {
2280 if (VT.isVector())
2293 if (ValVT.isVector()) {
4349 if (VT.isVector())
4784 assert(ResVT.isVector() && "Vector load must have vector type");
4928 if (ResVT.isVector()) {
lib/Target/NVPTX/NVPTXISelLowering.h 473 if (VT.isVector())
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 4103 if (LHS.getValueType().isVector()) {
lib/Target/PowerPC/PPCISelLowering.cpp 1425 if (!VT.isVector())
2574 if (VT.isVector()) {
7107 if (Op.getValueType().isVector())
7132 if (Op.getOperand(1).getValueType().isVector())
7185 assert(Op.getValueType().isVector() && "Vector type expected.");
7633 assert(VecVT.isVector() && "Expected a vector type.");
7703 if (OutVT.isVector() && OutVT.isFloatingPoint() &&
10001 assert(VT.isVector() &&
10243 if (TrgVT.isVector() &&
13625 if (LD->isUnindexed() && VT.isVector() &&
15123 if (VT.isVector() && TLI.isOperationLegal(Opcode, VT) &&
15355 return IsAddOne && IsNeg ? VT.isVector() : true;
lib/Target/PowerPC/PPCTargetTransformInfo.cpp 423 else if (EVTy.isVector() &&
lib/Target/RISCV/RISCVISelLowering.cpp 219 if (!VT.isVector())
298 if (Subtarget.is64Bit() || SrcVT.isVector() || DstVT.isVector() ||
298 if (Subtarget.is64Bit() || SrcVT.isVector() || DstVT.isVector() ||
lib/Target/Sparc/SparcISelLowering.cpp 1847 if (!VT.isVector())
lib/Target/SystemZ/SystemZCallingConv.h 36 return ArgVT.isVector() && ArgVT.getStoreSize() <= 8;
lib/Target/SystemZ/SystemZISelLowering.cpp 641 if (!VT.isVector())
1223 if (ArgVT.isVector() && !VT.isVector())
2743 if (VT.isVector())
3553 if (VT.isVector()) {
5258 return VT.isVector() && VT.getScalarSizeInBits() % 8 == 0 && VT.isSimple();
5523 if (LdVT.isVector() || LdVT.isInteger())
5569 if (!VT.isVector() || !VT.isSimple() ||
5694 Op.getValueType().isVector() &&
5695 Op.getOperand(0).getValueType().isVector() &&
5880 Op.getValueType().isVector() &&
5881 Op.getOperand(0).getValueType().isVector() &&
6142 if (DCI.Level == BeforeLegalizeTypes && VT.isVector() && isTypeLegal(VT) &&
6188 unsigned NumElts = (VT.isVector() ? VT.getVectorNumElements() : 1);
6315 assert ((!VT.isVector() ||
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 564 if (VT.isVector())
lib/Target/X86/X86ISelDAGToDAG.cpp 833 if (!N->getValueType(0).isVector())
855 if (!N->getValueType(0).isVector() ||
3639 if (VT.isVector())
3846 assert(VT.isVector() && "Should only be called for vectors.");
lib/Target/X86/X86ISelLowering.cpp 1943 if (VT.isVector() && VT.getVectorElementType() == MVT::i1 &&
1963 if (VT.isVector() && VT.getVectorElementType() == MVT::i1 &&
1980 if (VT.isVector() && VT.getVectorElementType() == MVT::i1 &&
1998 if (!VT.isVector())
2160 if (!!(Flags & MachineMemOperand::MONonTemporal) && VT.isVector()) {
2512 if (ValVT.isVector() && ValVT.getVectorElementType() == MVT::i1)
3289 if (RegVT.isVector() && VA.getValVT().getScalarType() != MVT::i1)
3777 if (Arg.getValueType().isVector() &&
4917 if (VT.isVector() && Subtarget.hasAVX512())
4993 if (VT.isVector())
5011 if (!Subtarget.hasAVX512() && !LoadVT.isVector() && BitcastVT.isVector() &&
5011 if (!Subtarget.hasAVX512() && !LoadVT.isVector() && BitcastVT.isVector() &&
5019 if (LoadVT.isVector() && BitcastVT.isVector() &&
5019 if (LoadVT.isVector() && BitcastVT.isVector() &&
5056 if (VT.isVector())
5072 if (!VT.isVector())
5121 if ((Subtarget.hasFastVectorShiftMasks() && VT.isVector()) ||
5122 (Subtarget.hasFastScalarShiftMasks() && !VT.isVector())) {
5135 if (VT.isVector())
5841 assert(VT.isVector() && InVT.isVector() && "Expected vector VTs.");
5841 assert(VT.isVector() && InVT.isVector() && "Expected vector VTs.");
6946 if (!N0.getValueType().isVector() || !N1.getValueType().isVector())
6946 if (!N0.getValueType().isVector() || !N1.getValueType().isVector())
7287 if (!VT.isSimple() || !VT.isVector())
7308 if (!VT.isSimple() || !VT.isVector())
7395 if (!SrcVT.isVector() || SrcVT.getVectorNumElements() != NumElems)
7940 if (!isAfterLegalize && VT.isVector()) {
8319 assert(!CVT.isVector() && "Must not broadcast a vector type");
8601 assert(VT.isVector() && VT.getVectorNumElements() >= LastIdx &&
12371 assert(V0VT.isVector() && "Unexpected non-vector vector-sized value!");
12636 if (Opcode == X86ISD::MOVDDUP && !V.getValueType().isVector())
12645 if (V.getValueType().isVector()) {
19189 assert(DstVT.isVector() && "VT not a vector?");
20222 if (VT.isVector())
21837 if (StoredVal.getValueType().isVector() &&
27942 if (VT.isVector()) {
28123 if (VT.isVector() && VT.getScalarSizeInBits() < 32) {
28181 assert(!VT.isVector() && "Vectors should have been handled above!");
28456 SrcVT.isVector() && isTypeLegal(SrcVT)) {
28467 if (DstVT.isVector() && SrcVT == MVT::x86mmx) {
31434 if (VT.isVector())
33514 if (!SrcVT.isVector() && (Src.hasOneUse() || VT.isFloatingPoint()) &&
34656 !V.getValueType().isVector();
35083 if (!CurrentVT.isVector())
35357 if (!(SrcVT.isVector() && SrcVT.getVectorElementType() == MVT::i1 &&
35359 !(DstVT.isVector() && DstVT.getVectorElementType() == MVT::i1 &&
35633 SrcVT.isVector() && SrcVT.getVectorElementType() == MVT::i1 &&
35639 VT.isVector() && VT.getVectorElementType() == MVT::i1 &&
36531 assert(CondVT.isVector() && "Vector select expects a vector selector!");
37010 if (Subtarget.hasAVX512() && !Subtarget.hasBWI() && CondVT.isVector() &&
37022 if (Subtarget.hasAVX512() && CondVT.isVector() &&
38029 if (!VT.isVector() || VT.getVectorElementType() != MVT::i32)
38074 if (!VT.isVector() || VT.getVectorElementType() != MVT::i64 ||
38121 if (DCI.isBeforeLegalize() && VT.isVector())
38260 if (VT.isInteger() && !VT.isVector() &&
38300 assert(N0.getValueType().isVector() && "Invalid vector shift type");
38328 if (VT.isVector() || N1.getOpcode() != ISD::Constant ||
38786 assert(VT.isVector() && "Expected vector type");
39122 assert(!VT.isVector() && "Expected scalar VT!");
39132 if (!SrcVT.isVector() || SrcVT.getVectorElementType() != MVT::i1 ||
39240 if (VT.isVector() && (VT.getScalarSizeInBits() % 8) == 0) {
39639 if (VT.isVector() && (VT.getScalarSizeInBits() % 8) == 0) {
39964 if (!Subtarget.hasSSE2() || !VT.isVector())
40026 if (TLI.isTypeLegal(InVT) && InVT.isVector() && SVT != MVT::i1 &&
40069 if (!VT.isVector())
40248 if (Ext == ISD::NON_EXTLOAD && !Subtarget.hasAVX512() && RegVT.isVector() &&
40500 if (!Subtarget.hasAVX512() && VT == StVT && VT.isVector() &&
40627 if (St->isTruncatingStore() && VT.isVector()) {
40679 if (!VT.isVector() && !Ld->hasNUsesOfValue(1, 0))
40978 if (!VT.isVector())
41064 if (!OutVT.isVector())
41115 if (!N->getValueType(0).isVector() || !N->getValueType(0).isSimple())
41181 if (!VT.isVector() || VT.getVectorElementType() != MVT::i16)
41226 if (!VT.isVector() || !Subtarget.hasSSSE3())
41804 if (V.getValueType().isVector())
41922 (VT.isVector() && TLI.isTypeLegal(VT))))
41944 if (!VT.isVector() && DAG.getMachineFunction().getFunction().hasMinSize())
42341 if (!VT.isVector())
42416 if (!Subtarget.hasAVX512() || !VT.isVector() || N0.getOpcode() != ISD::SETCC)
42480 if (VT.isVector())
42621 if (VT.isVector())
42676 return isa<ConstantSDNode>(X) || X.getValueType().isVector() ||
42844 if (VT.isVector() && VT.getVectorElementType() == MVT::i1 &&
42878 if (Subtarget.hasAVX512() && !Subtarget.hasBWI() && VT.isVector() &&
43115 if (!VT.isVector() || N->getOperand(0)->getOpcode() != ISD::AND ||
43190 if (InVT.isVector() && InVT.getScalarSizeInBits() < 32) {
43225 if (InVT.isVector() && InVT.getScalarSizeInBits() < 32) {
43241 if (InVT.isVector())
43275 if (Ld->isSimple() && !VT.isVector() &&
43700 if (!VT.isVector() || VT.getVectorNumElements() < 8)
43764 if (!VT.isVector() || !VT.isSimple() ||
43850 if (!VT.isVector() || VT.getVectorElementType() != MVT::i32 ||
43950 if (!VT.isVector() || VT.getVectorElementType() != MVT::i32 ||
44096 if (VT.isVector()) {
44124 if (!VT.isVector())
44645 if (InVec != InVecBC && InVecBCVT.isVector()) {
44766 Src.hasOneUse() && Src.getOperand(0).getValueType().isVector() &&
45044 if (Opc == ISD::SHL && VT.isVector() && VT.getVectorElementType() == MVT::i8)
46161 return OptSize && !VT.isVector();
lib/Target/X86/X86ISelLowering.h 826 return !MemVT.isVector();
839 return VT == MVT::f32 || VT == MVT::f64 || VT.isVector();
880 if (XVT.isVector())