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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Overridden By
gen/lib/Target/AArch64/AArch64GenSubtargetInfo.inc17998 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/AMDGPU/AMDGPUGenSubtargetInfo.inc 812 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/AMDGPU/R600GenSubtargetInfo.inc 339 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/ARC/ARCGenSubtargetInfo.inc 162 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/ARM/ARMGenSubtargetInfo.inc19601 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/AVR/AVRGenSubtargetInfo.inc 563 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/BPF/BPFGenSubtargetInfo.inc 185 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/Hexagon/HexagonGenSubtargetInfo.inc 4713 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/Lanai/LanaiGenSubtargetInfo.inc 246 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/MSP430/MSP430GenSubtargetInfo.inc 186 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/Mips/MipsGenSubtargetInfo.inc 3889 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc 261 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/PowerPC/PPCGenSubtargetInfo.inc 8241 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/RISCV/RISCVGenSubtargetInfo.inc 300 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/Sparc/SparcGenSubtargetInfo.inc 558 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/SystemZ/SystemZGenSubtargetInfo.inc 5200 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/WebAssembly/WebAssemblyGenSubtargetInfo.inc 204 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/X86/X86GenSubtargetInfo.inc21526 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
gen/lib/Target/XCore/XCoreGenSubtargetInfo.inc 163 ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
References
lib/CodeGen/TargetSchedule.cpp 146 SchedClass = STI->resolveSchedClass(SchedClass, MI, this);