reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Derived Classes

gen/lib/Target/AArch64/AArch64GenSubtargetInfo.inc
17969 struct AArch64GenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/AMDGPU/AMDGPUGenSubtargetInfo.inc
  783 struct AMDGPUGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/AMDGPU/R600GenSubtargetInfo.inc
  307 struct R600GenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/ARC/ARCGenSubtargetInfo.inc
  133 struct ARCGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/ARM/ARMGenSubtargetInfo.inc
19569 struct ARMGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/AVR/AVRGenSubtargetInfo.inc
  534 struct AVRGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/BPF/BPFGenSubtargetInfo.inc
  156 struct BPFGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/Hexagon/HexagonGenSubtargetInfo.inc
 4680 struct HexagonGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/Lanai/LanaiGenSubtargetInfo.inc
  214 struct LanaiGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/MSP430/MSP430GenSubtargetInfo.inc
  157 struct MSP430GenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/Mips/MipsGenSubtargetInfo.inc
 3860 struct MipsGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc
  232 struct NVPTXGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/PowerPC/PPCGenSubtargetInfo.inc
 8209 struct PPCGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/RISCV/RISCVGenSubtargetInfo.inc
  270 struct RISCVGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/Sparc/SparcGenSubtargetInfo.inc
  526 struct SparcGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/SystemZ/SystemZGenSubtargetInfo.inc
 5171 struct SystemZGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/WebAssembly/WebAssemblyGenSubtargetInfo.inc
  175 struct WebAssemblyGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/X86/X86GenSubtargetInfo.inc
21494 struct X86GenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/XCore/XCoreGenSubtargetInfo.inc
  134 struct XCoreGenSubtargetInfo : public TargetSubtargetInfo {
unittests/CodeGen/MachineInstrTest.cpp
  102 class BogusSubtarget : public TargetSubtargetInfo {

Declarations

include/llvm/CodeGen/MIRParser/MIParser.h
   32 class TargetSubtargetInfo;
include/llvm/CodeGen/MachineFunction.h
   72 class TargetSubtargetInfo;
include/llvm/CodeGen/MacroFusion.h
   25 class TargetSubtargetInfo;
include/llvm/CodeGen/SelectionDAG.h
   81 class TargetSubtargetInfo;
include/llvm/CodeGen/TargetInstrInfo.h
   61 class TargetSubtargetInfo;
include/llvm/Target/TargetMachine.h
   47 class TargetSubtargetInfo;

References

gen/lib/Target/AArch64/AArch64GenSubtargetInfo.inc
17969 struct AArch64GenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/AMDGPU/AMDGPUGenSubtargetInfo.inc
  783 struct AMDGPUGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/AMDGPU/R600GenSubtargetInfo.inc
  307 struct R600GenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/ARC/ARCGenSubtargetInfo.inc
  133 struct ARCGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/ARM/ARMGenSubtargetInfo.inc
19569 struct ARMGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/AVR/AVRGenSubtargetInfo.inc
  534 struct AVRGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/BPF/BPFGenSubtargetInfo.inc
  156 struct BPFGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/Hexagon/HexagonGenSubtargetInfo.inc
 4680 struct HexagonGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/Lanai/LanaiGenSubtargetInfo.inc
  214 struct LanaiGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/MSP430/MSP430GenSubtargetInfo.inc
  157 struct MSP430GenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/Mips/MipsGenSubtargetInfo.inc
 3860 struct MipsGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc
  232 struct NVPTXGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/PowerPC/PPCGenSubtargetInfo.inc
 8209 struct PPCGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/RISCV/RISCVGenSubtargetInfo.inc
  270 struct RISCVGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/Sparc/SparcGenSubtargetInfo.inc
  526 struct SparcGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/SystemZ/SystemZGenSubtargetInfo.inc
 5171 struct SystemZGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/WebAssembly/WebAssemblyGenSubtargetInfo.inc
  175 struct WebAssemblyGenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/X86/X86GenSubtargetInfo.inc
21494 struct X86GenSubtargetInfo : public TargetSubtargetInfo {
gen/lib/Target/XCore/XCoreGenSubtargetInfo.inc
  134 struct XCoreGenSubtargetInfo : public TargetSubtargetInfo {
include/llvm/CodeGen/BasicTTIImpl.h
  165   const TargetSubtargetInfo *getST() const {
  465     const TargetSubtargetInfo *ST = getST();
 1724   const TargetSubtargetInfo *ST;
 1727   const TargetSubtargetInfo *getST() const { return ST; }
include/llvm/CodeGen/MIRParser/MIParser.h
   52   const TargetSubtargetInfo &Subtarget;
  148   PerTargetMIParsingState(const TargetSubtargetInfo &STI)
  156   void setTarget(const TargetSubtargetInfo &NewSubtarget);
include/llvm/CodeGen/MachineFunction.h
  226   const TargetSubtargetInfo *STI;
  425                   const TargetSubtargetInfo &STI, unsigned FunctionNum,
  476   const TargetSubtargetInfo &getSubtarget() const { return *STI; }
  481   template<typename STC> const STC &getSubtarget() const {
include/llvm/CodeGen/MachinePipeliner.h
  442   ResourceManager(const TargetSubtargetInfo *ST)
  500   const TargetSubtargetInfo &ST;
include/llvm/CodeGen/MacroFusion.h
   31                                                 const TargetSubtargetInfo &TSI,
include/llvm/CodeGen/ModuloSchedule.h
  164   const TargetSubtargetInfo &ST;
  276   const TargetSubtargetInfo &ST;
include/llvm/CodeGen/SelectionDAG.h
  419   const TargetSubtargetInfo &getSubtarget() const { return MF->getSubtarget(); }
include/llvm/CodeGen/TargetInstrInfo.h
 1334     const TargetSubtargetInfo *STI = nullptr) const;
 1339   CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
 1606   CreateTargetScheduleState(const TargetSubtargetInfo &) const {
include/llvm/CodeGen/TargetSchedule.h
   36   const TargetSubtargetInfo *STI = nullptr;
   53   void init(const TargetSubtargetInfo *TSInfo);
   59   const TargetSubtargetInfo *getSubtargetInfo() const { return STI; }
include/llvm/CodeGen/TargetSubtargetInfo.h
   79   TargetSubtargetInfo(const TargetSubtargetInfo &) = delete;
   80   TargetSubtargetInfo &operator=(const TargetSubtargetInfo &) = delete;
   80   TargetSubtargetInfo &operator=(const TargetSubtargetInfo &) = delete;
include/llvm/Target/TargetMachine.h
  117   virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
  148   template <typename STC> const STC &getSubtarget(const Function &F) const {
lib/CodeGen/AggressiveAntiDepBreaker.cpp
  127     TargetSubtargetInfo::RegClassVector &CriticalPathRCs)
lib/CodeGen/AggressiveAntiDepBreaker.h
  134                           TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
 1145   const TargetSubtargetInfo &TSI = MF.getSubtarget();
 1329   const TargetSubtargetInfo &TSI = MF->getSubtarget();
lib/CodeGen/BranchRelaxation.cpp
  546   const TargetSubtargetInfo &ST = MF->getSubtarget();
lib/CodeGen/CodeGenPrepare.cpp
  246     const TargetSubtargetInfo *SubtargetInfo;
lib/CodeGen/EarlyIfConversion.cpp
  905   const TargetSubtargetInfo &STI = MF.getSubtarget();
 1039   const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
  166   const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/CodeGen/IfConversion.cpp
  441   const TargetSubtargetInfo &ST = MF.getSubtarget();
lib/CodeGen/MIRParser/MIParser.cpp
   86   const TargetSubtargetInfo &NewSubtarget) {
lib/CodeGen/MIRPrinter.cpp
  708   const auto &SubTarget = MF->getSubtarget();
lib/CodeGen/MachineCombiner.cpp
   61   const TargetSubtargetInfo *STI;
lib/CodeGen/MachineFunction.cpp
  127 static inline unsigned getFnStackAlignment(const TargetSubtargetInfo *STI,
  136                                  const TargetSubtargetInfo &STI,
lib/CodeGen/MachineLICM.cpp
  309   const TargetSubtargetInfo &ST = MF.getSubtarget();
lib/CodeGen/MachineOutliner.cpp
 1132   const TargetSubtargetInfo &STI = MF.getSubtarget();
 1225     const TargetSubtargetInfo &STI = MF->getSubtarget();
lib/CodeGen/MachinePipeliner.cpp
  757   const TargetSubtargetInfo &ST = MF.getSubtarget<TargetSubtargetInfo>();
  757   const TargetSubtargetInfo &ST = MF.getSubtarget<TargetSubtargetInfo>();
  910   FuncUnitSorter(const TargetSubtargetInfo &TSI)
lib/CodeGen/MachineTraceMetrics.cpp
   67   const TargetSubtargetInfo &ST = MF->getSubtarget();
lib/CodeGen/MacroFusion.cpp
  148   const TargetSubtargetInfo &ST = DAG.MF.getSubtarget();
lib/CodeGen/PostRASchedulerList.cpp
  107         const TargetSubtargetInfo &ST, CodeGenOpt::Level OptLevel,
  108         TargetSubtargetInfo::AntiDepBreakMode &Mode,
  109         TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const;
  149         TargetSubtargetInfo::AntiDepBreakMode AntiDepMode,
  208     TargetSubtargetInfo::AntiDepBreakMode AntiDepMode,
  223     ((AntiDepMode == TargetSubtargetInfo::ANTIDEP_ALL) ?
  225      ((AntiDepMode == TargetSubtargetInfo::ANTIDEP_CRITICAL) ?
  266     const TargetSubtargetInfo &ST,
  268     TargetSubtargetInfo::AntiDepBreakMode &Mode,
  269     TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const {
  292   TargetSubtargetInfo::AntiDepBreakMode AntiDepMode =
  293     TargetSubtargetInfo::ANTIDEP_NONE;
  305       ? TargetSubtargetInfo::ANTIDEP_ALL
  307          ? TargetSubtargetInfo::ANTIDEP_CRITICAL
  308          : TargetSubtargetInfo::ANTIDEP_NONE);
lib/CodeGen/PrologEpilogInserter.cpp
 1132   const auto &ST = MF.getSubtarget();
lib/CodeGen/RegAllocFast.cpp
 1296   const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/CodeGen/RegAllocPBQP.cpp
  825     const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
lib/CodeGen/RegisterCoalescer.cpp
 3679   const TargetSubtargetInfo &STI = fn.getSubtarget();
lib/CodeGen/RegisterScavenging.cpp
  794     const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/CodeGen/RegisterUsageInfo.cpp
   92         = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first))
lib/CodeGen/ScheduleDAGInstrs.cpp
  119   const TargetSubtargetInfo &ST = mf.getSubtarget();
  234   const TargetSubtargetInfo &ST = MF.getSubtarget();
  426     const TargetSubtargetInfo &ST = MF.getSubtarget();
  726   const TargetSubtargetInfo &ST = MF.getSubtarget();
lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
   45   const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
  195     const TargetSubtargetInfo &STI = mf.getSubtarget();
 3134   const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
 3148   const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
 3162   const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
 3178   const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
  437   const TargetSubtargetInfo &ST = MF.getSubtarget();
lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
   73     const TargetSubtargetInfo &STI = mf.getSubtarget();
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  253     const TargetSubtargetInfo &ST = IS->MF->getSubtarget();
lib/CodeGen/ShrinkWrap.cpp
  197     const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
lib/CodeGen/TargetInstrInfo.cpp
   91   const MCAsmInfo &MAI, const TargetSubtargetInfo *STI) const {
 1011 CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
lib/CodeGen/TargetSchedule.cpp
   63 void TargetSchedModel::init(const TargetSubtargetInfo *TSInfo) {
lib/Target/AArch64/AArch64FrameLowering.cpp
  348   const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/Target/AArch64/AArch64InstrInfo.cpp
 5581     const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/Target/AArch64/AArch64MacroFusion.cpp
  376                                    const TargetSubtargetInfo &TSI,
lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  271   const TargetSubtargetInfo &STI = MF.getSubtarget();
  524   const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
  697   const TargetSubtargetInfo &ST = MF.getSubtarget();
lib/Target/AArch64/AArch64StorePairSuppress.cpp
  125   const TargetSubtargetInfo &ST = MF.getSubtarget();
lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
   43   const TargetSubtargetInfo &ST;
   50   AMDGPUMCInstLower(MCContext &ctx, const TargetSubtargetInfo &ST,
   75                                      const TargetSubtargetInfo &st,
lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
   29                                    const TargetSubtargetInfo &TSI,
lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
  380     const TargetSubtargetInfo *ST = TM.getSubtargetImpl(*F);
lib/Target/AMDGPU/AMDGPUSubtarget.h
  907   static bool hasHalfRate64Ops(const TargetSubtargetInfo &STI);
lib/Target/AMDGPU/AMDGPUTargetMachine.h
   49   const TargetSubtargetInfo *getSubtargetImpl() const;
   50   const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
   49   const TargetSubtargetInfo *ST;
   52   const TargetSubtargetInfo *getST() const { return ST; }
lib/Target/AMDGPU/R600InstrInfo.cpp
  636 R600InstrInfo::CreateTargetScheduleState(const TargetSubtargetInfo &STI) const {
lib/Target/AMDGPU/R600InstrInfo.h
  162   CreateTargetScheduleState(const TargetSubtargetInfo &) const override;
lib/Target/ARM/ARMBaseInstrInfo.cpp
  123 ARMBaseInstrInfo::CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
lib/Target/ARM/ARMBaseInstrInfo.h
  125   CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  978 static bool mayCombineMisaligned(const TargetSubtargetInfo &STI,
lib/Target/ARM/ARMMacroFusion.cpp
   52                                    const TargetSubtargetInfo &TSI,
lib/Target/Hexagon/HexagonInstrInfo.cpp
 1726                                               const TargetSubtargetInfo *STI) const {
 1859     const TargetSubtargetInfo &STI) const {
lib/Target/Hexagon/HexagonInstrInfo.h
  259     const TargetSubtargetInfo *STI = nullptr) const override;
  283   CreateTargetScheduleState(const TargetSubtargetInfo &STI) const override;
lib/Target/Hexagon/HexagonMachineScheduler.cpp
  263   const TargetSubtargetInfo &STI = DAG->MF.getSubtarget();
lib/Target/Hexagon/HexagonMachineScheduler.h
   51   VLIWResourceModel(const TargetSubtargetInfo &STI, const TargetSchedModel *SM)
lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
   51   const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/Target/PowerPC/PPCInstrInfo.cpp
  108 PPCInstrInfo::CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
lib/Target/PowerPC/PPCInstrInfo.h
  202   CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
lib/Target/PowerPC/PPCSubtarget.cpp
  202   return TargetSubtargetInfo::ANTIDEP_ALL;
lib/Target/SystemZ/SystemZMachineScheduler.cpp
  134   const TargetSubtargetInfo *ST = &C->MF->getSubtarget();
lib/Target/X86/X86CmovConversion.cpp
  168   const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/Target/X86/X86MacroFusion.cpp
  181                                    const TargetSubtargetInfo &TSI,
lib/Target/X86/X86RegisterBankInfo.cpp
  280   const TargetSubtargetInfo &STI = MF.getSubtarget();
lib/Target/X86/X86Subtarget.h
  877     return TargetSubtargetInfo::ANTIDEP_CRITICAL;
unittests/CodeGen/MachineInstrTest.cpp
  102 class BogusSubtarget : public TargetSubtargetInfo {
  134   const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override {
  162   const TargetSubtargetInfo &STI = *TM->getSubtargetImpl(*F);
usr/include/c++/7.4.0/bits/move.h
   72     constexpr _Tp&&
   83     constexpr _Tp&&
usr/include/c++/7.4.0/bits/std_function.h
  299       _M_invoke(const _Any_data& __functor, _ArgTypes&&... __args)
  628       using _Invoker_type = _Res (*)(const _Any_data&, _ArgTypes&&...);
usr/include/c++/7.4.0/bits/unique_ptr.h
  824     make_unique(_Args&&... __args)
usr/include/c++/7.4.0/type_traits
 1659     { typedef _Tp&&   type; };