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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Overridden By
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 9145 const TargetRegisterClass *AArch64GenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc25795 const TargetRegisterClass *AMDGPUGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/AMDGPU/R600GenRegisterInfo.inc11507 const TargetRegisterClass *R600GenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/ARM/ARMGenRegisterInfo.inc 8565 const TargetRegisterClass *ARMGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/AVR/AVRGenRegisterInfo.inc 1485 const TargetRegisterClass *AVRGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/BPF/BPFGenRegisterInfo.inc 576 const TargetRegisterClass *BPFGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 3243 const TargetRegisterClass *HexagonGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/Lanai/LanaiGenRegisterInfo.inc 796 const TargetRegisterClass *LanaiGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/MSP430/MSP430GenRegisterInfo.inc 509 const TargetRegisterClass *MSP430GenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/Mips/MipsGenRegisterInfo.inc 6224 const TargetRegisterClass *MipsGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 5222 const TargetRegisterClass *PPCGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/RISCV/RISCVGenRegisterInfo.inc 1650 const TargetRegisterClass *RISCVGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/Sparc/SparcGenRegisterInfo.inc 2549 const TargetRegisterClass *SparcGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/SystemZ/SystemZGenRegisterInfo.inc 2636 const TargetRegisterClass *SystemZGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
gen/lib/Target/X86/X86GenRegisterInfo.inc 8171 const TargetRegisterClass *X86GenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
lib/Target/AArch64/AArch64RegisterInfo.cpp 101 AArch64RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC,
lib/Target/X86/X86RegisterInfo.cpp 87 X86RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC,
References
lib/CodeGen/MachineInstr.cpp 911 CurRC = TRI->getSubClassWithSubReg(CurRC, SubIdx);
lib/CodeGen/MachineVerifier.cpp 1776 TRI->getSubClassWithSubReg(RC, SubIdx);
lib/CodeGen/PeepholeOptimizer.cpp 474 DstRC = TRI->getSubClassWithSubReg(DstRC, SubIdx);
484 TRI->getSubClassWithSubReg(MRI->getRegClass(SrcReg), SubIdx) != nullptr;
lib/CodeGen/SelectionDAG/FastISel.cpp 2233 MRI.constrainRegClass(Op0, TRI.getSubClassWithSubReg(RC, Idx));
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 452 const TargetRegisterClass *RC = TRI->getSubClassWithSubReg(VRC, SubIdx);
465 RC = TRI->getSubClassWithSubReg(TLI->getRegClassFor(VT, isDivergent), SubIdx);
571 SRC = TRI->getSubClassWithSubReg(SRC, SubIdx);
lib/CodeGen/SplitKit.cpp 564 if (TRI.getSubClassWithSubReg(RC, Idx) != RC)