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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Overridden By
lib/Target/AArch64/AArch64RegisterInfo.cpp 194 AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/AMDGPU/R600RegisterInfo.cpp 31 BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/AMDGPU/SIRegisterInfo.cpp 139 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/ARC/ARCRegisterInfo.cpp 139 BitVector ARCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/ARM/ARMBaseRegisterInfo.cpp 187 getReservedRegs(const MachineFunction &MF) const {
lib/Target/AVR/AVRRegisterInfo.cpp 52 BitVector AVRRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/BPF/BPFRegisterInfo.cpp 37 BitVector BPFRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/Hexagon/HexagonRegisterInfo.cpp 130 BitVector HexagonRegisterInfo::getReservedRegs(const MachineFunction &MF)
lib/Target/Lanai/LanaiRegisterInfo.cpp 42 BitVector LanaiRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/MSP430/MSP430RegisterInfo.cpp 73 BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/Mips/MipsRegisterInfo.cpp 150 getReservedRegs(const MachineFunction &MF) const {
lib/Target/NVPTX/NVPTXRegisterInfo.cpp 107 BitVector NVPTXRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/PowerPC/PPCRegisterInfo.cpp 271 BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/RISCV/RISCVRegisterInfo.cpp 68 BitVector RISCVRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/Sparc/SparcRegisterInfo.cpp 54 BitVector SparcRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/SystemZ/SystemZRegisterInfo.cpp 223 SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp 45 WebAssemblyRegisterInfo::getReservedRegs(const MachineFunction & /*MF*/) const {
lib/Target/X86/X86RegisterInfo.cpp 519 BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
lib/Target/XCore/XCoreRegisterInfo.cpp 229 BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
unittests/CodeGen/MachineInstrTest.cpp 67 BitVector getReservedRegs(const MachineFunction &MF) const override {
References
lib/CodeGen/MachineRegisterInfo.cpp 514 ReservedRegs = getTargetRegisterInfo()->getReservedRegs(MF);
lib/CodeGen/MachineVerifier.cpp 579 : TRI->getReservedRegs(*MF);
lib/CodeGen/TargetRegisterInfo.cpp 232 BitVector Reserved = getReservedRegs(MF);
lib/Target/Hexagon/HexagonBlockRanges.cpp 222 Reserved(TRI.getReservedRegs(mf)) {
lib/Target/Hexagon/HexagonFrameLowering.cpp 1452 BitVector Reserved = TRI->getReservedRegs(MF);
tools/llvm-exegesis/lib/Assembler.cpp 167 return MF.getSubtarget().getRegisterInfo()->getReservedRegs(MF);