reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/TargetInstrInfo.h
  440       return Reg == P.Reg && SubReg == P.SubReg;
  440       return Reg == P.Reg && SubReg == P.SubReg;
 1805     std::pair<unsigned, unsigned> PairVal = std::make_pair(Val.Reg, Val.SubReg);
 1811     return RegInfo::isEqual(LHS.Reg, RHS.Reg) &&
 1811     return RegInfo::isEqual(LHS.Reg, RHS.Reg) &&
lib/CodeGen/PeepholeOptimizer.cpp
  324       return RegSrcs[Idx].Reg;
  665   unsigned Reg = RegSubReg.Reg;
  678     if (Register::isPhysicalRegister(CurSrcPair.Reg))
  681     ValueTracker ValTracker(CurSrcPair.Reg, CurSrcPair.SubReg, *MRI, TII);
  726       if (Register::isPhysicalRegister(CurSrcPair.Reg))
  730       const TargetRegisterClass *SrcRC = MRI->getRegClass(CurSrcPair.Reg);
  746   return CurSrcPair.Reg != Reg;
  760   const TargetRegisterClass *NewRC = MRI.getRegClass(SrcRegs[0].Reg);
  771     MIB.addReg(RegPair.Reg, 0, RegPair.SubReg);
  776     MRI.clearKillFlags(RegPair.Reg);
 1051     Src.Reg = MOInsertedReg.getReg();
 1061     Dst.Reg = MODef.getReg();
 1115   RegSubRegPair LookupSrc(Def.Reg, Def.SubReg);
 1125       LookupSrc.Reg = Res.getSrcReg(0);
 1197     if (Src.Reg == NewSrc.Reg || NewSrc.Reg == 0)
 1197     if (Src.Reg == NewSrc.Reg || NewSrc.Reg == 0)
 1197     if (Src.Reg == NewSrc.Reg || NewSrc.Reg == 0)
 1201     if (CpyRewriter->RewriteCurrentSource(NewSrc.Reg, NewSrc.SubReg)) {
 1203       MRI->clearKillFlags(NewSrc.Reg);
 1224   assert(!Register::isPhysicalRegister(Def.Reg) &&
 1231   const TargetRegisterClass *DefRC = MRI->getRegClass(Def.Reg);
 1237           .addReg(NewSrc.Reg, 0, NewSrc.SubReg);
 1247   MRI->replaceRegWith(Def.Reg, NewVReg);
 1252   MRI->clearKillFlags(NewSrc.Reg);
 1283     if (Register::isPhysicalRegister(Def.Reg))
 1913       return ValueTrackerResult(RegSeqInput.Reg, RegSeqInput.SubReg);
 1950     return ValueTrackerResult(InsertedReg.Reg, InsertedReg.SubReg);
 1959   if (MRI.getRegClass(MODef.getReg()) != MRI.getRegClass(BaseReg.Reg) ||
 1972   return ValueTrackerResult(BaseReg.Reg, DefSubReg);
 2000   return ValueTrackerResult(ExtractSubregInputReg.Reg,
lib/CodeGen/TailDuplicator.cpp
  404           auto *MappedRC = MRI->getRegClass(VI->second.Reg);
  413               MRI->setRegClass(VI->second.Reg, ConstrRC);
  418             ConstrRC = MRI->constrainRegClass(VI->second.Reg, OrigRC);
  424             MO.setReg(VI->second.Reg);
  439                 .addReg(VI->second.Reg, 0, VI->second.SubReg);
  985                 .addReg(CI.second.Reg, 0, CI.second.SubReg);
lib/CodeGen/TargetInstrInfo.cpp
 1212   InputReg.Reg = MOReg.getReg();
 1237   BaseReg.Reg = MOBaseReg.getReg();
 1240   InsertedReg.Reg = MOInsertedReg.getReg();
lib/Target/AMDGPU/GCNDPPCombine.cpp
  181       DPPInst.addReg(CombOldVGPR.Reg, Def ? 0 : RegState::Undef,
  318   assert(CombOldVGPR.Reg);
  438                              TII->get(AMDGPU::IMPLICIT_DEF), CombOldVGPR.Reg);
lib/Target/AMDGPU/SIFoldOperands.cpp
  720               B.addReg(Src.Reg, Def->isUndef() ? RegState::Undef : 0,
  731             if (TRI->isSGPRReg(*MRI, Src.Reg)) {
  740           if (CopyToVGPR.Reg) {
lib/Target/AMDGPU/SIInstrInfo.cpp
 6409       RSR.Reg = R1.Reg;
 6409       RSR.Reg = R1.Reg;
 6419   if (!Register::isVirtualRegister(P.Reg))
 6423   auto *DefInst = MRI.getVRegDef(RSR.Reg);
 6434         DefInst = MRI.getVRegDef(RSR.Reg);
 6440         if (!RSR.Reg)
 6442         DefInst = MRI.getVRegDef(RSR.Reg);
lib/Target/AMDGPU/SIInstrInfo.h
 1036   auto *RC = MRI.getRegClass(P.Reg);
lib/Target/AMDGPU/SIShrinkInstructions.cpp
  530         .addDef(X1.Reg, 0, X1.SubReg)
  531         .addDef(Y1.Reg, 0, Y1.SubReg)
  532         .addReg(Y1.Reg, 0, Y1.SubReg)
  533         .addReg(X1.Reg, 0, X1.SubReg).getInstr();
lib/Target/ARM/ARMBaseInstrInfo.cpp
 5291     InputReg.Reg = MOReg.getReg();
 5313     BaseReg.Reg = MOBaseReg.getReg();
 5316     InsertedReg.Reg = MOInsertedReg.getReg();