|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc78717 assert(N->getOperand(0).getValueType().getSizeInBits() == 16);
78718 SDValue Src0 = N->getOperand(0);
78719 SDValue Src1 = N->getOperand(1);
79510 unsigned Reg = cast<RegisterSDNode>(Use->getOperand(1))->getReg();
gen/lib/Target/ARM/ARMGenDAGISel.inc54092 ConstantSDNode *ConstVal = cast<ConstantSDNode>(N->getOperand(0));
54654 ConstantSDNode *ConstVal = cast<ConstantSDNode>(N->getOperand(0));
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc72650 SDValue Op1 = N->getOperand(1);
gen/lib/Target/Mips/MipsGenDAGISel.inc30308 SDNode *BV = N->getOperand(0).getNode();
30321 SDNode *BV = N->getOperand(0).getNode();
30398 return cast<VTSDNode>(N->getOperand(1))->getVT().bitsLT(MVT::i32);
gen/lib/Target/PowerPC/PPCGenDAGISel.inc44310 return !isIntS16Immediate(N->getOperand(0), Imm)
44311 && !isIntS16Immediate(N->getOperand(1), Imm);
44451 return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() == 0;
44459 return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() == 1;
gen/lib/Target/RISCV/RISCVGenDAGISel.inc13808 return cast<VTSDNode>(N->getOperand(1))->getVT() == MVT::i32;
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc30119 return CurDAG->MaskedValueIsZero(N->getOperand(0),
30129 return CurDAG->MaskedValueIsZero(N->getOperand(1),
30264 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
30273 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc21203 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(1)))
21204 return CurDAG->MaskedValueIsZero(N->getOperand(0), CN->getAPIntValue());
21206 KnownBits Known0 = CurDAG->computeKnownBits(N->getOperand(0), 0);
21207 KnownBits Known1 = CurDAG->computeKnownBits(N->getOperand(1), 0);
gen/lib/Target/X86/X86GenDAGISel.inc253751 return !isNullConstant(N->getOperand(1));
253839 return St->getAlignment() >= St->getOperand(1).getValueType().getStoreSize();
253979 if (isa<RegisterSDNode>(N->getOperand(i)) && ++NumRegs > 6)
254047 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254057 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254119 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(0))) {
254120 KnownBits Known = CurDAG->computeKnownBits(N->getOperand(1));
254135 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(1)))
254136 return CurDAG->MaskedValueIsZero(N->getOperand(0), CN->getAPIntValue());
254138 KnownBits Known0 = CurDAG->computeKnownBits(N->getOperand(0), 0);
254139 KnownBits Known1 = CurDAG->computeKnownBits(N->getOperand(1), 0);
254409 return (N->getOperand(0).getOpcode() == ISD::SDIVREM &&
254410 N->getOperand(0).getResNo() == 1);
254534 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254544 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254787 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
254795 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
include/llvm/CodeGen/SelectionDAG.h 1664 return SplitVector(N->getOperand(OpNo), SDLoc(N));
include/llvm/CodeGen/SelectionDAGNodes.h 988 getOperand(getNumOperands()-1).getValueType() == MVT::Glue)
989 return getOperand(getNumOperands()-1).getNode();
1171 return Node->getOperand(i);
1395 const SDValue &getChain() const { return getOperand(0); }
1397 return getOperand(getOpcode() == ISD::STORE ? 2 : 1);
1444 const SDValue &getBasePtr() const { return getOperand(1); }
1445 const SDValue &getVal() const { return getOperand(2); }
1607 return cast<ConstantSDNode>(getOperand(Num))->getZExtValue();
1611 return cast<ConstantSDNode>(getOperand(Num))->getAPIntValue();
1779 return cast<FrameIndexSDNode>(getOperand(1))->getIndex();
2210 return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
2251 const SDValue &getBasePtr() const { return getOperand(1); }
2252 const SDValue &getOffset() const { return getOperand(2); }
2281 const SDValue &getValue() const { return getOperand(1); }
2282 const SDValue &getBasePtr() const { return getOperand(2); }
2283 const SDValue &getOffset() const { return getOperand(3); }
2304 return getOperand(getOpcode() == ISD::MLOAD ? 1 : 2);
2307 return getOperand(getOpcode() == ISD::MLOAD ? 2 : 3);
2333 const SDValue &getBasePtr() const { return getOperand(1); }
2334 const SDValue &getMask() const { return getOperand(2); }
2335 const SDValue &getPassThru() const { return getOperand(3); }
2368 const SDValue &getValue() const { return getOperand(1); }
2369 const SDValue &getBasePtr() const { return getOperand(2); }
2370 const SDValue &getMask() const { return getOperand(3); }
2409 const SDValue &getBasePtr() const { return getOperand(3); }
2410 const SDValue &getIndex() const { return getOperand(4); }
2411 const SDValue &getMask() const { return getOperand(2); }
2412 const SDValue &getScale() const { return getOperand(5); }
2432 const SDValue &getPassThru() const { return getOperand(1); }
2451 const SDValue &getValue() const { return getOperand(1); }
2536 return Node->getOperand(Operand).getNode();
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 1674 SDValue N0 = N->getOperand(0);
1675 SDValue N1 = N->getOperand(1);
1694 if (N->getOperand(0).getValueType() == MVT::Other)
1695 return N->getOperand(0);
1696 if (N->getOperand(NumOps-1).getValueType() == MVT::Other)
1697 return N->getOperand(NumOps-1);
1699 if (N->getOperand(i).getValueType() == MVT::Other)
1700 return N->getOperand(i);
1709 if (getInputChainForNode(N->getOperand(0).getNode()) == N->getOperand(1))
1709 if (getInputChainForNode(N->getOperand(0).getNode()) == N->getOperand(1))
1710 return N->getOperand(0);
1711 if (getInputChainForNode(N->getOperand(1).getNode()) == N->getOperand(0))
1711 if (getInputChainForNode(N->getOperand(1).getNode()) == N->getOperand(0))
1712 return N->getOperand(1);
1853 AddToWorklist(i, CurNode->getOperand(0).getNode(), CurOpNumber);
1902 Ops.push_back(N->getOperand(i));
1924 SDValue Sel = BO->getOperand(0);
1927 Sel = BO->getOperand(1);
1954 SDValue CBO = BO->getOperand(SelOpNo ^ 1);
2002 SDValue C = IsAdd ? N->getOperand(1) : N->getOperand(0);
2002 SDValue C = IsAdd ? N->getOperand(1) : N->getOperand(0);
2003 SDValue Z = IsAdd ? N->getOperand(0) : N->getOperand(1);
2003 SDValue Z = IsAdd ? N->getOperand(0) : N->getOperand(1);
2015 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
2043 SDValue ConstantOp = IsAdd ? N->getOperand(1) : N->getOperand(0);
2043 SDValue ConstantOp = IsAdd ? N->getOperand(1) : N->getOperand(0);
2044 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1);
2044 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1);
2075 SDValue N0 = N->getOperand(0);
2076 SDValue N1 = N->getOperand(1);
2293 SDValue N0 = N->getOperand(0);
2294 SDValue N1 = N->getOperand(1);
2317 SDValue N0 = N->getOperand(0);
2318 SDValue N1 = N->getOperand(1);
2405 if (N1.getOpcode() != ISD::AND || !isOneOrOneSplat(N1->getOperand(1)))
2498 SDValue N0 = N->getOperand(0);
2499 SDValue N1 = N->getOperand(1);
2588 SDValue N0 = N->getOperand(0);
2589 SDValue N1 = N->getOperand(1);
2659 SDValue N0 = N->getOperand(0);
2660 SDValue N1 = N->getOperand(1);
2661 SDValue CarryIn = N->getOperand(2);
2678 SDValue N0 = N->getOperand(0);
2679 SDValue N1 = N->getOperand(1);
2680 SDValue CarryIn = N->getOperand(2);
2854 SDValue N0 = N->getOperand(0);
2855 SDValue N1 = N->getOperand(1);
3163 SDValue N0 = N->getOperand(0);
3164 SDValue N1 = N->getOperand(1);
3200 SDValue N0 = N->getOperand(0);
3201 SDValue N1 = N->getOperand(1);
3228 SDValue N0 = N->getOperand(0);
3229 SDValue N1 = N->getOperand(1);
3267 SDValue N0 = N->getOperand(0);
3268 SDValue N1 = N->getOperand(1);
3269 SDValue CarryIn = N->getOperand(2);
3279 SDValue N0 = N->getOperand(0);
3280 SDValue N1 = N->getOperand(1);
3281 SDValue CarryIn = N->getOperand(2);
3296 SDValue N0 = N->getOperand(0);
3297 SDValue N1 = N->getOperand(1);
3298 SDValue Scale = N->getOperand(2);
3318 SDValue N0 = N->getOperand(0);
3319 SDValue N1 = N->getOperand(1);
3541 SDValue Op0 = Node->getOperand(0);
3542 SDValue Op1 = Node->getOperand(1);
3555 User->getOperand(0) == Op0 &&
3556 User->getOperand(1) == Op1) {
3578 SDValue N0 = N->getOperand(0);
3579 SDValue N1 = N->getOperand(1);
3624 SDValue N0 = N->getOperand(0);
3625 SDValue N1 = N->getOperand(1);
3768 SDValue N0 = N->getOperand(0);
3769 SDValue N1 = N->getOperand(1);
3870 SDValue N0 = N->getOperand(0);
3871 SDValue N1 = N->getOperand(1);
3951 SDValue N0 = N->getOperand(0);
3952 SDValue N1 = N->getOperand(1);
3998 SDValue N0 = N->getOperand(0);
3999 SDValue N1 = N->getOperand(1);
4116 SDValue Lo = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(0));
4117 SDValue Hi = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(1));
4141 if (isNullConstant(N->getOperand(1))) {
4147 if (isOneConstant(N->getOperand(1))) {
4149 return CombineTo(N, N->getOperand(0), Zero);
4159 SDValue Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N->getOperand(0));
4160 SDValue Hi = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N->getOperand(1));
4177 SDValue N0 = N->getOperand(0);
4178 SDValue N1 = N->getOperand(1);
4205 SDValue N0 = N->getOperand(0);
4206 SDValue N1 = N->getOperand(1);
4250 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
4250 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
4860 auto *Mask = dyn_cast<ConstantSDNode>(N->getOperand(1));
4868 if (isa<LoadSDNode>(N->getOperand(0)))
4879 SDValue MaskOp = N->getOperand(1);
4895 SDValue Op0 = LogicN->getOperand(0);
4896 SDValue Op1 = LogicN->getOperand(1);
4921 DAG.ReplaceAllUsesWith(N, N->getOperand(0).getNode());
4935 SDValue N0 = N->getOperand(0);
4936 SDValue N1 = N->getOperand(1);
4956 if (!isAllOnesConstant(M->getOperand(0)))
4958 Y = M->getOperand(1);
4995 SDValue Not = And->getOperand(0), And1 = And->getOperand(1);
4995 SDValue Not = And->getOperand(0), And1 = And->getOperand(1);
5035 SDValue N0 = N->getOperand(0);
5036 SDValue N1 = N->getOperand(1);
5381 SDValue N00 = N0->getOperand(0);
5392 SDValue N10 = N1->getOperand(0);
5673 SDValue N0 = N->getOperand(0);
5674 SDValue N1 = N->getOperand(1);
6343 auto LHS = calculateByteProvider(Op->getOperand(0), Index, Depth + 1);
6346 auto RHS = calculateByteProvider(Op->getOperand(1), Index, Depth + 1);
6357 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1));
6368 : calculateByteProvider(Op->getOperand(0), Index - ByteShift,
6374 SDValue NarrowOp = Op->getOperand(0);
6387 return calculateByteProvider(Op->getOperand(0), ByteWidth - Index - 1,
6791 if (isAllOnesOrAllOnesSplat(N->getOperand(1)))
6820 SDValue N0 = N->getOperand(0);
6821 SDValue N1 = N->getOperand(1);
6857 SDValue N0 = N->getOperand(0);
6858 SDValue N1 = N->getOperand(1);
6968 if (N0Opcode == ISD::AND && N0.hasOneUse() && N0->getOperand(1) == N1) {
7063 SDValue LogicOp = Shift->getOperand(0);
7074 SDValue C1 = Shift->getOperand(1);
7116 EVT ShiftAmtVT = Shift->getOperand(1).getValueType();
7130 assert(isConstOrConstSplat(N->getOperand(1)) && "Expected constant operand");
7133 if (isBitwiseNot(N->getOperand(0)))
7137 SDValue LHS = N->getOperand(0);
7192 N->getOperand(1));
7196 N->getOperand(1));
7202 assert(N->getOperand(0).getOpcode() == ISD::AND);
7206 if (N->hasOneUse() && N->getOperand(0).hasOneUse() &&
7208 SDValue N01 = N->getOperand(0).getOperand(1);
7211 SDValue N00 = N->getOperand(0).getOperand(0);
7225 SDValue N0 = N->getOperand(0);
7226 SDValue N1 = N->getOperand(1);
7273 return DAG.getNode(N->getOpcode(), dl, VT, N0->getOperand(0),
7282 SDValue N0 = N->getOperand(0);
7283 SDValue N1 = N->getOperand(1);
7301 SDValue N00 = N0->getOperand(0);
7302 SDValue N01 = N0->getOperand(1);
7532 SDValue N0 = N->getOperand(0);
7533 SDValue N1 = N->getOperand(1);
7723 SDValue N0 = N->getOperand(0);
7724 SDValue N1 = N->getOperand(1);
7938 SDValue N0 = N->getOperand(0);
7939 SDValue N1 = N->getOperand(1);
7940 SDValue N2 = N->getOperand(2);
8012 SDValue N0 = N->getOperand(0);
8028 SDValue N0 = N->getOperand(0);
8036 return N0->getOperand(0);
8041 SDValue N0 = N->getOperand(0);
8054 SDValue N0 = N->getOperand(0);
8071 SDValue N0 = N->getOperand(0);
8081 SDValue N0 = N->getOperand(0);
8098 SDValue N0 = N->getOperand(0);
8108 SDValue N0 = N->getOperand(0);
8181 SDValue Cond = N->getOperand(0);
8182 SDValue C1 = N->getOperand(1);
8183 SDValue C2 = N->getOperand(2);
8216 SDValue Cond = N->getOperand(0);
8217 SDValue N1 = N->getOperand(1);
8218 SDValue N2 = N->getOperand(2);
8324 SDValue N0 = N->getOperand(0);
8325 SDValue N1 = N->getOperand(1);
8326 SDValue N2 = N->getOperand(2);
8378 SDValue Cond0 = N0->getOperand(0);
8379 SDValue Cond1 = N0->getOperand(1);
8391 SDValue Cond0 = N0->getOperand(0);
8392 SDValue Cond1 = N0->getOperand(1);
8405 SDValue N1_0 = N1->getOperand(0);
8406 SDValue N1_1 = N1->getOperand(1);
8407 SDValue N1_2 = N1->getOperand(2);
8424 SDValue N2_0 = N2->getOperand(0);
8425 SDValue N2_1 = N2->getOperand(1);
8426 SDValue N2_2 = N2->getOperand(2);
8514 SDValue Cond = N->getOperand(0);
8515 SDValue LHS = N->getOperand(1);
8516 SDValue RHS = N->getOperand(2);
8535 if (Cond->getOperand(i)->isUndef())
8540 else if (Cond->getOperand(i).getNode() != BottomHalf)
8547 if (Cond->getOperand(i)->isUndef())
8552 else if (Cond->getOperand(i).getNode() != TopHalf)
8561 BottomHalf->isNullValue() ? RHS->getOperand(0) : LHS->getOperand(0),
8561 BottomHalf->isNullValue() ? RHS->getOperand(0) : LHS->getOperand(0),
8562 TopHalf->isNullValue() ? RHS->getOperand(1) : LHS->getOperand(1));
8562 TopHalf->isNullValue() ? RHS->getOperand(1) : LHS->getOperand(1));
8618 SDValue Cond = N->getOperand(0);
8619 SDValue N1 = N->getOperand(1);
8620 SDValue N2 = N->getOperand(2);
8679 SDValue N0 = N->getOperand(0);
8680 SDValue N1 = N->getOperand(1);
8681 SDValue N2 = N->getOperand(2);
8794 SDValue N0 = N->getOperand(0);
8795 SDValue N1 = N->getOperand(1);
8796 SDValue N2 = N->getOperand(2);
8797 SDValue N3 = N->getOperand(3);
8798 SDValue N4 = N->getOperand(4);
8845 N->getValueType(0), N->getOperand(0), N->getOperand(1),
8845 N->getValueType(0), N->getOperand(0), N->getOperand(1),
8846 cast<CondCodeSDNode>(N->getOperand(2))->get(), SDLoc(N), !PreferSetCC);
8868 SDValue LHS = N->getOperand(0);
8869 SDValue RHS = N->getOperand(1);
8870 SDValue Carry = N->getOperand(2);
8871 SDValue Cond = N->getOperand(3);
8889 SDValue N0 = N->getOperand(0);
8908 SDValue Op1 = N0->getOperand(1);
8909 SDValue Op2 = N0->getOperand(2);
8924 return DAG.getSelect(DL, VT, N0->getOperand(0),
8989 ISD::CondCode CC = cast<CondCodeSDNode>(User->getOperand(2))->get();
8995 SDValue UseOp = User->getOperand(i);
9042 SDValue SOp = SetCC->getOperand(j);
9049 Ops.push_back(SetCC->getOperand(2));
9056 SDValue N0 = N->getOperand(0);
9159 EVT OrigVT = N->getOperand(0).getValueType();
9164 SDValue N0 = N->getOperand(0);
9172 SDValue N1 = N0->getOperand(0);
9250 SDValue VSel = Cast->getOperand(0);
9268 CastA = DAG.getNode(CastOpcode, DL, VT, A, Cast->getOperand(1));
9269 CastB = DAG.getNode(CastOpcode, DL, VT, B, Cast->getOperand(1));
9384 SDValue SetCC = N->getOperand(0);
9411 SDValue N0 = N->getOperand(0);
9650 Op = N->getOperand(0);
9660 SDValue Op0 = N->getOperand(0);
9661 SDValue Op1 = N->getOperand(1);
9683 SDValue CtPop = Extend->getOperand(0);
9700 SDValue N0 = N->getOperand(0);
9956 SDValue N0 = N->getOperand(0);
10106 SDValue N0 = N->getOperand(0);
10107 SDValue N1 = N->getOperand(1);
10169 SDValue N0 = N->getOperand(0);
10183 ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT();
10205 auto AndC = dyn_cast<ConstantSDNode>(N->getOperand(1));
10259 isa<ConstantSDNode>(Mask->getOperand(1))) {
10261 cast<ConstantSDNode>(Mask->getOperand(1))->getAPIntValue();
10372 SDValue N0 = N->getOperand(0);
10373 SDValue N1 = N->getOperand(1);
10506 SDValue N0 = N->getOperand(0);
10522 SDValue N0 = N->getOperand(0);
10538 SDValue N0 = N->getOperand(0);
10599 SDValue EltNo = N0->getOperand(1);
10813 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N0->getOperand(0)), VT,
10851 SDValue Elt = N->getOperand(i);
10907 SDValue N0 = N->getOperand(0);
10951 SDValue N0 = N->getOperand(0);
11177 SDValue SV0 = PeekThroughBitcast(N0->getOperand(0));
11178 SDValue SV1 = PeekThroughBitcast(N0->getOperand(1));
11270 SDValue Op = BV->getOperand(i+ (isLE ? (NumInputsPerOutput-j-1) : j));
11325 SDValue N0 = N->getOperand(0);
11326 SDValue N1 = N->getOperand(1);
11537 SDValue N0 = N->getOperand(0);
11538 SDValue N1 = N->getOperand(1);
11828 SDValue N0 = N->getOperand(0);
11829 SDValue N1 = N->getOperand(1);
11920 SDValue N0 = N->getOperand(0);
11921 SDValue N1 = N->getOperand(1);
12099 SDValue N0 = N->getOperand(0);
12100 SDValue N1 = N->getOperand(1);
12153 if (N0 == N1->getOperand(0))
12154 return DAG.getNode(ISD::FNEG, DL, VT, N1->getOperand(1), Flags);
12156 if (N0 == N1->getOperand(1))
12157 return DAG.getNode(ISD::FNEG, DL, VT, N1->getOperand(0), Flags);
12191 SDValue N0 = N->getOperand(0);
12192 SDValue N1 = N->getOperand(1);
12325 SDValue N0 = N->getOperand(0);
12326 SDValue N1 = N->getOperand(1);
12327 SDValue N2 = N->getOperand(2);
12456 SDValue N0 = N->getOperand(0);
12463 SDValue N1 = N->getOperand(1);
12480 if (U->getOpcode() == ISD::FDIV && U->getOperand(1) == N1) {
12499 SDValue Dividend = U->getOperand(0);
12514 SDValue N0 = N->getOperand(0);
12515 SDValue N1 = N->getOperand(1);
12618 SDValue N0 = N->getOperand(0);
12619 SDValue N1 = N->getOperand(1);
12640 SDValue N0 = N->getOperand(0);
12651 SDValue N1 = N->getOperand(1);
12659 EVT N1Op0VT = N1->getOperand(0).getValueType();
12666 SDValue N0 = N->getOperand(0);
12667 SDValue N1 = N->getOperand(1);
12675 if (ConstantFPSDNode *N1C = isConstOrConstSplatFP(N->getOperand(1))) {
12713 ConstantFPSDNode *ExponentC = isConstOrConstSplatFP(N->getOperand(1));
12742 return DAG.getNode(ISD::FCBRT, SDLoc(N), VT, N->getOperand(0), Flags);
12777 SDValue Sqrt = DAG.getNode(ISD::FSQRT, DL, VT, N->getOperand(0), Flags);
12811 SDValue N0 = N->getOperand(0);
12824 SDValue N0 = N->getOperand(0);
12885 SDValue N0 = N->getOperand(0);
12932 SDValue N0 = N->getOperand(0);
12973 SDValue N0 = N->getOperand(0);
12988 SDValue N0 = N->getOperand(0);
13003 SDValue N0 = N->getOperand(0);
13004 SDValue N1 = N->getOperand(1);
13059 SDValue N0 = N->getOperand(0);
13112 SDValue N0 = N->getOperand(0);
13123 SDValue N0 = N->getOperand(0);
13147 SDValue N0 = N->getOperand(0);
13159 SDValue N0 = N->getOperand(0);
13217 SDValue N0 = N->getOperand(0);
13218 SDValue N1 = N->getOperand(1);
13254 SDValue N0 = N->getOperand(0);
13263 return N->getOperand(0);
13297 SDValue Chain = N->getOperand(0);
13298 SDValue N1 = N->getOperand(1);
13299 SDValue N2 = N->getOperand(2);
13398 SDValue Op0 = TheXor->getOperand(0);
13399 SDValue Op1 = TheXor->getOperand(1);
13424 CondCodeSDNode *CC = cast<CondCodeSDNode>(N->getOperand(1));
13425 SDValue CondLHS = N->getOperand(2), CondRHS = N->getOperand(3);
13425 SDValue CondLHS = N->getOperand(2), CondRHS = N->getOperand(3);
13442 N->getOperand(0), Simp.getOperand(2),
13444 N->getOperand(4));
13473 ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
13482 ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
13609 SDValue Op1 = Use.getUser()->getOperand((UI.getOperandNo() + 1) & 1);
13673 if (OtherUses[i]->getOperand(OffsetIdx).getNode() == BasePtr.getNode())
13675 assert(OtherUses[i]->getOperand(!OffsetIdx).getNode() ==
13690 cast<ConstantSDNode>(OtherUses[i]->getOperand(OffsetIdx));
13857 SDValue BP = LD->getOperand(1);
13858 SDValue Inc = LD->getOperand(2);
13935 SDValue Chain = LD->getOperand(0);
13970 SDValue Idx = DAG.getNode(Opc, SDLoc(LD), LD->getOperand(1).getValueType(),
13971 LD->getOperand(1), LD->getOperand(2));
13971 LD->getOperand(1), LD->getOperand(2));
14067 bool HasOTCInc = LD->getOperand(2).getOpcode() == ISD::TargetConstant &&
14068 cast<ConstantSDNode>(LD->getOperand(2))->isOpaque();
14200 if (!TLI.isTruncateFree(LS.Inst->getOperand(0).getValueType(),
14429 TLI.getRegClassFor(Use->getOperand(0).getValueType().getSimpleVT(),
14430 Use->getOperand(0)->isDivergent());
14633 isa<ConstantSDNode>(User->getOperand(1))) {
14709 !isa<ConstantSDNode>(V->getOperand(1)) ||
14710 !ISD::isNormalLoad(V->getOperand(0).getNode()))
14714 LoadSDNode *LD = cast<LoadSDNode>(V->getOperand(0));
14726 uint64_t NotMask = ~cast<ConstantSDNode>(V->getOperand(1))->getSExtValue();
15043 if (Use->getOperand(0) == ConstNode)
15044 OtherOp = Use->getOperand(1).getNode();
15046 OtherOp = Use->getOperand(0).getNode();
15075 DAG.isConstantIntBuildVectorOrConstantInt(OtherOp->getOperand(1)) &&
15076 OtherOp->getOperand(0).getNode() == MulVar)
15464 Worklist.push_back(N->getOperand(j).getNode());
16004 SDValue Val = StoreNodes[i].MemNode->getOperand(1);
16278 ST1, ST1->getChain(), NewSDVal, ST1->getOperand(2),
16279 ST1->getOperand(3));
16341 const BaseIndexOffset LifetimeEndBase(N->getOperand(1), SDValue(),
16345 SmallVector<SDValue, 8> Chains = {N->getOperand(0)};
16498 SDValue InsertVal = N->getOperand(1);
16499 SDValue Vec = N->getOperand(0);
16548 SDValue DestVec = N->getOperand(0);
16591 SDValue InVec = N->getOperand(0);
16592 SDValue InVal = N->getOperand(1);
16593 SDValue EltNo = N->getOperand(2);
16764 SDValue Vec = ExtElt->getOperand(0);
16765 SDValue Index = ExtElt->getOperand(1);
16795 SDValue VecOp = N->getOperand(0);
16796 SDValue Index = N->getOperand(1);
16938 Use->getOperand(0) == VecOp &&
16939 isa<ConstantSDNode>(Use->getOperand(1));
16943 auto *CstElt = cast<ConstantSDNode>(Use->getOperand(1));
17077 SDValue In = N->getOperand(i);
17131 SDValue Cast = N->getOperand(i);
17139 In = Cast->getOperand(0);
17259 unsigned ExtIndex = N->getOperand(i).getConstantOperandVal(1);
17290 SDValue Op = BV->getOperand(i);
17309 SDValue Zext = BV->getOperand(ZextElt);
17391 SDValue Op = N->getOperand(i);
17452 unsigned Index = N->getOperand(i).getConstantOperandVal(1);
17584 SDValue Op0 = N->getOperand(0);
17613 if ((Offset + i) != checkElem(N->getOperand(i)))
17666 SDValue Op0 = N->getOperand(0);
17677 if (Offset + i != checkElem(N->getOperand(i))) {
17707 EVT OpVT = N->getOperand(0).getValueType();
17772 EVT OpVT = N->getOperand(0).getValueType();
17845 return N->getOperand(0);
17856 SDValue In = N->getOperand(0);
17886 TLI.isTypeLegal(Scalar->getOperand(0).getValueType()))
17887 Scalar = Scalar->getOperand(0);
17974 unsigned PartNumElem = N->getOperand(0).getValueType().getVectorNumElements();
17977 SDValue Op = N->getOperand(i);
18037 SDValue BinOp = Extract->getOperand(0);
18047 SDValue Index = Extract->getOperand(1);
18078 auto *ExtractIndexC = dyn_cast<ConstantSDNode>(Extract->getOperand(1));
18085 SDValue BinOp = peekThroughBitcasts(Extract->getOperand(0));
18125 EVT ExtBOIdxVT = Extract->getOperand(1).getValueType();
18127 BinOp.hasOneUse() && Extract->getOperand(0)->hasOneUse()) {
18194 auto *Ld = dyn_cast<LoadSDNode>(Extract->getOperand(0));
18195 auto *ExtIdx = dyn_cast<ConstantSDNode>(Extract->getOperand(1));
18209 SDValue BaseAddr = Ld->getOperand(1);
18224 SDValue V = N->getOperand(0);
18236 SDValue Index = N->getOperand(1);
18284 return V->getOperand(Idx / NumElems);
18311 SDValue Src = V->getOperand(IdxVal);
18347 DAG.getBitcast(N->getOperand(0).getValueType(), V.getOperand(0)),
18367 SDValue N0 = Shuf->getOperand(0), N1 = Shuf->getOperand(1);
18367 SDValue N0 = Shuf->getOperand(0), N1 = Shuf->getOperand(1);
18414 SDValue N0 = N->getOperand(0);
18415 SDValue N1 = N->getOperand(1);
18494 SDValue N0 = SVN->getOperand(0);
18495 SDValue N1 = SVN->getOperand(1);
18584 SDValue N0 = SVN->getOperand(0);
18636 SDValue N0 = peekThroughBitcasts(SVN->getOperand(0));
18690 if (!Shuf->getOperand(1).isUndef())
18692 auto *Splat = dyn_cast<ShuffleVectorSDNode>(Shuf->getOperand(0));
18725 return Shuf->getOperand(0);
18734 Splat->getOperand(0), Splat->getOperand(1),
18734 Splat->getOperand(0), Splat->getOperand(1),
18772 SDValue Op0 = Shuf->getOperand(0);
18773 SDValue Op1 = Shuf->getOperand(1);
18822 auto *Shuf0 = dyn_cast<ShuffleVectorSDNode>(Shuf->getOperand(0));
18823 if (!Shuf0 || !Shuf->getOperand(1).isUndef())
18841 return Shuf->getOperand(0);
18848 SDValue N0 = N->getOperand(0);
18849 SDValue N1 = N->getOperand(1);
18923 SDValue ConvInput = V->getOperand(0);
18935 if (!V->getOperand(i).isUndef()) {
18936 Base = V->getOperand(i);
18944 if (V->getOperand(i) != Base) {
18954 SDValue Splatted = V->getOperand(SplatIndex);
19044 SDValue SV0 = BC0->getOperand(0);
19045 SDValue SV1 = BC0->getOperand(1);
19072 assert(N1->getOperand(0).getValueType() == VT &&
19075 SDValue SV0 = N1->getOperand(0);
19076 SDValue SV1 = N1->getOperand(1);
19102 assert(OtherSV->getOperand(0).getValueType() == VT &&
19128 CurrentVec = (Idx < (int) NumElts) ? OtherSV->getOperand(0)
19129 : OtherSV->getOperand(1);
19192 SDValue InVal = N->getOperand(0);
19198 SDValue InVec = InVal->getOperand(0);
19199 SDValue EltNo = InVal->getOperand(1);
19244 SDValue N0 = N->getOperand(0);
19245 SDValue N1 = N->getOperand(1);
19246 SDValue N2 = N->getOperand(2);
19387 SDValue N0 = N->getOperand(0);
19391 return N0->getOperand(0);
19397 SDValue N0 = N->getOperand(0);
19412 SDValue N0 = N->getOperand(0);
19449 SDValue LHS = N->getOperand(0);
19450 SDValue RHS = peekThroughBitcasts(N->getOperand(1));
19535 SDValue N0 = N->getOperand(0);
19536 SDValue N1 = N->getOperand(1);
19584 SDValue LHS = N->getOperand(0);
19585 SDValue RHS = N->getOperand(1);
19729 CC = cast<CondCodeSDNode>(TheSelect->getOperand(4))->get();
19730 CmpLHS = TheSelect->getOperand(0);
19731 Zero = isConstOrConstSplatFP(TheSelect->getOperand(1));
19734 SDValue Cmp = TheSelect->getOperand(0);
19751 if (TheSelect->getOperand(0).getValueType().isVector()) return false;
19827 SDNode *CondNode = TheSelect->getOperand(0).getNode();
19838 TheSelect->getOperand(0), LLD->getBasePtr(),
19847 SDNode *CondLHS = TheSelect->getOperand(0).getNode();
19848 SDNode *CondRHS = TheSelect->getOperand(1).getNode();
19860 TheSelect->getOperand(0),
19861 TheSelect->getOperand(1),
19863 TheSelect->getOperand(4));
20072 SDValue AndLHS = N0->getOperand(0);
20073 auto *ConstAndRHS = dyn_cast<ConstantSDNode>(N0->getOperand(1));
20208 ConstantSDNode *C = isConstOrConstSplat(N->getOperand(1));
20501 return {false /*isVolatile*/, /*isAtomic*/ false, LN->getOperand(1),
20822 S, BetterChain, S->getOperand(1), S->getOperand(2), S->getOperand(3)));
20822 S, BetterChain, S->getOperand(1), S->getOperand(2), S->getOperand(3)));
20822 S, BetterChain, S->getOperand(1), S->getOperand(2), S->getOperand(3)));
20844 return ST->getOperand(0) != NewChain;
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 63 while (N && Node->getOperand(N - 1).getValueType() == MVT::Glue)
65 if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
71 if (isa<RegisterMaskSDNode>(Node->getOperand(I - 1)))
73 if (RegisterSDNode *RN = dyn_cast<RegisterSDNode>(Node->getOperand(I - 1)))
114 User->getOperand(2).getNode() == Node &&
115 User->getOperand(2).getResNo() == ResNo) {
116 unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
124 SDValue Op = User->getOperand(i);
221 VRBase = cast<RegisterSDNode>(Node->getOperand(i-NumResults))->getReg();
229 User->getOperand(2).getNode() == Node &&
230 User->getOperand(2).getResNo() == i) {
231 unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
485 User->getOperand(2).getNode() == Node) {
486 unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
498 unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
504 RegisterSDNode *R = dyn_cast<RegisterSDNode>(Node->getOperand(0));
509 Reg = R ? R->getReg() : getVR(Node->getOperand(0), VRBaseMap);
533 Node->getOperand(0).getSimpleValueType(),
550 SDValue N0 = Node->getOperand(0);
551 SDValue N1 = Node->getOperand(1);
552 SDValue N2 = Node->getOperand(2);
610 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap);
613 unsigned DstRCIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
631 unsigned DstRCIdx = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
640 if (NumOps && Node->getOperand(NumOps-1).getValueType() == MVT::Other)
646 SDValue Op = Node->getOperand(i);
648 RegisterSDNode *R = dyn_cast<RegisterSDNode>(Node->getOperand(i-1));
653 unsigned SubReg = getVR(Node->getOperand(i-1), VRBaseMap);
896 AddOperand(MIB, Node->getOperand(i), i-NumSkip+NumDefs, &II,
947 UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg());
960 if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(F->getOperand(i))) {
994 unsigned DestReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
995 SDValue SrcVal = Node->getOperand(2);
1018 unsigned SrcReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
1038 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Node->getOperand(1));
1047 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
1058 SDValue AsmStrV = Node->getOperand(InlineAsm::Op_AsmString);
1065 cast<ConstantSDNode>(Node->getOperand(InlineAsm::Op_ExtraInfo))->
1078 cast<ConstantSDNode>(Node->getOperand(i))->getZExtValue();
1089 unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
1101 unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
1114 AddOperand(MIB, Node->getOperand(i), 0, nullptr, VRBaseMap,
1146 SDValue MDV = Node->getOperand(InlineAsm::Op_MDNode);
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1014 Node->getOperand(0).getValueType());
1017 EVT InnerType = cast<VTSDNode>(Node->getOperand(1))->getVT();
1023 Node->getOperand(2).getValueType());
1031 MVT OpVT = Node->getOperand(CompareOperand).getSimpleValueType();
1033 cast<CondCodeSDNode>(Node->getOperand(CCOperand))->get();
1102 Node->getOperand(0));
1116 Node->getOperand(1).getValueType());
1156 Node->getOpcode(), Node->getOperand(0).getValueType());
1178 SDValue Op0 = Node->getOperand(0);
1179 SDValue Op1 = Node->getOperand(1);
1199 SDValue Op0 = Node->getOperand(0);
1200 SDValue Op1 = Node->getOperand(1);
1201 SDValue Op2 = Node->getOperand(2);
1406 if (Node->getOperand(i).isUndef()) continue;
1415 if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) {
1417 Node->getOperand(i), Idx,
1420 Stores.push_back(DAG.getStore(DAG.getEntryNode(), dl, Node->getOperand(i),
1504 SDValue Mag = Node->getOperand(0);
1505 SDValue Sign = Node->getOperand(1);
1560 SDValue Value = Node->getOperand(0);
1588 SDValue Tmp3 = Node->getOperand(2);
1794 DAG.getEntryNode(), dl, Node->getOperand(0), StackPtr,
1820 SDValue V = Node->getOperand(i);
1903 EVT OpVT = Node->getOperand(0).getValueType();
1912 SDValue V = Node->getOperand(i);
1934 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Node->getOperand(0));
1941 dyn_cast<ConstantFPSDNode>(Node->getOperand(i))) {
1944 dyn_cast<ConstantSDNode>(Node->getOperand(i))) {
1956 assert(Node->getOperand(i).isUndef());
1973 if (Node->getOperand(i).isUndef())
1975 DefinedValues.insert(Node->getOperand(i));
1982 SDValue V = Node->getOperand(i);
2013 SDValue SplatVal = Node->getOperand(0);
2086 SDValue InChain = Node->getOperand(0);
2091 EVT ArgVT = Node->getOperand(i).getValueType();
2093 Entry.Node = Node->getOperand(i);
2168 switch (Node->getOperand(0).getValueType().getSimpleVT().SimpleTy) {
2265 SDValue Op0 = Node->getOperand(0);
2304 Entry.Node = Node->getOperand(0);
2679 Results.push_back(ExpandBITREVERSE(Node->getOperand(0), dl));
2682 Results.push_back(ExpandBSWAP(Node->getOperand(0), dl));
2690 SDValue CfaArg = DAG.getSExtOrTrunc(Node->getOperand(0), dl,
2714 Results.push_back(Node->getOperand(0));
2721 Results.push_back(Node->getOperand(0));
2727 Results.push_back(Node->getOperand(0));
2735 Node->getOperand(0), Node->getOperand(1), Zero, Zero,
2735 Node->getOperand(0), Node->getOperand(1), Zero, Zero,
2745 Node->getOperand(0),
2746 Node->getOperand(1), Node->getOperand(2),
2746 Node->getOperand(1), Node->getOperand(2),
2758 Node->getOperand(0), Node->getOperand(1), Node->getOperand(2),
2758 Node->getOperand(0), Node->getOperand(1), Node->getOperand(2),
2758 Node->getOperand(0), Node->getOperand(1), Node->getOperand(2),
2759 Node->getOperand(3), cast<MemSDNode>(Node)->getMemOperand());
2763 SDValue RHS = Node->getOperand(1);
2772 Node->getOperand(2), DAG.getValueType(AtomicType));
2778 RHS = DAG.getZeroExtendInReg(Node->getOperand(2), dl, AtomicType);
2783 RHS = DAG.getZeroExtendInReg(Node->getOperand(2), dl, AtomicType);
2802 Results.push_back(Node->getOperand(i));
2821 Tmp1 = EmitStackConvert(Node->getOperand(1),
2823 Node->getValueType(0), dl, Node->getOperand(0));
2829 Tmp1 = EmitStackConvert(Node->getOperand(0),
2841 Tmp1 = EmitStackConvert(Node->getOperand(1),
2842 Node->getOperand(1).getValueType(),
2843 Node->getValueType(0), dl, Node->getOperand(0));
2848 Tmp1 = EmitStackConvert(Node->getOperand(0),
2849 Node->getOperand(0).getValueType(),
2854 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT();
2866 SDValue And = DAG.getNode(ISD::AND, dl, VT, Node->getOperand(0), One);
2880 Node->getOperand(0), ShiftCst);
2893 Node->getOperand(0), Node->getValueType(0), dl);
2929 if (Node->getOperand(0).getValueType().getVectorNumElements() == 1)
2932 Node->getOperand(0));
2950 Results.push_back(ExpandINSERT_VECTOR_ELT(Node->getOperand(0),
2951 Node->getOperand(1),
2952 Node->getOperand(2), dl));
2960 SDValue Op0 = Node->getOperand(0);
2961 SDValue Op1 = Node->getOperand(1);
3031 EVT OpTy = Node->getOperand(0).getValueType();
3032 if (cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue()) {
3034 Tmp1 = DAG.getNode(ISD::SRL, dl, OpTy, Node->getOperand(0),
3037 Node->getOperand(0).getValueType(),
3043 Node->getOperand(0));
3052 Results.push_back(DAG.getCopyFromReg(Node->getOperand(0), dl, SP,
3057 Results.push_back(Node->getOperand(0));
3064 Results.push_back(DAG.getCopyToReg(Node->getOperand(0), dl, SP,
3065 Node->getOperand(1)));
3067 Results.push_back(Node->getOperand(0));
3082 Node->getOperand(0));
3101 Tmp1 = Node->getOperand(0);
3102 Tmp2 = Node->getOperand(1);
3122 Tmp1 = DAG.getNode(ISD::FSINCOS, dl, VTs, Node->getOperand(0));
3138 DAG.getNode(ISD::FP16_TO_FP, dl, MVT::f32, Node->getOperand(0));
3146 SDValue Op = Node->getOperand(0);
3178 Tmp1 = DAG.getNode(ISD::FNEG, dl, VT, Node->getOperand(1));
3179 Tmp1 = DAG.getNode(ISD::FADD, dl, VT, Node->getOperand(0), Tmp1, Flags);
3189 Tmp1 = DAG.getNode(ISD::XOR, dl, VT, Node->getOperand(1),
3193 Results.push_back(DAG.getNode(ISD::ADD, dl, VT, Node->getOperand(0), Tmp1));
3202 Tmp2 = Node->getOperand(0);
3203 Tmp3 = Node->getOperand(1);
3224 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0),
3225 Node->getOperand(1));
3237 Tmp1 = DAG.getNode(ExpandOpcode, dl, VTs, Node->getOperand(0),
3238 Node->getOperand(1));
3244 SDValue LHS = Node->getOperand(0);
3245 SDValue RHS = Node->getOperand(1);
3298 Results.push_back(DAG.getNode(OpToUse, dl, VTs, Node->getOperand(0),
3299 Node->getOperand(1)));
3345 SDValue LHS = Node->getOperand(0);
3346 SDValue RHS = Node->getOperand(1);
3347 SDValue Carry = Node->getOperand(2);
3412 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, PairTy, Node->getOperand(0));
3413 Tmp2 = DAG.getNode(ISD::ANY_EXTEND, dl, PairTy, Node->getOperand(1));
3422 Tmp1 = Node->getOperand(0);
3423 Tmp2 = Node->getOperand(1);
3424 Tmp3 = Node->getOperand(2);
3438 SDValue Chain = Node->getOperand(0);
3439 SDValue Table = Node->getOperand(1);
3440 SDValue Index = Node->getOperand(2);
3482 Tmp1 = Node->getOperand(0);
3483 Tmp2 = Node->getOperand(1);
3488 Node->getOperand(2));
3502 Node->getOperand(2));
3507 Tmp1 = Node->getOperand(0);
3508 Tmp2 = Node->getOperand(1);
3509 Tmp3 = Node->getOperand(2);
3551 Tmp1 = Node->getOperand(0); // LHS
3552 Tmp2 = Node->getOperand(1); // RHS
3553 Tmp3 = Node->getOperand(2); // True
3554 Tmp4 = Node->getOperand(3); // False
3556 SDValue CC = Node->getOperand(4);
3626 Tmp1 = Node->getOperand(0); // Chain
3627 Tmp2 = Node->getOperand(2); // LHS
3628 Tmp3 = Node->getOperand(3); // RHS
3629 Tmp4 = Node->getOperand(1); // CC
3642 Tmp4, Tmp2, Tmp3, Node->getOperand(4));
3647 Tmp2, Tmp3, Node->getOperand(4));
3670 ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(), Node->getOperand(0),
3673 ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(), Node->getOperand(1),
3731 Node->getOperand(1).getValueType())
3764 .setChain(Node->getOperand(0))
3806 .setChain(Node->getOperand(0))
4041 RTLIB::getFPROUND(Node->getOperand(0).getValueType(), MVT::f16);
4130 OVT = Node->getOperand(0).getSimpleValueType();
4133 OVT = Node->getOperand(2).getSimpleValueType();
4144 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
4169 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
4181 Tmp1 = PromoteLegalFP_TO_INT(Node->getOperand(0), Node->getValueType(0),
4187 Tmp1 = PromoteLegalINT_TO_FP(Node->getOperand(0), Node->getValueType(0),
4192 SDValue Chain = Node->getOperand(0); // Get the chain.
4193 SDValue Ptr = Node->getOperand(1); // Get the pointer.
4205 Tmp1 = DAG.getVAArg(NVT, dl, Chain, Ptr, Node->getOperand(2),
4253 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
4254 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
4265 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
4266 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
4291 Tmp1 = Node->getOperand(0);
4293 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
4294 Tmp3 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(2));
4310 Tmp1 = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(0));
4311 Tmp2 = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(1));
4323 cast<CondCodeSDNode>(Node->getOperand(2))->get();
4326 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
4327 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
4329 Tmp2, Node->getOperand(2), Node->getFlags()));
4336 cast<CondCodeSDNode>(Node->getOperand(1))->get();
4339 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(2));
4340 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(3));
4342 Node->getOperand(0), Node->getOperand(1),
4342 Node->getOperand(0), Node->getOperand(1),
4343 Tmp1, Tmp2, Node->getOperand(4)));
4354 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4355 Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1));
4362 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4363 Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1));
4364 Tmp3 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(2));
4372 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4373 Tmp2 = Node->getOperand(1);
4402 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4425 SDValue Op = Node->getOperand(I);
4457 SDValue Idx = Node->getOperand(1);
4463 SDValue CastVec = DAG.getNode(ISD::BITCAST, SL, NVT, Node->getOperand(0));
4503 SDValue Val = Node->getOperand(1);
4504 SDValue Idx = Node->getOperand(2);
4511 SDValue CastVec = DAG.getNode(ISD::BITCAST, SL, NVT, Node->getOperand(0));
4541 SDValue Val = Node->getOperand(0);
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 116 return BitConvertToInteger(N->getOperand(0));
130 BitConvertToInteger(N->getOperand(0)),
131 BitConvertToInteger(N->getOperand(1)));
159 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
162 NewOp, N->getOperand(1));
173 SDValue Op = GetSoftenedFloat(N->getOperand(0));
179 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
180 GetSoftenedFloat(N->getOperand(1)) };
182 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
183 N->getOperand(1).getValueType() };
196 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
197 GetSoftenedFloat(N->getOperand(1)) };
199 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
200 N->getOperand(1).getValueType() };
213 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
214 GetSoftenedFloat(N->getOperand(1)) };
216 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
217 N->getOperand(1).getValueType() };
230 SDValue Op = GetSoftenedFloat(N->getOperand(0));
232 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
245 SDValue Op = GetSoftenedFloat(N->getOperand(0));
247 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
259 SDValue LHS = GetSoftenedFloat(N->getOperand(0));
260 SDValue RHS = BitConvertToInteger(N->getOperand(1));
308 SDValue Op = GetSoftenedFloat(N->getOperand(0));
310 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
323 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
324 GetSoftenedFloat(N->getOperand(1)) };
326 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
327 N->getOperand(1).getValueType() };
340 SDValue Op = GetSoftenedFloat(N->getOperand(0));
342 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
355 SDValue Op = GetSoftenedFloat(N->getOperand(0));
357 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
370 SDValue Op = GetSoftenedFloat(N->getOperand(0));
372 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
385 SDValue Op = GetSoftenedFloat(N->getOperand(0));
387 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
400 SDValue Op = GetSoftenedFloat(N->getOperand(0));
402 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
415 SDValue Op = GetSoftenedFloat(N->getOperand(0));
417 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
430 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
431 GetSoftenedFloat(N->getOperand(1)),
432 GetSoftenedFloat(N->getOperand(2)) };
434 EVT OpsVT[3] = { N->getOperand(0).getValueType(),
435 N->getOperand(1).getValueType(),
436 N->getOperand(2).getValueType() };
449 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
450 GetSoftenedFloat(N->getOperand(1)) };
452 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
453 N->getOperand(1).getValueType() };
466 SDValue Op = GetSoftenedFloat(N->getOperand(0));
468 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
487 return DAG.getNode(ISD::XOR, dl, NVT, GetSoftenedFloat(N->getOperand(0)),
493 GetSoftenedFloat(N->getOperand(0)) };
506 SDValue Op = N->getOperand(0);
529 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
538 SDValue Op = N->getOperand(0);
540 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
555 SDValue Op = N->getOperand(0);
565 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
572 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
573 GetSoftenedFloat(N->getOperand(1)) };
575 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
576 N->getOperand(1).getValueType() };
588 assert(N->getOperand(1).getValueType() == MVT::i32 &&
591 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
591 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
593 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
594 N->getOperand(1).getValueType() };
607 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
608 GetSoftenedFloat(N->getOperand(1)) };
610 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
611 N->getOperand(1).getValueType() };
624 SDValue Op = GetSoftenedFloat(N->getOperand(0));
626 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
639 SDValue Op = GetSoftenedFloat(N->getOperand(0));
641 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
654 SDValue Op = GetSoftenedFloat(N->getOperand(0));
656 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
669 SDValue Op = GetSoftenedFloat(N->getOperand(0));
671 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
684 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
685 GetSoftenedFloat(N->getOperand(1)) };
687 EVT OpsVT[2] = { N->getOperand(0).getValueType(),
688 N->getOperand(1).getValueType() };
702 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
704 SDValue Op = GetSoftenedFloat(N->getOperand(0));
706 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
752 SDValue LHS = GetSoftenedFloat(N->getOperand(1));
753 SDValue RHS = GetSoftenedFloat(N->getOperand(2));
755 LHS.getValueType(), N->getOperand(0), LHS, RHS);
759 SDValue LHS = GetSoftenedFloat(N->getOperand(2));
760 SDValue RHS = GetSoftenedFloat(N->getOperand(3));
762 LHS.getValueType(), N->getOperand(0),
763 N->getOperand(1), LHS, RHS, N->getOperand(4));
763 N->getOperand(1), LHS, RHS, N->getOperand(4));
772 SDValue Chain = N->getOperand(0); // Get the chain.
773 SDValue Ptr = N->getOperand(1); // Get the pointer.
779 NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
791 EVT SVT = N->getOperand(0).getValueType();
811 NVT, N->getOperand(0));
814 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
871 SDValue Op0 = GetSoftenedFloat(N->getOperand(0));
878 EVT SVT = N->getOperand(0).getValueType();
880 SDValue Op = GetSoftenedFloat(N->getOperand(0));
889 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
900 EVT SVT = N->getOperand(0).getValueType();
907 SDValue Op = GetSoftenedFloat(N->getOperand(0));
909 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
915 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
915 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
916 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
922 N->getOperand(2), N->getOperand(3));
922 N->getOperand(2), N->getOperand(3));
932 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
934 N->getOperand(4)),
940 EVT SVT = N->getOperand(0).getValueType();
960 SDValue Op = GetSoftenedFloat(N->getOperand(0));
962 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
971 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
971 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
972 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
978 N->getOperand(0), N->getOperand(1));
978 N->getOperand(0), N->getOperand(1));
989 N->getOperand(2), N->getOperand(3),
989 N->getOperand(2), N->getOperand(3),
995 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
995 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
996 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1002 N->getOperand(0), N->getOperand(1));
1002 N->getOperand(0), N->getOperand(1));
1038 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1039 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1041 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1055 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1056 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1058 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1072 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1073 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1075 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1089 SDValue Op = GetSoftenedFloat(N->getOperand(0));
1090 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1092 EVT OpsVT[1] = { N->getOperand(0).getValueType() };
1200 GetExpandedFloat(N->getOperand(0), Lo, Tmp);
1281 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1281 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1356 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1356 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1356 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1371 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1371 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1399 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1408 Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0));
1487 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1487 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1547 SDValue Src = N->getOperand(0);
1631 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1709 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1709 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1710 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1721 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1723 N->getOperand(4)), 0);
1727 assert(N->getOperand(1).getValueType() == MVT::ppcf128 &&
1730 GetExpandedFloat(N->getOperand(1), Lo, Hi);
1734 N->getValueType(0), N->getOperand(0), Hi);
1738 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1741 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1744 N->getValueType(0), Hi, N->getOperand(1));
1751 RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT);
1754 return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), CallOptions, dl).first;
1761 RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT);
1764 return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0),
1769 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1769 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1770 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1782 N->getOperand(2), N->getOperand(3),
1782 N->getOperand(2), N->getOperand(3),
1787 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1787 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1788 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1829 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1837 RVT, N->getOperand(0), CallOptions, SDLoc(N)).first;
1842 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1850 RVT, N->getOperand(0), CallOptions, SDLoc(N)).first;
1855 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1863 RVT, N->getOperand(0), CallOptions, SDLoc(N)).first;
1868 EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1876 RVT, N->getOperand(0), CallOptions, SDLoc(N)).first;
1899 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) {
1933 SDValue Op = N->getOperand(0);
1936 SDValue Promoted = GetPromotedFloat(N->getOperand(0));
1952 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1955 N->getOperand(0), Op1);
1960 SDValue Op = GetPromotedFloat(N->getOperand(0));
1965 SDValue Op = GetPromotedFloat(N->getOperand(0));
1980 SDValue LHS = GetPromotedFloat(N->getOperand(0));
1981 SDValue RHS = GetPromotedFloat(N->getOperand(1));
1984 LHS, RHS, N->getOperand(2), N->getOperand(3),
1984 LHS, RHS, N->getOperand(2), N->getOperand(3),
1985 N->getOperand(4));
1993 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
1994 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1995 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
2009 EVT VT = ST->getOperand(1).getValueType();
2116 N->getOperand(0).getValueType().getSizeInBits());
2117 SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0));
2147 if (isa<ConstantSDNode>(N->getOperand(1))) {
2148 SDValue Vec = N->getOperand(0);
2149 SDValue Idx = N->getOperand(1);
2158 SDValue Res = GetScalarizedVector(N->getOperand(0));
2188 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
2193 NewOp, N->getOperand(1));
2207 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2209 SDValue Op1 = N->getOperand(1);
2220 SDValue Op = GetPromotedFloat(N->getOperand(0));
2231 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2232 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2239 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2240 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2241 SDValue Op2 = GetPromotedFloat(N->getOperand(2));
2250 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2251 SDValue Op1 = N->getOperand(1);
2261 SDValue Op = N->getOperand(0);
2296 SDValue TrueVal = GetPromotedFloat(N->getOperand(1));
2297 SDValue FalseVal = GetPromotedFloat(N->getOperand(2));
2300 N->getOperand(0), TrueVal, FalseVal);
2306 SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
2307 SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
2310 TrueVal.getNode()->getValueType(0), N->getOperand(0),
2311 N->getOperand(1), TrueVal, FalseVal, N->getOperand(4));
2311 N->getOperand(1), TrueVal, FalseVal, N->getOperand(4));
2320 SDValue NV = DAG.getNode(N->getOpcode(), DL, NVT, N->getOperand(0));
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 211 SDValue Op = SExtPromotedInteger(N->getOperand(0));
213 Op.getValueType(), Op, N->getOperand(1));
218 SDValue Op = ZExtPromotedInteger(N->getOperand(0));
220 Op.getValueType(), Op, N->getOperand(1));
236 SDValue Op2 = GetPromotedInteger(N->getOperand(2));
251 EVT SVT = getSetCCResultType(N->getOperand(2).getValueType());
262 N->getChain(), N->getBasePtr(), N->getOperand(2), N->getOperand(3),
262 N->getChain(), N->getBasePtr(), N->getOperand(2), N->getOperand(3),
269 SDValue Op2 = GetPromotedInteger(N->getOperand(2));
270 SDValue Op3 = GetPromotedInteger(N->getOperand(3));
283 SDValue InOp = N->getOperand(0);
321 GetSplitVector(N->getOperand(0), Lo, Hi);
382 SDValue Op = GetPromotedInteger(N->getOperand(0));
394 SDValue Op = GetPromotedInteger(N->getOperand(0));
411 N->getValueType(0)), JoinIntegers(N->getOperand(0),
412 N->getOperand(1)));
431 SDValue Op = ZExtPromotedInteger(N->getOperand(0));
445 SDValue Op = ZExtPromotedInteger(N->getOperand(0));
450 SDValue Op = GetPromotedInteger(N->getOperand(0));
469 SDValue Op0 = N->getOperand(0);
470 SDValue Op1 = N->getOperand(1);
512 { N->getOperand(0), N->getOperand(1) });
512 { N->getOperand(0), N->getOperand(1) });
517 Res = DAG.getNode(NewOpc, dl, NVT, N->getOperand(0));
536 return DAG.getNode(N->getOpcode(), dl, NVT, N->getOperand(0));
550 if (getTypeAction(N->getOperand(0).getValueType())
552 SDValue Res = GetPromotedInteger(N->getOperand(0));
561 DAG.getValueType(N->getOperand(0).getValueType()));
564 N->getOperand(0).getValueType().getScalarType());
571 return DAG.getNode(N->getOpcode(), dl, NVT, N->getOperand(0));
628 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1) };
628 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1) };
632 Ops[2] = N->getOperand(2);
655 SDValue Op1 = N->getOperand(0);
656 SDValue Op2 = N->getOperand(1);
736 Op1Promoted = SExtPromotedInteger(N->getOperand(0));
737 Op2Promoted = SExtPromotedInteger(N->getOperand(1));
739 Op1Promoted = ZExtPromotedInteger(N->getOperand(0));
740 Op2Promoted = ZExtPromotedInteger(N->getOperand(1));
742 EVT OldType = N->getOperand(0).getValueType();
756 Op2Promoted, N->getOperand(2));
762 N->getOperand(2));
771 SDValue LHS = SExtPromotedInteger(N->getOperand(0));
772 SDValue RHS = SExtPromotedInteger(N->getOperand(1));
773 EVT OVT = N->getOperand(0).getValueType();
795 SDValue LHS = GetPromotedInteger(N->getOperand(1));
796 SDValue RHS = GetPromotedInteger(N->getOperand(2));
798 LHS.getValueType(), N->getOperand(0), LHS, RHS);
802 SDValue Mask = N->getOperand(0);
804 SDValue LHS = GetPromotedInteger(N->getOperand(1));
805 SDValue RHS = GetPromotedInteger(N->getOperand(2));
811 SDValue LHS = GetPromotedInteger(N->getOperand(2));
812 SDValue RHS = GetPromotedInteger(N->getOperand(3));
814 LHS.getValueType(), N->getOperand(0),
815 N->getOperand(1), LHS, RHS, N->getOperand(4));
815 N->getOperand(1), LHS, RHS, N->getOperand(4));
819 EVT InVT = N->getOperand(0).getValueType();
838 assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() &&
842 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, N->getOperand(0),
843 N->getOperand(1), N->getOperand(2));
843 N->getOperand(1), N->getOperand(2));
850 SDValue LHS = GetPromotedInteger(N->getOperand(0));
851 SDValue RHS = N->getOperand(1);
858 SDValue Op = GetPromotedInteger(N->getOperand(0));
860 Op.getValueType(), Op, N->getOperand(1));
867 SDValue LHS = GetPromotedInteger(N->getOperand(0));
868 SDValue RHS = GetPromotedInteger(N->getOperand(1));
875 SDValue LHS = SExtPromotedInteger(N->getOperand(0));
876 SDValue RHS = SExtPromotedInteger(N->getOperand(1));
883 SDValue LHS = ZExtPromotedInteger(N->getOperand(0));
884 SDValue RHS = ZExtPromotedInteger(N->getOperand(1));
891 SDValue LHS = SExtPromotedInteger(N->getOperand(0));
892 SDValue RHS = N->getOperand(1);
900 SDValue LHS = ZExtPromotedInteger(N->getOperand(0));
901 SDValue RHS = N->getOperand(1);
910 SDValue InOp = N->getOperand(0);
972 SDValue LHS = ZExtPromotedInteger(N->getOperand(0));
973 SDValue RHS = ZExtPromotedInteger(N->getOperand(1));
974 EVT OVT = N->getOperand(0).getValueType();
1011 SDValue LHS = SExtPromotedInteger(N->getOperand(0));
1012 SDValue RHS = SExtPromotedInteger(N->getOperand(1));
1018 LHS, RHS, N->getOperand(2));
1027 SDValue Op0 = SExtPromotedInteger(N->getOperand(0));
1036 SDValue LHS = N->getOperand(0), RHS = N->getOperand(1);
1036 SDValue LHS = N->getOperand(0), RHS = N->getOperand(1);
1090 SDValue Chain = N->getOperand(0); // Get the chain.
1091 SDValue Ptr = N->getOperand(1); // Get the pointer.
1101 Parts[i] = DAG.getVAArg(RegVT, dl, Chain, Ptr, N->getOperand(2),
1142 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) {
1292 SDValue Op = GetPromotedInteger(N->getOperand(0));
1297 SDValue Op2 = GetPromotedInteger(N->getOperand(2));
1305 return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
1311 SDValue LHS = N->getOperand(2);
1312 SDValue RHS = N->getOperand(3);
1313 PromoteSetCCOperands(LHS, RHS, cast<CondCodeSDNode>(N->getOperand(1))->get());
1317 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1318 N->getOperand(1), LHS, RHS, N->getOperand(4)),
1318 N->getOperand(1), LHS, RHS, N->getOperand(4)),
1326 SDValue Cond = PromoteTargetBoolean(N->getOperand(1), MVT::Other);
1329 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Cond,
1330 N->getOperand(2)), 0);
1335 EVT OVT = N->getOperand(0).getValueType();
1336 SDValue Lo = ZExtPromotedInteger(N->getOperand(0));
1337 SDValue Hi = GetPromotedInteger(N->getOperand(1));
1359 assert(N->getOperand(0).getValueSizeInBits() >=
1365 NewOps.push_back(GetPromotedInteger(N->getOperand(i)));
1377 assert(N->getOperand(1).getValueSizeInBits() >=
1380 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1381 GetPromotedInteger(N->getOperand(1)),
1382 N->getOperand(2)),
1389 SDValue Idx = DAG.getZExtOrTrunc(N->getOperand(2), SDLoc(N),
1391 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1392 N->getOperand(1), Idx), 0);
1399 GetPromotedInteger(N->getOperand(0))), 0);
1406 DAG.UpdateNodeOperands(N, GetPromotedInteger(N->getOperand(0))), 0);
1411 SDValue Cond = N->getOperand(0);
1412 EVT OpTy = N->getOperand(1).getValueType();
1422 return SDValue(DAG.UpdateNodeOperands(N, Cond, N->getOperand(1),
1423 N->getOperand(2)), 0);
1429 SDValue LHS = N->getOperand(0);
1430 SDValue RHS = N->getOperand(1);
1431 PromoteSetCCOperands(LHS, RHS, cast<CondCodeSDNode>(N->getOperand(4))->get());
1434 return SDValue(DAG.UpdateNodeOperands(N, LHS, RHS, N->getOperand(2),
1435 N->getOperand(3), N->getOperand(4)), 0);
1435 N->getOperand(3), N->getOperand(4)), 0);
1441 SDValue LHS = N->getOperand(0);
1442 SDValue RHS = N->getOperand(1);
1443 PromoteSetCCOperands(LHS, RHS, cast<CondCodeSDNode>(N->getOperand(2))->get());
1446 return SDValue(DAG.UpdateNodeOperands(N, LHS, RHS, N->getOperand(2)), 0);
1450 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1451 ZExtPromotedInteger(N->getOperand(1))), 0);
1455 SDValue Op = GetPromotedInteger(N->getOperand(0));
1459 Op, DAG.getValueType(N->getOperand(0).getValueType()));
1464 SExtPromotedInteger(N->getOperand(0))), 0);
1509 SDValue Mask = PromoteTargetBoolean(N->getOperand(OpNo), DataVT);
1522 NewOps[OpNo] = PromoteTargetBoolean(N->getOperand(OpNo), DataVT);
1527 NewOps[OpNo] = SExtPromotedInteger(N->getOperand(OpNo));
1529 NewOps[OpNo] = ZExtPromotedInteger(N->getOperand(OpNo));
1531 NewOps[OpNo] = GetPromotedInteger(N->getOperand(OpNo));
1542 NewOps[OpNo] = PromoteTargetBoolean(N->getOperand(OpNo), DataVT);
1547 NewOps[OpNo] = SExtPromotedInteger(N->getOperand(OpNo));
1549 NewOps[OpNo] = ZExtPromotedInteger(N->getOperand(OpNo));
1551 NewOps[OpNo] = GetPromotedInteger(N->getOperand(OpNo));
1556 SDValue Op = GetPromotedInteger(N->getOperand(0));
1562 ZExtPromotedInteger(N->getOperand(0))), 0);
1567 SDValue Op = GetPromotedInteger(N->getOperand(0));
1570 N->getOperand(0).getValueType().getScalarType());
1576 SDValue LHS = N->getOperand(0);
1577 SDValue RHS = N->getOperand(1);
1578 SDValue Carry = N->getOperand(2);
1587 SDValue Op2 = ZExtPromotedInteger(N->getOperand(2));
1589 DAG.UpdateNodeOperands(N, N->getOperand(0), N->getOperand(1), Op2), 0);
1589 DAG.UpdateNodeOperands(N, N->getOperand(0), N->getOperand(1), Op2), 0);
1594 SDValue Op = ZExtPromotedInteger(N->getOperand(0));
1602 SDValue Op2 = ZExtPromotedInteger(N->getOperand(2));
1603 SDValue Op3 = ZExtPromotedInteger(N->getOperand(3));
1604 SDValue Op4 = ZExtPromotedInteger(N->getOperand(4));
1605 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), N->getOperand(1),
1605 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), N->getOperand(1),
1611 SDValue Op = SExtPromotedInteger(N->getOperand(1));
1612 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op), 0);
1625 Op = GetPromotedInteger(N->getOperand(0));
1629 Op = SExtPromotedInteger(N->getOperand(0));
1633 Op = ZExtPromotedInteger(N->getOperand(0));
1739 N->getOperand(0), N->getOperand(1), N->getOperand(2), N->getOperand(3),
1739 N->getOperand(0), N->getOperand(1), N->getOperand(2), N->getOperand(3),
1739 N->getOperand(0), N->getOperand(1), N->getOperand(2), N->getOperand(3),
1739 N->getOperand(0), N->getOperand(1), N->getOperand(2), N->getOperand(3),
1746 N->getOperand(2), ISD::SETEQ);
1829 GetExpandedInteger(N->getOperand(0), InL, InH);
1842 EVT ShTy = N->getOperand(1).getValueType();
1915 SDValue Amt = N->getOperand(1);
1925 KnownBits Known = DAG.computeKnownBits(N->getOperand(1));
1933 GetExpandedInteger(N->getOperand(0), InL, InH);
2002 SDValue Amt = N->getOperand(1);
2012 GetExpandedInteger(N->getOperand(0), InL, InH);
2101 GetExpandedInteger(N->getOperand(0), LHSL, LHSH);
2102 GetExpandedInteger(N->getOperand(1), RHSL, RHSH);
2130 GetExpandedInteger(N->getOperand(0), LHSL, LHSH);
2131 GetExpandedInteger(N->getOperand(1), RHSL, RHSH);
2257 GetExpandedInteger(N->getOperand(0), LHSL, LHSH);
2258 GetExpandedInteger(N->getOperand(1), RHSL, RHSH);
2283 GetExpandedInteger(N->getOperand(0), LHSL, LHSH);
2284 GetExpandedInteger(N->getOperand(1), RHSL, RHSH);
2286 SDValue LoOps[3] = { LHSL, RHSL, N->getOperand(2) };
2300 SDValue LHS = N->getOperand(0);
2301 SDValue RHS = N->getOperand(1);
2361 GetExpandedInteger(N->getOperand(0), LHSL, LHSH);
2362 GetExpandedInteger(N->getOperand(1), RHSL, RHSH);
2364 SDValue LoOps[3] = { LHSL, RHSL, N->getOperand(2) };
2380 SDValue Op = N->getOperand(0);
2402 GetExpandedInteger(N->getOperand(0), Lo, Hi);
2404 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
2424 GetExpandedInteger(N->getOperand(0), Lo, Hi);
2426 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
2444 GetExpandedInteger(N->getOperand(0), Hi, Lo); // Note swapped operands.
2452 GetExpandedInteger(N->getOperand(0), Hi, Lo); // Note swapped operands.
2476 SDValue N0 = N->getOperand(0);
2494 GetExpandedInteger(N->getOperand(0), Lo, Hi);
2514 GetExpandedInteger(N->getOperand(0), Lo, Hi);
2525 GetExpandedInteger(N->getOperand(0), Lo, Hi);
2559 SDValue Op = N->getOperand(0);
2576 SDValue Op = N->getOperand(0);
2590 EVT VT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
2603 SDValue Op = N->getOperand(0);
2618 EVT VT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
2631 SDValue Op = N->getOperand(0);
2761 GetExpandedInteger(N->getOperand(0), LL, LH);
2762 GetExpandedInteger(N->getOperand(1), RL, RH);
2774 GetExpandedInteger(N->getOperand(0), LL, LH);
2775 GetExpandedInteger(N->getOperand(1), RL, RH);
2841 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
2841 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
2853 SDValue R = DAG.getNode(N->getOpcode(), DL, VTs, N->getOperand(0));
2875 SDValue LHS = N->getOperand(0);
2876 SDValue RHS = N->getOperand(1);
3085 SDValue LHS = Node->getOperand(0);
3086 SDValue RHS = Node->getOperand(1);
3129 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3129 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3160 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(1)))
3191 GetExpandedInteger(N->getOperand(0), LHSL, LHSH);
3197 SDValue ShiftOp = N->getOperand(1);
3248 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3248 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3263 SDValue Op = N->getOperand(0);
3266 Lo = DAG.getNode(ISD::SIGN_EXTEND, dl, NVT, N->getOperand(0));
3293 GetExpandedInteger(N->getOperand(0), Lo, Hi);
3294 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
3299 N->getOperand(1));
3320 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3320 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3348 Lo = DAG.getNode(ISD::TRUNCATE, dl, NVT, N->getOperand(0));
3349 Hi = DAG.getNode(ISD::SRL, dl, N->getOperand(0).getValueType(),
3350 N->getOperand(0),
3374 SDValue LHS = N->getOperand(0), RHS = N->getOperand(1);
3374 SDValue LHS = N->getOperand(0), RHS = N->getOperand(1);
3478 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3478 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3505 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3505 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
3532 SDValue Op = N->getOperand(0);
3535 Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, N->getOperand(0));
3563 cast<AtomicSDNode>(N)->getMemoryVT(), VTs, N->getOperand(0),
3564 N->getOperand(1), Zero, Zero, cast<AtomicSDNode>(N)->getMemOperand());
3591 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
3791 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
3791 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
3792 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
3803 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
3805 N->getOperand(4)), 0);
3809 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
3809 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
3810 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
3822 N->getOperand(2), N->getOperand(3),
3822 N->getOperand(2), N->getOperand(3),
3827 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
3827 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
3828 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
3844 SDValue LHS = N->getOperand(0);
3845 SDValue RHS = N->getOperand(1);
3846 SDValue Carry = N->getOperand(2);
3847 SDValue Cond = N->getOperand(3);
3866 GetExpandedInteger(N->getOperand(1), Lo, Hi);
3867 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Lo), 0);
3875 GetExpandedInteger(N->getOperand(0), Lo, Hi);
3880 SDValue Op = N->getOperand(0);
3897 EVT VT = N->getOperand(1).getValueType();
3974 GetExpandedInteger(N->getOperand(0), InL, InH);
3980 SDValue Op = N->getOperand(0);
4061 N->getOperand(0),
4062 N->getOperand(1), N->getOperand(2),
4062 N->getOperand(1), N->getOperand(2),
4077 SDValue BaseIdx = N->getOperand(1);
4079 SDValue InOp0 = N->getOperand(0);
4081 InOp0 = GetPromotedInteger(N->getOperand(0));
4093 InVT.getVectorElementType(), N->getOperand(0), Index);
4111 SDValue V0 = GetPromotedInteger(N->getOperand(0));
4112 SDValue V1 = GetPromotedInteger(N->getOperand(1));
4136 if (N->getOperand(i).getValueType().bitsLT(NOutVTElem))
4137 Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i));
4139 Op = N->getOperand(i);
4150 assert(!N->getOperand(0).getValueType().isVector() &&
4158 SDValue Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(0));
4166 SDValue SplatVal = N->getOperand(0);
4189 unsigned NumElem = N->getOperand(0).getValueType().getVectorNumElements();
4198 SDValue Op = N->getOperand(i);
4227 if (getTypeAction(N->getOperand(0).getValueType())
4233 Promoted = SExtPromotedInteger(N->getOperand(0));
4236 Promoted = ZExtPromotedInteger(N->getOperand(0));
4239 Promoted = GetPromotedInteger(N->getOperand(0));
4248 return DAG.getNode(N->getOpcode(), dl, NVT, N->getOperand(0));
4259 SDValue V0 = GetPromotedInteger(N->getOperand(0));
4262 NOutVTElem, N->getOperand(1));
4264 V0, ConvElem, N->getOperand(2));
4272 return DAG.getNode(N->getOpcode(), dl, NVT, N->getOperand(0));
4277 SDValue V0 = GetPromotedInteger(N->getOperand(0));
4278 SDValue V1 = DAG.getZExtOrTrunc(N->getOperand(1), dl,
4291 SDValue V0 = GetPromotedInteger(N->getOperand(0));
4295 SDValue Ext = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OutVT, V0, N->getOperand(1));
4310 SDValue Incoming = GetPromotedInteger(N->getOperand(VecIdx));
lib/CodeGen/SelectionDAG/LegalizeTypes.cpp 289 if (IgnoreNodeResults(N->getOperand(i).getNode()))
292 const auto Op = N->getOperand(i);
443 if (!IgnoreNodeResults(Node.getOperand(i).getNode()) &&
444 !isTypeLegal(Node.getOperand(i).getValueType())) {
446 Node.getOperand(i).dump(&DAG);
495 SDValue OrigOp = N->getOperand(i);
943 ReplaceValueWith(SDValue(N, i), SDValue(N->getOperand(i)));
944 return SDValue(N->getOperand(ResNo));
988 SDValue Op = N->getOperand(0);
992 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
992 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
998 Ops[i] = N->getOperand(i);
1008 SDValue InChain = Node->getOperand(0);
1013 EVT ArgVT = Node->getOperand(i).getValueType();
1015 Entry.Node = Node->getOperand(i);
lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp 43 SDValue InOp = N->getOperand(0);
189 Lo = N->getOperand(0);
190 Hi = N->getOperand(1);
195 GetExpandedOp(N->getOperand(0), Lo, Hi);
196 SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ?
207 SDValue OldVec = N->getOperand(0);
223 OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0));
232 SDValue Idx = N->getOperand(1);
289 SDValue Chain = N->getOperand(0);
290 SDValue Ptr = N->getOperand(1);
294 Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align);
295 Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0);
334 N->getOperand(0).getValueType().isInteger()) {
345 EVT OVT = N->getOperand(0).getValueType();
357 IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType());
365 return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
372 EVT OldVT = N->getOperand(0).getValueType();
386 GetExpandedOp(N->getOperand(i), Lo, Hi);
402 GetExpandedOp(N->getOperand(0), Lo, Hi);
403 return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo;
412 SDValue Val = N->getOperand(1);
423 NewVecVT, N->getOperand(0));
430 SDValue Idx = N->getOperand(2);
445 assert(VT.getVectorElementType() == N->getOperand(0).getValueType() &&
449 Ops[0] = N->getOperand(0);
509 GetSplitOp(N->getOperand(1), LL, LH);
510 GetSplitOp(N->getOperand(2), RL, RH);
512 SDValue Cond = N->getOperand(0);
516 std::tie(CL, CH) = DAG.SplitVector(Res->getOperand(0), dl);
547 GetSplitOp(N->getOperand(2), LL, LH);
548 GetSplitOp(N->getOperand(3), RL, RH);
550 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
551 N->getOperand(1), LL, RL, N->getOperand(4));
551 N->getOperand(1), LL, RL, N->getOperand(4));
552 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
553 N->getOperand(1), LH, RH, N->getOperand(4));
553 N->getOperand(1), LH, RH, N->getOperand(4));
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp 479 Node->getOperand(0).getValueType());
951 EVT OrigTy = cast<VTSDNode>(Op->getOperand(1))->getVT();
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 200 SDValue LHS = GetScalarizedVector(N->getOperand(0));
201 SDValue RHS = GetScalarizedVector(N->getOperand(1));
207 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
208 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
209 SDValue Op2 = GetScalarizedVector(N->getOperand(2));
215 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
216 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
217 SDValue Op2 = N->getOperand(2);
225 SDValue Chain = N->getOperand(0);
236 SDValue Oper = N->getOperand(i);
260 ScalarLHS = GetScalarizedVector(N->getOperand(0));
261 ScalarRHS = GetScalarizedVector(N->getOperand(1));
264 DAG.ExtractVectorElements(N->getOperand(0), ElemsLHS);
265 DAG.ExtractVectorElements(N->getOperand(1), ElemsRHS);
296 SDValue Op = N->getOperand(0);
308 SDValue InOp = N->getOperand(0);
319 N->getOperand(0), N->getOperand(1));
319 N->getOperand(0), N->getOperand(1));
324 SDValue Op = GetScalarizedVector(N->getOperand(0));
326 NewVT, Op, N->getOperand(1));
331 SDValue Op = GetScalarizedVector(N->getOperand(1));
334 { N->getOperand(0), Op, N->getOperand(2) });
334 { N->getOperand(0), Op, N->getOperand(2) });
342 SDValue Op = GetScalarizedVector(N->getOperand(0));
344 Op.getValueType(), Op, N->getOperand(1));
350 SDValue Op = N->getOperand(1);
378 SDValue Op = N->getOperand(0);
401 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
402 SDValue LHS = GetScalarizedVector(N->getOperand(0));
409 SDValue Op = N->getOperand(0);
439 SDValue InOp = N->getOperand(0);
446 SDValue Cond = N->getOperand(0);
461 SDValue LHS = GetScalarizedVector(N->getOperand(1));
475 EVT OpVT = Cond->getOperand(0).getValueType();
511 GetScalarizedVector(N->getOperand(2)));
515 SDValue LHS = GetScalarizedVector(N->getOperand(1));
517 LHS.getValueType(), N->getOperand(0), LHS,
518 GetScalarizedVector(N->getOperand(2)));
522 SDValue LHS = GetScalarizedVector(N->getOperand(2));
524 N->getOperand(0), N->getOperand(1),
524 N->getOperand(0), N->getOperand(1),
525 LHS, GetScalarizedVector(N->getOperand(3)),
526 N->getOperand(4));
535 SDValue Arg = N->getOperand(2).getOperand(0);
539 return GetScalarizedVector(N->getOperand(Op));
544 N->getOperand(0).getValueType().isVector() &&
546 SDValue LHS = N->getOperand(0);
547 SDValue RHS = N->getOperand(1);
568 N->getOperand(2));
670 SDValue Elt = GetScalarizedVector(N->getOperand(0));
680 SDValue Elt = GetScalarizedVector(N->getOperand(0));
693 SDValue Elt = GetScalarizedVector(N->getOperand(1));
696 { N->getOperand(0), Elt });
709 Ops[i] = GetScalarizedVector(N->getOperand(i));
717 SDValue Res = GetScalarizedVector(N->getOperand(0));
729 SDValue ScalarCond = GetScalarizedVector(N->getOperand(0));
732 return DAG.getNode(ISD::SELECT, SDLoc(N), VT, ScalarCond, N->getOperand(1),
733 N->getOperand(2));
741 N->getOperand(0).getValueType().isVector() &&
746 SDValue LHS = GetScalarizedVector(N->getOperand(0));
747 SDValue RHS = GetScalarizedVector(N->getOperand(1));
749 EVT OpVT = N->getOperand(0).getValueType();
754 N->getOperand(2));
775 N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
780 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
789 SDValue Elt = GetScalarizedVector(N->getOperand(0));
792 N->getOperand(1));
799 SDValue Elt = GetScalarizedVector(N->getOperand(1));
803 { N->getOperand(0), Elt, N->getOperand(2) });
803 { N->getOperand(0), Elt, N->getOperand(2) });
811 SDValue Res = GetScalarizedVector(N->getOperand(0));
1017 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
1019 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
1031 GetSplitVector(N->getOperand(0), Op0Lo, Op0Hi);
1033 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi);
1035 GetSplitVector(N->getOperand(2), Op2Lo, Op2Hi);
1046 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
1048 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
1050 SDValue Op2 = N->getOperand(2);
1065 SDValue InOp = N->getOperand(0);
1133 Lo = N->getOperand(0);
1134 Hi = N->getOperand(1);
1150 SDValue Vec = N->getOperand(0);
1151 SDValue Idx = N->getOperand(1);
1166 SDValue Vec = N->getOperand(0);
1167 SDValue SubVec = N->getOperand(1);
1168 SDValue Idx = N->getOperand(2);
1221 GetSplitVector(N->getOperand(0), Lo, Hi);
1222 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
1223 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
1229 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
1233 SDValue RHS = N->getOperand(1);
1248 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
1253 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT());
1264 SDValue N0 = N->getOperand(0);
1302 SDValue Chain = N->getOperand(0);
1316 SDValue Op = N->getOperand(i);
1350 SDValue Chain = N->getOperand(0);
1373 SDValue Operand = N->getOperand(j);
1417 GetSplitVector(N->getOperand(0), LoLHS, HiLHS);
1418 GetSplitVector(N->getOperand(1), LoRHS, HiRHS);
1449 SDValue Vec = N->getOperand(0);
1450 SDValue Elt = N->getOperand(1);
1451 SDValue Idx = N->getOperand(2);
1531 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
1706 N->getOperand(0).getValueType().isVector() &&
1715 if (getTypeAction(N->getOperand(0).getValueType()) ==
1717 GetSplitVector(N->getOperand(0), LL, LH);
1721 if (getTypeAction(N->getOperand(1).getValueType()) ==
1723 GetSplitVector(N->getOperand(1), RL, RH);
1727 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
1728 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
1741 EVT InVT = N->getOperand(OpNo).getValueType();
1743 GetSplitVector(N->getOperand(OpNo), Lo, Hi);
1748 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
1749 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
1752 { N->getOperand(0), Lo, N->getOperand(2) });
1752 { N->getOperand(0), Lo, N->getOperand(2) });
1754 { N->getOperand(0), Hi, N->getOperand(2) });
1754 { N->getOperand(0), Hi, N->getOperand(2) });
1760 { N->getOperand(0), Lo });
1762 { N->getOperand(0), Hi });
1777 EVT SrcVT = N->getOperand(0).getValueType();
1810 DAG.getNode(N->getOpcode(), dl, NewSrcVT, N->getOperand(0));
1828 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
1829 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
1935 SDValue Chain = N->getOperand(0);
1936 SDValue Ptr = N->getOperand(1);
1937 SDValue SV = N->getOperand(2);
1966 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
2008 if (N->getValueType(0).bitsLT(N->getOperand(0).getValueType()))
2078 SDValue Mask = N->getOperand(0);
2079 SDValue Src0 = N->getOperand(1);
2080 SDValue Src1 = N->getOperand(2);
2086 GetSplitVector(N->getOperand(0), Lo, Hi);
2112 SDValue VecOp = N->getOperand(OpNo);
2154 GetSplitVector(N->getOperand(N->isStrictFPOpcode() ? 1 : 0), Lo, Hi);
2162 { N->getOperand(0), Lo });
2164 { N->getOperand(0), Hi });
2187 GetSplitVector(N->getOperand(0), Lo, Hi);
2201 SDValue Idx = N->getOperand(1);
2204 GetSplitVector(N->getOperand(0), Lo, Hi);
2221 SDValue Vec = N->getOperand(0);
2222 SDValue Idx = N->getOperand(1);
2492 GetSplitVector(N->getOperand(1), Lo, Hi);
2565 SDValue InVec = N->getOperand(0);
2628 N->getOperand(0).getValueType().isVector() &&
2633 GetSplitVector(N->getOperand(0), Lo0, Hi0);
2634 GetSplitVector(N->getOperand(1), Lo1, Hi1);
2639 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
2640 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
2643 EVT OpVT = N->getOperand(0).getValueType();
2655 GetSplitVector(N->getOperand(N->isStrictFPOpcode() ? 1 : 0), Lo, Hi);
2663 { N->getOperand(0), Lo, N->getOperand(2) });
2663 { N->getOperand(0), Lo, N->getOperand(2) });
2665 { N->getOperand(0), Hi, N->getOperand(2) });
2665 { N->getOperand(0), Hi, N->getOperand(2) });
2672 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
2673 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
2911 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2912 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2913 SDValue InOp3 = GetWidenedVector(N->getOperand(2));
2921 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2922 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2930 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2931 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2932 SDValue InOp3 = N->getOperand(2);
3034 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
3035 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
3045 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
3046 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
3122 InOps.push_back(N->getOperand(0));
3126 SDValue Oper = N->getOperand(i);
3219 WideLHS = GetWidenedVector(N->getOperand(0));
3220 WideRHS = GetWidenedVector(N->getOperand(1));
3231 N->getOperand(0), Zero);
3234 N->getOperand(1), Zero);
3258 SDValue InOp = N->getOperand(0);
3272 InOp = GetWidenedVector(N->getOperand(0));
3278 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1), Flags);
3307 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1), Flags);
3317 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1), Flags);
3334 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1), Flags);
3341 SDValue InOp = N->getOperand(1);
3379 SDValue InOp = N->getOperand(0);
3433 if (N->getOperand(0).getValueType() == N->getOperand(1).getValueType())
3433 if (N->getOperand(0).getValueType() == N->getOperand(1).getValueType())
3443 SDValue InOp = GetWidenedVector(N->getOperand(0));
3444 SDValue ShOp = N->getOperand(1);
3450 SDValue InOp = GetWidenedVector(N->getOperand(0));
3451 SDValue ShOp = N->getOperand(1);
3470 SDValue InOp = GetWidenedVector(N->getOperand(0));
3477 cast<VTSDNode>(N->getOperand(1))->getVT()
3480 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
3491 SDValue InOp = N->getOperand(0);
3578 EVT EltVT = N->getOperand(0).getValueType();
3592 EVT InVT = N->getOperand(0).getValueType();
3608 Ops[i] = N->getOperand(i);
3619 if (!N->getOperand(i).isUndef())
3625 return GetWidenedVector(N->getOperand(0));
3635 GetWidenedVector(N->getOperand(0)),
3636 GetWidenedVector(N->getOperand(1)),
3647 SDValue InOp = N->getOperand(i);
3665 SDValue InOp = N->getOperand(0);
3666 SDValue Idx = N->getOperand(1);
3703 SDValue InOp = GetWidenedVector(N->getOperand(0));
3706 N->getOperand(1), N->getOperand(2));
3706 N->getOperand(1), N->getOperand(2));
3798 WidenVT, N->getOperand(0));
3820 if (!N->getOperand(i)->isUndef())
3851 Ops.push_back(InMask->getOperand(i));
3900 SDValue Cond = N->getOperand(0);
3929 EVT SetCCOpVT = Cond->getOperand(0).getValueType();
3946 SDValue VSelOp1 = N->getOperand(1);
3947 SDValue VSelOp2 = N->getOperand(2);
3964 Cond->getOperand(0).getOpcode() == ISD::SETCC &&
3965 Cond->getOperand(1).getOpcode() == ISD::SETCC) {
3967 SDValue SETCC0 = Cond->getOperand(0);
3968 SDValue SETCC1 = Cond->getOperand(1);
4008 SDValue Cond1 = N->getOperand(0);
4035 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
4036 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
4043 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
4044 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
4046 InOp1.getValueType(), N->getOperand(0),
4047 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
4047 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
4063 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
4064 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
4082 N->getOperand(0).getValueType().isVector() &&
4087 SDValue InOp1 = N->getOperand(0);
4103 SDValue InOp2 = N->getOperand(1);
4119 WidenVT, InOp1, InOp2, N->getOperand(2));
4132 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
4215 SDValue InOp = N->getOperand(0);
4285 SDValue InOp = N->getOperand(N->isStrictFPOpcode() ? 1 : 0);
4301 { N->getOperand(0), InOp });
4342 SDValue InOp = GetWidenedVector(N->getOperand(0));
4385 EVT InVT = N->getOperand(0).getValueType();
4394 if (!N->getOperand(i).isUndef())
4398 return GetWidenedVector(N->getOperand(0));
4409 SDValue InOp = N->getOperand(i);
4423 SDValue InOp = GetWidenedVector(N->getOperand(0));
4425 N->getValueType(0), InOp, N->getOperand(1));
4429 SDValue InOp = GetWidenedVector(N->getOperand(0));
4431 N->getValueType(0), InOp, N->getOperand(1));
4549 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
4550 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
4567 SVT, InOp0, InOp1, N->getOperand(2));
4577 EVT OpVT = N->getOperand(0).getValueType();
4585 SDValue Op = GetWidenedVector(N->getOperand(0));
4586 EVT OrigVT = N->getOperand(0).getValueType();
4646 SDValue Cond = GetWidenedVector(N->getOperand(0));
4647 SDValue LeftIn = DAG.WidenVector(N->getOperand(1), SDLoc(N));
4648 SDValue RightIn = DAG.WidenVector(N->getOperand(2), SDLoc(N));
lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp 130 const SDValue &Op = ScegN->getOperand(i);
335 const SDValue &Op = SU->getNode()->getOperand(i);
485 const SDValue &Op = ScegN->getOperand(i);
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 486 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
491 cast<ConstantSDNode>(Node->getOperand(i))->getZExtValue();
500 unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
677 const SDValue &Op = N->getOperand(NumLeft-1);
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 324 unsigned Reg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
333 unsigned DstRCIdx = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
1366 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
1371 cast<ConstantSDNode>(Node->getOperand(i))->getZExtValue();
1380 unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
1420 const SDValue &OptionalDef = Node->getOperand(i - Node->getNumValues());
2364 cast<RegisterSDNode>(PredSU->getNode()->getOperand(1))->getReg();
2385 cast<RegisterSDNode>(SuccSU->getNode()->getOperand(1))->getReg();
2824 SDNode *DU = SU->getNode()->getOperand(i).getNode();
2956 cast<RegisterSDNode>(N->getOperand(1))->getReg()))
3003 cast<RegisterSDNode>(N->getOperand(1))->getReg()))
3070 SDNode *DU = SU.getNode()->getOperand(j).getNode();
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp 117 unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
121 unsigned ResNo = User->getOperand(2).getResNo();
123 cast<RegisterSDNode>(Def->getOperand(1))->getReg() == Reg) {
169 N->getOperand(N->getNumOperands()-1).getValueType() == MVT::Glue) {
203 if (Node->getOperand(NumOps-1).getValueType() == MVT::Other)
204 Chain = Node->getOperand(NumOps-1).getNode();
369 N->getOperand(N->getNumOperands()-1).getValueType() == MVT::Glue) {
370 N = N->getOperand(N->getNumOperands()-1).getNode();
428 SDNode *SrcN = SUNode->getOperand(2).getNode();
473 SDNode *OpN = N->getOperand(i).getNode();
479 EVT OpVT = N->getOperand(i).getValueType();
651 unsigned DefIdx = Use->getOperand(OpIdx).getResNo();
658 unsigned Reg = cast<RegisterSDNode>(Use->getOperand(1))->getReg();
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 155 N = N->getOperand(0).getNode();
162 while (i != e && N->getOperand(i).isUndef())
176 SDValue NotZero = N->getOperand(i);
191 if (N->getOperand(i) != NotZero && !N->getOperand(i).isUndef())
191 if (N->getOperand(i) != NotZero && !N->getOperand(i).isUndef())
199 N = N->getOperand(0).getNode();
801 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
801 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
803 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
805 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
820 assert(I->getValueType() == N->getOperand(0).getValueType() &&
1675 V = V->getOperand(0);
1703 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1747 SDValue Op0 = SV.getOperand(0);
1748 SDValue Op1 = SV.getOperand(1);
1899 const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
1901 SDValue Tmp1 = Node->getOperand(0);
1902 SDValue Tmp2 = Node->getOperand(1);
1935 const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
1936 const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
1938 getLoad(TLI.getPointerTy(getDataLayout()), dl, Node->getOperand(0),
1939 Node->getOperand(2), MachinePointerInfo(VS));
1940 return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
2404 auto *SA = dyn_cast<ConstantSDNode>(BV->getOperand(i));
4847 SDValue V1 = BV1 ? BV1->getOperand(I) : getUNDEF(SVT);
4848 SDValue V2 = BV2 ? BV2->getOperand(I) : getUNDEF(SVT);
4948 SDValue ScalarOp = InBV->getOperand(i);
7452 if (Op == N->getOperand(0)) return N;
7477 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
7477 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
7791 SDValue InputChain = Node->getOperand(0);
7797 Ops.push_back(Node->getOperand(i));
8093 SDValue N0 = N.getOperand(0);
8094 SDValue N1 = N.getOperand(1);
9020 !isNullConstant(Extract->getOperand(1)))
9024 SDValue Op = Extract->getOperand(0);
9095 if (!Shuffle || Shuffle->getOperand(0) != Op)
9131 SDValue Operand = N->getOperand(j);
9202 ExtractVectorElements(N->getOperand(0), LHSScalars, 0, NE);
9203 ExtractVectorElements(N->getOperand(1), RHSScalars, 0, NE);
9386 SDValue OpVal = getOperand(i);
9440 SDValue Op = getOperand(i);
9453 assert(getOperand(FirstDemandedIdx).isUndef() &&
9455 return getOperand(FirstDemandedIdx);
lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp 195 if (auto *C = dyn_cast<ConstantSDNode>(Base->getOperand(1)))
196 if (DAG.MaskedValueIsZero(Base->getOperand(0), C->getAPIntValue())) {
198 Base = DAG.getTargetLoweringInfo().unwrapAddress(Base->getOperand(0));
203 if (auto *C = dyn_cast<ConstantSDNode>(Base->getOperand(1))) {
205 Base = DAG.getTargetLoweringInfo().unwrapAddress(Base->getOperand(0));
240 if (Base->getOperand(1)->getOpcode() == ISD::MUL)
244 Index = Base->getOperand(1);
245 SDValue PotentialBase = Base->getOperand(0);
249 Index = Index->getOperand(0);
255 !isa<ConstantSDNode>(Index->getOperand(1)))
258 Offset += cast<ConstantSDNode>(Index->getOperand(1))->getSExtValue();
259 Index = Index->getOperand(0);
261 Index = Index->getOperand(0);
276 return BaseIndexOffset(LN->getOperand(1), SDValue(), LN->getOffset(),
278 return BaseIndexOffset(LN->getOperand(1), SDValue(), false);
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 1063 if (PendingExports[i].getNode()->getOperand(0) == Root)
8795 CallEnd = CallEnd->getOperand(0).getNode();
8801 SDNode *Call = CallEnd->getOperand(0).getNode();
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 145 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
885 const SDValue Op = N->getOperand(i);
957 printOperand(OS, G, getOperand(i));
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 761 unsigned DestReg = cast<RegisterSDNode>(N->getOperand(1))->getReg();
766 SDValue Src = N->getOperand(2);
2233 MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(Op->getOperand(1));
2239 Op->getOperand(0), dl, Reg, Op->getValueType(0));
2247 MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(Op->getOperand(1));
2250 Op->getOperand(2).getValueType(),
2253 Op->getOperand(0), dl, Reg, Op->getOperand(2));
2253 Op->getOperand(0), dl, Reg, Op->getOperand(2));
2351 return ChainNodesMatched[0]->getOperand(0);
2375 AddChains(Worklist.pop_back_val()->getOperand(0));
2579 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1));
2592 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1));
2782 ReplaceUses(SDValue(NodeToMatch, 0), NodeToMatch->getOperand(0));
2955 RecordedNodes.push_back(std::make_pair(N->getOperand(ChildNo),
2972 N->getOperand(N->getNumOperands()-1).getValueType() == MVT::Glue)
2973 InputGlue = N->getOperand(N->getNumOperands()-1);
3424 SDValue V = NodeToMatch->getOperand(i);
3624 auto *C = dyn_cast<ConstantSDNode>(N->getOperand(1));
3629 if (auto *FN = dyn_cast<FrameIndexSDNode>(N->getOperand(0))) {
3652 bool HasInputChain = N->getOperand(0).getValueType() == MVT::Other;
3654 cast<ConstantSDNode>(N->getOperand(HasInputChain))->getZExtValue();
lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp 68 std::advance(NI, I.getNode()->getOperand(I.getOperand()).getResNo());
97 SDValue Op = EI.getNode()->getOperand(EI.getOperand());
lib/CodeGen/SelectionDAG/StatepointLowering.cpp 340 CallEnd = CallEnd->getOperand(0).getNode();
343 CallEnd = CallEnd->getOperand(0).getNode();
347 return std::make_pair(ReturnValue, CallEnd->getOperand(0).getNode());
680 SDValue Chain = CallNode->getOperand(0);
686 Glue = CallNode->getOperand(CallNode->getNumOperands() - 1);
742 SDValue CallTarget = SDValue(CallNode->getOperand(1).getNode(), 0);
lib/CodeGen/SelectionDAG/TargetLowering.cpp 92 unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
2057 SDValue Elt = BV->getOperand(Index);
2861 if (!(C01 = dyn_cast<ConstantSDNode>(N0->getOperand(1))))
2864 SDValue X = N0->getOperand(0);
3154 MinBits = N0->getOperand(0).getValueSizeInBits();
3155 PreExt = N0->getOperand(0);
3158 if (auto *C = dyn_cast<ConstantSDNode>(N0->getOperand(1)))
3161 PreExt = N0->getOperand(0);
3165 MinBits = N0->getOperand(0).getValueSizeInBits();
3166 PreExt = N0->getOperand(0);
3209 SDValue TopSetCC = N0->getOperand(0);
3275 EVT PtrType = Lod->getOperand(1).getValueType();
3946 SDValue N1 = N->getOperand(0);
3947 SDValue N2 = N->getOperand(1);
4565 SDValue Op0 = N->getOperand(0);
4566 SDValue Op1 = N->getOperand(1);
4686 SDValue N0 = N->getOperand(0);
4687 SDValue N1 = N->getOperand(1);
4804 SDValue N0 = N->getOperand(0);
4805 SDValue N1 = N->getOperand(1);
5775 N->getOperand(0), N->getOperand(1), Result, HiLoVT,
5775 N->getOperand(0), N->getOperand(1), Result, HiLoVT,
5797 SDValue X = Node->getOperand(0);
5798 SDValue Y = Node->getOperand(1);
5799 SDValue Z = Node->getOperand(2);
5839 SDValue Op0 = Node->getOperand(0);
5840 SDValue Op1 = Node->getOperand(1);
5881 SDValue Src = Node->getOperand(OpNo);
5954 SDValue Src = Node->getOperand(OpNo);
5978 { Node->getOperand(0), Src });
6003 { Node->getOperand(0), Src, Cst });
6036 SDValue Src = Node->getOperand(0);
6126 SDValue Quiet0 = Node->getOperand(0);
6127 SDValue Quiet1 = Node->getOperand(1);
6151 return DAG.getNode(IEEE2018Op, dl, VT, Node->getOperand(0),
6152 Node->getOperand(1), Node->getFlags());
6164 SDValue Op = Node->getOperand(0);
6224 SDValue Op = Node->getOperand(0);
6276 SDValue Op = Node->getOperand(0);
6332 SDValue Op = N->getOperand(0);
6884 SDValue LHS = Node->getOperand(0);
6885 SDValue RHS = Node->getOperand(1);
6971 SDValue LHS = Node->getOperand(0);
6972 SDValue RHS = Node->getOperand(1);
7105 SDValue LHS = Node->getOperand(0);
7106 SDValue RHS = Node->getOperand(1);
7134 SDValue LHS = Node->getOperand(0);
7135 SDValue RHS = Node->getOperand(1);
7176 SDValue LHS = Node->getOperand(0);
7177 SDValue RHS = Node->getOperand(1);
7340 SDValue Op = Node->getOperand(0);
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 149 auto Opnd0 = N->getOperand(0);
266 isIntImmediate(N->getOperand(1).getNode(), Imm);
508 SDValue SV = DL->getOperand(0);
516 ConstantSDNode *DLidx = cast<ConstantSDNode>(DL->getOperand(1).getNode());
543 SDValue Op0 = N->getOperand(0);
544 SDValue Op1 = N->getOperand(1);
592 if (!checkV64LaneV128(N->getOperand(1), N->getOperand(2), SMULLOp0, SMULLOp1,
592 if (!checkV64LaneV128(N->getOperand(1), N->getOperand(2), SMULLOp0, SMULLOp1,
1143 Ops.push_back(N->getOperand(1));
1145 Ops.push_back(N->getOperand(NumVecs + ExtOff + 1));
1247 SDValue Chain = N->getOperand(0);
1249 SDValue Ops[] = {N->getOperand(2), // Mem operand;
1273 SDValue Chain = N->getOperand(0);
1275 SDValue Ops[] = {N->getOperand(1), // Mem operand
1276 N->getOperand(2), // Incremental
1304 EVT VT = N->getOperand(2)->getValueType(0);
1311 SDValue Ops[] = {RegSeq, N->getOperand(NumVecs + 2), N->getOperand(0)};
1311 SDValue Ops[] = {RegSeq, N->getOperand(NumVecs + 2), N->getOperand(0)};
1324 EVT VT = N->getOperand(2)->getValueType(0);
1334 N->getOperand(NumVecs + 1), // base register
1335 N->getOperand(NumVecs + 2), // Incremental
1336 N->getOperand(0)}; // Chain
1395 cast<ConstantSDNode>(N->getOperand(NumVecs + 2))->getZExtValue();
1398 N->getOperand(NumVecs + 3), N->getOperand(0)};
1398 N->getOperand(NumVecs + 3), N->getOperand(0)};
1435 cast<ConstantSDNode>(N->getOperand(NumVecs + 1))->getZExtValue();
1440 N->getOperand(NumVecs + 2), // Base register
1441 N->getOperand(NumVecs + 3), // Incremental
1442 N->getOperand(0)};
1474 EVT VT = N->getOperand(2)->getValueType(0);
1487 cast<ConstantSDNode>(N->getOperand(NumVecs + 2))->getZExtValue();
1490 N->getOperand(NumVecs + 3), N->getOperand(0)};
1490 N->getOperand(NumVecs + 3), N->getOperand(0)};
1503 EVT VT = N->getOperand(2)->getValueType(0);
1519 cast<ConstantSDNode>(N->getOperand(NumVecs + 1))->getZExtValue();
1522 N->getOperand(NumVecs + 2), // Base Register
1523 N->getOperand(NumVecs + 3), // Incremental
1524 N->getOperand(0)};
1562 const SDNode *Op0 = N->getOperand(0).getNode();
1576 isOpcWithIntImmediate(Op0->getOperand(0).getNode(), ISD::SRL, SrlImm)) {
1578 Opd0 = Widen(CurDAG, Op0->getOperand(0).getOperand(0));
1583 isOpcWithIntImmediate(Op0->getOperand(0).getNode(), ISD::SRL,
1586 Opd0 = Op0->getOperand(0).getOperand(0);
1591 Opd0 = Op0->getOperand(0);
1598 Opd0 = N->getOperand(0);
1636 SDValue Op = N->getOperand(0);
1638 Op = Op->getOperand(0);
1648 unsigned Width = cast<VTSDNode>(N->getOperand(1))->getVT().getSizeInBits();
1680 if (!isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, AndMask))
1683 Opd0 = N->getOperand(0).getOperand(0);
1686 if (!isIntImmediate(N->getOperand(1), SrlImm))
1726 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SHL, ShlImm)) {
1727 Opd0 = N->getOperand(0).getOperand(0);
1729 N->getOperand(0).getNode()->getOpcode() == ISD::TRUNCATE) {
1734 Opd0 = N->getOperand(0).getOperand(0);
1742 Opd0 = N->getOperand(0);
1756 if (!isIntImmediate(N->getOperand(1), SrlImm))
1776 EVT NarrowVT = N->getOperand(0)->getValueType(0);
1781 SDValue Op = N->getOperand(0);
1828 Opd0 = N->getOperand(0);
1829 Immr = cast<ConstantSDNode>(N->getOperand(1).getNode())->getZExtValue();
1830 Imms = cast<ConstantSDNode>(N->getOperand(2).getNode())->getZExtValue();
2052 if (UserNode->getOperand(1) != Orig)
2062 if (UserNode->getOperand(0) != Orig)
2069 if (UserNode->getOperand(0) != Orig)
2213 SDValue And = N->getOperand(0);
2320 SDValue OrOpd0Val = N->getOperand(I % 2);
2322 SDValue OrOpd1Val = N->getOperand((I + 1) % 2);
2377 Dst = OrOpd1->getOperand(0);
2396 SDValue And0 = N->getOperand(0);
2397 SDValue And1 = N->getOperand(1);
2412 SDValue Src = And1->getOperand(0);
2413 SDValue Dst = And0->getOperand(0);
2524 SDValue ShiftAmt = N->getOperand(1);
2531 ShiftAmt = ShiftAmt->getOperand(0);
2534 SDValue Add0 = ShiftAmt->getOperand(0);
2535 SDValue Add1 = ShiftAmt->getOperand(1);
2576 NewShiftAmt = ShiftAmt->getOperand(0);
2590 SDValue Ops[] = {N->getOperand(0), NewShiftAmt};
2603 if (LN->getOperand(1).getOpcode() != AArch64ISD::ADDlow ||
2604 !isa<ConstantPoolSDNode>(LN->getOperand(1)->getOperand(1)))
2604 !isa<ConstantPoolSDNode>(LN->getOperand(1)->getOperand(1)))
2608 dyn_cast<ConstantPoolSDNode>(LN->getOperand(1)->getOperand(1));
2608 dyn_cast<ConstantPoolSDNode>(LN->getOperand(1)->getOperand(1));
2675 const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(N->getOperand(1));
2684 N->getOperand(0)));
2701 N->getOperand(0)));
2709 N->getOperand(0)));
2721 const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(N->getOperand(1));
2730 N->getOperand(2), N->getOperand(0)));
2730 N->getOperand(2), N->getOperand(0)));
2741 assert (isa<ConstantSDNode>(N->getOperand(2))
2744 uint64_t Immed = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
2757 N->getOperand(0)));
2774 N->getOperand(2), N->getOperand(0)));
2774 N->getOperand(2), N->getOperand(0)));
2801 SDValue Ops[] = {N->getOperand(1), N->getOperand(2), N->getOperand(3),
2801 SDValue Ops[] = {N->getOperand(1), N->getOperand(2), N->getOperand(3),
2801 SDValue Ops[] = {N->getOperand(1), N->getOperand(2), N->getOperand(3),
2802 N->getOperand(0)};
2821 if (!(isa<FrameIndexSDNode>(N->getOperand(1)))) {
2825 SDValue IRG_SP = N->getOperand(2);
2827 cast<ConstantSDNode>(IRG_SP->getOperand(1))->getZExtValue() !=
2834 int FI = cast<FrameIndexSDNode>(N->getOperand(1))->getIndex();
2837 int TagOffset = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue();
2841 {FiOp, CurDAG->getTargetConstant(0, DL, MVT::i64), N->getOperand(2),
2848 assert(isa<ConstantSDNode>(N->getOperand(3)) &&
2857 int TagOffset = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue();
2859 {N->getOperand(1), N->getOperand(2)});
2859 {N->getOperand(1), N->getOperand(2)});
2861 {SDValue(N1, 0), N->getOperand(2)});
2971 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
2979 SDValue MemAddr = Node->getOperand(2);
2981 SDValue Chain = Node->getOperand(0);
2998 SDValue Chain = Node->getOperand(0);
2999 SDValue ValLo = Node->getOperand(2);
3000 SDValue ValHi = Node->getOperand(3);
3001 SDValue MemAddr = Node->getOperand(4);
3315 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
3361 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
3363 VT = Node->getOperand(2)->getValueType(0);
3952 VT = Node->getOperand(1).getValueType();
3981 VT = Node->getOperand(1).getValueType();
4010 VT = Node->getOperand(1).getValueType();
4039 VT = Node->getOperand(1).getValueType();
4068 VT = Node->getOperand(1).getValueType();
4097 VT = Node->getOperand(1).getValueType();
4126 VT = Node->getOperand(1).getValueType();
4146 VT = Node->getOperand(1).getValueType();
4166 VT = Node->getOperand(1).getValueType();
lib/Target/AArch64/AArch64ISelLowering.cpp 1060 Known = DAG.computeKnownBits(Op->getOperand(0), Depth + 1);
1061 Known2 = DAG.computeKnownBits(Op->getOperand(1), Depth + 1);
1075 ConstantSDNode *CN = cast<ConstantSDNode>(Op->getOperand(1));
1755 if (Val->getOperand(0).getValueType() == MVT::f128)
1766 SDValue O0 = Val->getOperand(0);
1767 SDValue O1 = Val->getOperand(1);
1816 SDValue LHS = Val->getOperand(0);
1817 SDValue RHS = Val->getOperand(1);
1818 ISD::CondCode CC = cast<CondCodeSDNode>(Val->getOperand(2))->get();
1855 SDValue LHS = Val->getOperand(0);
1862 SDValue RHS = Val->getOperand(1);
2676 return addRequiredExtensionForVectorMULL(N->getOperand(0), DAG,
2677 N->getOperand(0)->getValueType(0),
2689 ConstantSDNode *C = cast<ConstantSDNode>(N->getOperand(i));
2711 SDNode *N0 = N->getOperand(0).getNode();
2712 SDNode *N1 = N->getOperand(1).getNode();
2722 SDNode *N0 = N->getOperand(0).getNode();
2723 SDNode *N1 = N->getOperand(1).getNode();
2809 SDValue N00 = skipExtensionForVectorMULL(N0->getOperand(0).getNode(), DAG);
2810 SDValue N01 = skipExtensionForVectorMULL(N0->getOperand(1).getNode(), DAG);
5217 SDValue CCVal = Op->getOperand(0);
5218 SDValue TVal = Op->getOperand(1);
5219 SDValue FVal = Op->getOperand(2);
5244 CC = cast<CondCodeSDNode>(CCVal->getOperand(2))->get();
7333 ConstantSDNode *FirstElt = dyn_cast<ConstantSDNode>(Bvec->getOperand(0));
7339 if (dyn_cast<ConstantSDNode>(Bvec->getOperand(i)) != FirstElt)
7351 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
7372 const SDValue And = N->getOperand(0);
7377 SDValue Shift = N->getOperand(1);
7637 if (!isa<ConstantSDNode>(N->getOperand(1)))
7639 SDValue N0 = N->getOperand(0);
9219 N = N->getOperand(0).getNode();
9224 isa<ConstantSDNode>(N->getOperand(1))) {
9227 N->getOperand(0).getOpcode() == ISD::SRL &&
9228 isa<ConstantSDNode>(N->getOperand(0)->getOperand(1)))
9228 isa<ConstantSDNode>(N->getOperand(0)->getOperand(1)))
9277 SDValue Shift = N->getOperand(0);
9278 SDValue Ones = N->getOperand(1);
9296 SDValue N0 = N->getOperand(0);
9297 SDValue N1 = N->getOperand(1);
9347 SDValue N0 = N->getOperand(0);
9382 if (!isa<ConstantSDNode>(N->getOperand(1)))
9385 ConstantSDNode *C = cast<ConstantSDNode>(N->getOperand(1));
9398 SDValue N0 = N->getOperand(0);
9489 if (!VT.isVector() || N->getOperand(0)->getOpcode() != ISD::AND ||
9490 N->getOperand(0)->getOperand(0)->getOpcode() != ISD::SETCC ||
9490 N->getOperand(0)->getOperand(0)->getOpcode() != ISD::SETCC ||
9491 VT.getSizeInBits() != N->getOperand(0)->getValueType(0).getSizeInBits())
9499 dyn_cast<BuildVectorSDNode>(N->getOperand(0)->getOperand(1))) {
9499 dyn_cast<BuildVectorSDNode>(N->getOperand(0)->getOperand(1))) {
9513 N->getOperand(0)->getOperand(0), MaskConst);
9513 N->getOperand(0)->getOperand(0), MaskConst);
9533 if (VT.getSizeInBits() != N->getOperand(0).getValueSizeInBits())
9539 SDValue N0 = N->getOperand(0);
9571 SDValue Op = N->getOperand(0);
9576 SDValue ConstVec = Op->getOperand(1);
9627 Op->getOperand(0), DAG.getConstant(C, DL, MVT::i32));
9643 SDValue Op = N->getOperand(0);
9650 SDValue ConstVec = N->getOperand(1);
9719 Src = N->getOperand(0);
9742 if (!findEXTRHalf(N->getOperand(0), LHS, ShiftLHS, LHSFromHi))
9748 if (!findEXTRHalf(N->getOperand(1), RHS, ShiftRHS, RHSFromHi))
9777 SDValue N0 = N->getOperand(0);
9781 SDValue N1 = N->getOperand(1);
9791 BuildVectorSDNode *BVN0 = dyn_cast<BuildVectorSDNode>(N0->getOperand(i));
9792 BuildVectorSDNode *BVN1 = dyn_cast<BuildVectorSDNode>(N1->getOperand(j));
9798 ConstantSDNode *CN0 = dyn_cast<ConstantSDNode>(BVN0->getOperand(k));
9799 ConstantSDNode *CN1 = dyn_cast<ConstantSDNode>(BVN1->getOperand(k));
9809 N0->getOperand(1 - i), N1->getOperand(1 - j));
9809 N0->getOperand(1 - i), N1->getOperand(1 - j));
9836 SDValue LHS = N->getOperand(0);
9842 dyn_cast<BuildVectorSDNode>(N->getOperand(1).getNode());
9883 SDValue N0 = N->getOperand(0);
9886 SDValue N1 = N->getOperand(1);
9925 SDValue Op0 = N->getOperand(0);
9930 uint64_t idx = cast<ConstantSDNode>(Op0->getOperand(1))->getZExtValue();
9941 if (Op0->getOperand(0)->getOpcode() != ISD::BITCAST)
9943 SDValue Source = Op0->getOperand(0)->getOperand(0);
9943 SDValue Source = Op0->getOperand(0)->getOperand(0);
9974 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
9974 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
9990 SDValue N00 = N0->getOperand(0);
9991 SDValue N10 = N1->getOperand(0);
10034 SDValue RHS = N1->getOperand(0);
10068 SDValue Op1 = N->getOperand(1);
10071 SDValue IID = N->getOperand(0);
10072 SDValue Shift = N->getOperand(2);
10237 isSetCC(Op->getOperand(0), Info));
10248 SDValue LHS = Op->getOperand(0);
10249 SDValue RHS = Op->getOperand(1);
10310 SDValue LHS = N->getOperand(0);
10311 SDValue RHS = N->getOperand(1);
10351 SDValue LHS = N->getOperand(1);
10352 SDValue RHS = N->getOperand(2);
10371 N->getOperand(0), LHS, RHS);
10379 if (BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(N->getOperand(2))) {
10389 } else if (ConstantSDNode *CVN = dyn_cast<ConstantSDNode>(N->getOperand(2))) {
10431 return DAG.getNode(Opcode, dl, N->getValueType(0), N->getOperand(1),
10435 return DAG.getNode(Opcode, dl, N->getValueType(0), N->getOperand(1),
10446 SDValue AndN = N->getOperand(2);
10455 N->getOperand(0), N->getOperand(1), AndN.getOperand(0));
10455 N->getOperand(0), N->getOperand(1), AndN.getOperand(0));
10463 N->getOperand(1).getSimpleValueType(),
10464 N->getOperand(1)),
10493 N->getOperand(1), N->getOperand(2));
10493 N->getOperand(1), N->getOperand(2));
10496 N->getOperand(1), N->getOperand(2));
10496 N->getOperand(1), N->getOperand(2));
10499 N->getOperand(1), N->getOperand(2));
10499 N->getOperand(1), N->getOperand(2));
10502 N->getOperand(1), N->getOperand(2));
10502 N->getOperand(1), N->getOperand(2));
10534 N->getOperand(0).getOpcode() == ISD::INTRINSIC_WO_CHAIN) {
10535 SDNode *ABDNode = N->getOperand(0).getNode();
10585 SDValue Src = N->getOperand(0);
10645 isa<ConstantSDNode>(BasePtr->getOperand(1))) {
10646 BaseOffset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue();
10647 BasePtr = BasePtr->getOperand(0);
10877 SDNode *LD = N->getOperand(LoadIdx).getNode();
10885 Lane = N->getOperand(2);
10907 SDValue Addr = LD->getOperand(1);
10908 SDValue Vector = N->getOperand(0);
10918 SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0);
10918 SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0);
10940 Ops.push_back(LD->getOperand(0)); // Chain
10994 performTBISimplification(N->getOperand(2), DCI, DAG))
11010 SDValue Addr = N->getOperand(AddrOpIdx);
11037 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
11086 VecTy = N->getOperand(2).getValueType();
11091 SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0);
11091 SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0);
11102 Ops.push_back(N->getOperand(0)); // Incoming chain
11106 Ops.push_back(N->getOperand(i));
11157 VTSDNode *TypeNode = cast<VTSDNode>(V.getNode()->getOperand(1));
11166 VTSDNode *TypeNode = cast<VTSDNode>(V.getNode()->getOperand(1));
11325 unsigned CC = cast<ConstantSDNode>(N->getOperand(CCIndex))->getSExtValue();
11326 SDNode *SubsNode = N->getOperand(CmpIndex).getNode();
11335 SDNode *AndNode = SubsNode->getOperand(0).getNode();
11341 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(AndNode->getOperand(1))) {
11352 SDValue AddValue = AndNode->getOperand(0);
11359 SDValue AddInputValue1 = AddValue.getNode()->getOperand(0);
11360 SDValue AddInputValue2 = AddValue.getNode()->getOperand(1);
11361 SDValue SubsInputValue = SubsNode->getOperand(1);
11386 SDValue Ops[] = { AddValue, SubsNode->getOperand(1) };
11407 SDValue Chain = N->getOperand(0);
11408 SDValue Dest = N->getOperand(1);
11409 SDValue CCVal = N->getOperand(2);
11410 SDValue Cmp = N->getOperand(3);
11475 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
11480 Bit < Op->getOperand(0).getValueSizeInBits()) {
11481 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
11487 auto *C = dyn_cast<ConstantSDNode>(Op->getOperand(1));
11498 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
11506 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
11515 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
11521 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
11529 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
11537 unsigned Bit = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
11539 SDValue TestSrc = N->getOperand(1);
11556 return DAG.getNode(NewOpc, DL, MVT::Other, N->getOperand(0), NewTestSrc,
11557 DAG.getConstant(Bit, DL, MVT::i64), N->getOperand(3));
11566 SDValue N0 = N->getOperand(0);
11580 SDValue IfTrue = N->getOperand(1);
11581 SDValue IfFalse = N->getOperand(2);
11597 SDValue N0 = N->getOperand(0);
11651 return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1), N->getOperand(2));
11651 return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1), N->getOperand(2));
11656 if (N->getValueType(0) == N->getOperand(0).getValueType())
11657 return N->getOperand(0);
11677 auto *C = dyn_cast<ConstantSDNode>(N->getOperand(0));
11679 C = dyn_cast<ConstantSDNode>(N->getOperand(1));
11758 if (performTBISimplification(N->getOperand(1), DCI, DAG))
11778 switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) {
11827 if (Copy->getOperand(Copy->getNumOperands() - 1).getValueType() ==
11830 TCChain = Copy->getOperand(0);
11864 Base = Op->getOperand(0);
11867 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Op->getOperand(1))) {
11874 Offset = Op->getOperand(1);
11930 SDValue Op = N->getOperand(0);
11996 createGPRPairNode(DAG, N->getOperand(2)), // Compare value
11997 createGPRPairNode(DAG, N->getOperand(3)), // Store value
11998 N->getOperand(1), // Ptr
11999 N->getOperand(0), // Chain in
12038 auto Desired = splitInt128(N->getOperand(2), DAG);
12039 auto New = splitInt128(N->getOperand(3), DAG);
12040 SDValue Ops[] = {N->getOperand(1), Desired.first, Desired.second,
12041 New.first, New.second, N->getOperand(0)};
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 107 if (getConstantValue(N->getOperand(0), LHSVal) &&
108 getConstantValue(N->getOperand(1), RHSVal)) {
404 SDValue Lo = N->getOperand(0);
405 SDValue Hi = N->getOperand(1);
549 unsigned Reg = cast<RegisterSDNode>(N->getOperand(1))->getReg();
577 unsigned RCID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
581 SDValue SubRegOp = N->getOperand(OpNo + 1);
594 Ops.push_back(N->getOperand(i));
604 assert(N->getOperand(0).getValueType() == MVT::Other && "Expected chain");
606 SDValue M0 = Lowering.copyToM0(*CurDAG, N->getOperand(0), SDLoc(N), Val);
671 CurDAG->SelectNodeTo(N, AMDGPU::COPY_TO_REGCLASS, EltVT, N->getOperand(0),
688 if (isa<RegisterSDNode>(N->getOperand(i))) {
693 RegSeqArgs[1 + (2 * i)] = N->getOperand(i);
804 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0,
805 N->getOperand(1), SubReg1 };
838 ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
842 ConstantSDNode *Width = dyn_cast<ConstantSDNode>(N->getOperand(2));
852 SDLoc(N), N->getOperand(0), OffsetVal, WidthVal));
902 { N->getOperand(0), N->getOperand(1) });
902 { N->getOperand(0), N->getOperand(1) });
981 SDValue LHS = N->getOperand(0);
982 SDValue RHS = N->getOperand(1);
1013 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0), N->getOperand(2) };
1044 SDValue LHS = N->getOperand(0);
1045 SDValue RHS = N->getOperand(1);
1046 SDValue CI = N->getOperand(2);
1064 {N->getOperand(0), N->getOperand(1),
1064 {N->getOperand(0), N->getOperand(1),
1073 SelectVOP3Mods0(N->getOperand(1), Ops[1], Ops[0], Ops[6], Ops[7]);
1074 SelectVOP3Mods(N->getOperand(2), Ops[3], Ops[2]);
1075 SelectVOP3Mods(N->getOperand(3), Ops[5], Ops[4]);
1076 Ops[8] = N->getOperand(0);
1077 Ops[9] = N->getOperand(4);
1087 SelectVOP3Mods0(N->getOperand(1), Ops[1], Ops[0], Ops[4], Ops[5]);
1088 SelectVOP3Mods(N->getOperand(2), Ops[3], Ops[2]);
1089 Ops[6] = N->getOperand(0);
1090 Ops[7] = N->getOperand(3);
1106 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1106 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1106 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1122 SDValue CarryIn = N->getOperand(3);
1129 SelectVOP3Mods0(N->getOperand(0), Ops[1], Ops[0], Ops[6], Ops[7]);
1130 SelectVOP3Mods(N->getOperand(1), Ops[3], Ops[2]);
1131 SelectVOP3Mods(N->getOperand(2), Ops[5], Ops[4]);
1147 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
1147 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
1147 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
1915 const SDValue &Shl = N->getOperand(0);
1916 ConstantSDNode *B = dyn_cast<ConstantSDNode>(Shl->getOperand(1));
1917 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1));
1938 if (N->getOperand(0).getOpcode() == ISD::SRL) {
1941 const SDValue &Srl = N->getOperand(0);
1943 ConstantSDNode *Mask = dyn_cast<ConstantSDNode>(N->getOperand(1));
1960 if (N->getOperand(0).getOpcode() == ISD::AND) {
1963 const SDValue &And = N->getOperand(0);
1964 ConstantSDNode *Shift = dyn_cast<ConstantSDNode>(N->getOperand(1));
1965 ConstantSDNode *Mask = dyn_cast<ConstantSDNode>(And->getOperand(1));
1979 } else if (N->getOperand(0).getOpcode() == ISD::SHL) {
1985 if (N->getOperand(0).getOpcode() == ISD::SHL) {
1993 SDValue Src = N->getOperand(0);
2001 unsigned Width = cast<VTSDNode>(N->getOperand(1))->getVT().getSizeInBits();
2016 SDValue Cond = N->getOperand(1);
2038 SDValue Cond = N->getOperand(1);
2042 N->getOperand(2), N->getOperand(0));
2042 N->getOperand(2), N->getOperand(0));
2078 SDValue VCC = CurDAG->getCopyToReg(N->getOperand(0), SL, CondReg, Cond);
2080 N->getOperand(2), // Basic Block
2095 SDValue Src0 = N->getOperand(0);
2096 SDValue Src1 = N->getOperand(1);
2097 SDValue Src2 = N->getOperand(2);
2151 SDValue CmpVal = Mem->getOperand(2);
2169 SDValue CmpVal = Mem->getOperand(2);
2201 SDValue Chain = N->getOperand(0);
2202 SDValue Ptr = N->getOperand(2);
2228 N->getOperand(N->getNumOperands() - 1) // New glue
2267 SDValue BaseOffset = N->getOperand(HasVSrc ? 3 : 2);
2305 SDValue Chain = N->getOperand(0);
2314 Ops.push_back(N->getOperand(2));
2324 unsigned IntrID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
2339 unsigned IntrID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
2356 SDValue Src = N->getOperand(1);
2361 unsigned IntrID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 575 switch (cast<ConstantSDNode>(N->getOperand(0))->getZExtValue()) {
718 unsigned IntrID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
2768 SDValue LHS = IsIntrin ? Node24->getOperand(1) : Node24->getOperand(0);
2768 SDValue LHS = IsIntrin ? Node24->getOperand(1) : Node24->getOperand(0);
2769 SDValue RHS = IsIntrin ? Node24->getOperand(2) : Node24->getOperand(1);
2769 SDValue RHS = IsIntrin ? Node24->getOperand(2) : Node24->getOperand(1);
2772 unsigned IID = cast<ConstantSDNode>(Node24->getOperand(0))->getZExtValue();
2956 SDValue N0 = N->getOperand(0);
2961 SDValue N1 = N->getOperand(1);
2978 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
3017 ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N->getOperand(1));
3021 SDValue LHS = N->getOperand(0);
3035 SDValue X = LHS->getOperand(0);
3042 { DAG.getConstant(0, SL, MVT::i16), LHS->getOperand(0) });
3086 const ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N->getOperand(1));
3096 SDValue Hi = getHiHalf64(N->getOperand(0), DAG);
3106 SDValue Hi = getHiHalf64(N->getOperand(0), DAG);
3118 auto *RHS = dyn_cast<ConstantSDNode>(N->getOperand(1));
3123 SDValue LHS = N->getOperand(0);
3136 DAG.getNode(ISD::SRL, SL, VT, LHS.getOperand(0), N->getOperand(1)),
3137 DAG.getNode(ISD::SRL, SL, VT, LHS.getOperand(1), N->getOperand(1)));
3170 SDValue Src = N->getOperand(0);
3289 SDValue N0 = N->getOperand(0);
3290 SDValue N1 = N->getOperand(1);
3331 SDValue N0 = N->getOperand(0);
3332 SDValue N1 = N->getOperand(1);
3355 SDValue N0 = N->getOperand(0);
3356 SDValue N1 = N->getOperand(1);
3377 SDValue N0 = N->getOperand(0);
3378 SDValue N1 = N->getOperand(1);
3547 SDValue Cond = N->getOperand(0);
3556 SDValue True = N->getOperand(1);
3557 SDValue False = N->getOperand(2);
3634 SDValue N0 = N->getOperand(0);
3764 Ops[I] = DAG.getNode(ISD::FNEG, SL, VT, N0->getOperand(I), N0->getFlags());
3836 SDValue N0 = N->getOperand(0);
3860 const auto *CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
3887 SDValue Src = N->getOperand(0);
3914 SDValue Src = N->getOperand(0);
3986 ConstantSDNode *Width = dyn_cast<ConstantSDNode>(N->getOperand(2));
3994 ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
3998 SDValue BitsFrom = N->getOperand(0);
lib/Target/AMDGPU/R600ISelLowering.cpp 659 Results.push_back(lowerFP_TO_UINT(N->getOperand(0), DAG));
668 Results.push_back(lowerFP_TO_SINT(N->getOperand(0), DAG));
1160 SDValue Chain = VectorTrunc ? OldChain->getOperand(0) : OldChain;
1859 SDValue Arg = N->getOperand(0);
1873 SDValue FNeg = N->getOperand(0);
1899 SDValue InVec = N->getOperand(0);
1900 SDValue InVal = N->getOperand(1);
1901 SDValue EltNo = N->getOperand(2);
1951 SDValue Arg = N->getOperand(0);
1953 if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(N->getOperand(1))) {
1955 return Arg->getOperand(Element);
1962 if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(N->getOperand(1))) {
1965 Arg->getOperand(0).getOperand(Element));
1981 SDValue LHS = N->getOperand(0);
1986 SDValue RHS = N->getOperand(1);
1987 SDValue True = N->getOperand(2);
1988 SDValue False = N->getOperand(3);
1989 ISD::CondCode NCC = cast<CondCodeSDNode>(N->getOperand(4))->get();
2019 SDValue Arg = N->getOperand(1);
2024 N->getOperand(0), // Chain
2026 N->getOperand(2), // ArrayBase
2027 N->getOperand(3), // Type
2028 N->getOperand(4), // SWZ_X
2029 N->getOperand(5), // SWZ_Y
2030 N->getOperand(6), // SWZ_Z
2031 N->getOperand(7) // SWZ_W
2033 NewArgs[1] = OptimizeSwizzle(N->getOperand(1), &NewArgs[4], DAG, DL);
2037 SDValue Arg = N->getOperand(1);
2042 N->getOperand(0),
2043 N->getOperand(1),
2044 N->getOperand(2),
2045 N->getOperand(3),
2046 N->getOperand(4),
2047 N->getOperand(5),
2048 N->getOperand(6),
2049 N->getOperand(7),
2050 N->getOperand(8),
2051 N->getOperand(9),
2052 N->getOperand(10),
2053 N->getOperand(11),
2054 N->getOperand(12),
2055 N->getOperand(13),
2056 N->getOperand(14),
2057 N->getOperand(15),
2058 N->getOperand(16),
2059 N->getOperand(17),
2060 N->getOperand(18),
2062 NewArgs[1] = OptimizeSwizzle(N->getOperand(1), &NewArgs[2], DAG, DL);
2137 dyn_cast<RegisterSDNode>(ParentNode->getOperand(OtherSrcIdx))) {
2140 = cast<ConstantSDNode>(ParentNode->getOperand(OtherSelIdx));
lib/Target/AMDGPU/SIISelLowering.cpp 4184 const auto *CD = cast<ConstantSDNode>(N->getOperand(3));
4192 SDValue LHS = N->getOperand(1);
4193 SDValue RHS = N->getOperand(2);
4220 const auto *CD = cast<ConstantSDNode>(N->getOperand(3));
4228 SDValue Src0 = N->getOperand(1);
4229 SDValue Src1 = N->getOperand(2);
4264 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
4267 SDValue Src0 = N->getOperand(1);
4268 SDValue Src1 = N->getOperand(2);
4279 SDValue Src0 = N->getOperand(1);
4280 SDValue Src1 = N->getOperand(2);
4324 SDValue LHS = DAG.getNode(ISD::BITCAST, SL, NewVT, N->getOperand(1));
4325 SDValue RHS = DAG.getNode(ISD::BITCAST, SL, NewVT, N->getOperand(2));
4335 N->getOperand(0), LHS, RHS);
4347 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::i32, N->getOperand(0));
4360 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::i32, N->getOperand(0));
4391 switch (cast<ConstantSDNode>(Intr->getOperand(1))->getZExtValue()) {
4446 Intr = SetCC->getOperand(0).getNode();
4451 Target = BR->getOperand(1);
4472 cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
4500 BR->getOperand(0),
4518 CopyToReg->getOperand(1),
4522 DAG.ReplaceAllUsesWith(SDValue(CopyToReg, 0), CopyToReg->getOperand(0));
4528 Intr->getOperand(0));
4705 SDValue Src = ASC->getOperand(0);
4934 PackVT, SVN->getOperand(VecIdx),
4945 SDValue Vec0 = SVN->getOperand(VecIdx0);
4949 SDValue Vec1 = SVN->getOperand(VecIdx1);
6053 Op->getOperand(1), Op->getOperand(2)), 0);
6053 Op->getOperand(1), Op->getOperand(2)), 0);
6122 SDValue Chain = M->getOperand(0);
6123 SDValue M0 = M->getOperand(2);
6124 SDValue Value = M->getOperand(3);
6207 M->getOperand(0), M->getOperand(2), M->getOperand(3),
6207 M->getOperand(0), M->getOperand(2), M->getOperand(3),
6207 M->getOperand(0), M->getOperand(2), M->getOperand(3),
6233 M->getOperand(0), // Chain
6234 M->getOperand(2), // Ptr
6235 M->getOperand(3) // Value
7093 Op->getOperand(2), Chain), 0);
8013 SDValue Src = N->getOperand(0);
8049 SDValue N0 = N->getOperand(0);
8050 SDValue N1 = N->getOperand(1);
8235 SDValue LHS = N->getOperand(0);
8236 SDValue RHS = N->getOperand(1);
8255 if (auto *CShift = dyn_cast<ConstantSDNode>(LHS->getOperand(1))) {
8262 LHS->getOperand(0),
8417 SDValue LHS = N->getOperand(0);
8418 SDValue RHS = N->getOperand(1);
8530 const ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(N->getOperand(1));
8546 SDValue LHS = N->getOperand(0);
8547 SDValue RHS = N->getOperand(1);
8626 SDValue Src = N->getOperand(0);
8645 SDValue Src = N->getOperand(0);
8646 auto *VTSign = cast<VTSDNode>(N->getOperand(1));
8682 SDValue Mask = N->getOperand(1);
8690 if (N->getOperand(0).isUndef())
8699 SDValue N0 = N->getOperand(0);
8906 SDValue N0 = N->getOperand(0);
9041 SDValue Tmp1 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(0));
9042 SDValue Tmp2 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(1));
9121 SDValue Op0 = N->getOperand(0);
9122 SDValue Op1 = N->getOperand(1);
9206 SDValue Src0 = N->getOperand(0);
9207 SDValue Src1 = N->getOperand(1);
9208 SDValue Src2 = N->getOperand(2);
9243 SDValue Src0 = N->getOperand(0);
9244 SDValue Src1 = N->getOperand(1);
9252 SDValue Vec = N->getOperand(0);
9262 SDValue Idx = N->getOperand(1);
9276 SDValue Idx = N->getOperand(1);
9316 !isa<ConstantSDNode>(N->getOperand(1))) {
9318 SDValue Idx = N->getOperand(1);
9338 auto *Idx = dyn_cast<ConstantSDNode>(N->getOperand(1));
9373 SDValue Vec = N->getOperand(0);
9374 SDValue Idx = N->getOperand(2);
9392 SDValue Ins = N->getOperand(1);
9439 SDValue Op0 = N->getOperand(0);
9440 SDValue Op1 = N->getOperand(1);
9485 SDValue LHS = N->getOperand(0);
9486 SDValue RHS = N->getOperand(1);
9566 SDValue LHS = N->getOperand(0);
9567 SDValue RHS = N->getOperand(1);
9586 auto C = dyn_cast<ConstantSDNode>(N->getOperand(1));
9591 SDValue LHS = N->getOperand(0);
9599 SDValue Args[] = { LHS.getOperand(0), LHS.getOperand(1), N->getOperand(2) };
9614 SDValue LHS = N->getOperand(0);
9615 SDValue RHS = N->getOperand(1);
9662 SDValue LHS = N->getOperand(0);
9663 SDValue RHS = N->getOperand(1);
9705 SDValue Op1 = N->getOperand(0);
9706 SDValue Op2 = N->getOperand(1);
9707 SDValue FMA = N->getOperand(2);
9774 SDValue LHS = N->getOperand(0);
9775 SDValue RHS = N->getOperand(1);
9777 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
9871 SDValue Src = N->getOperand(0);
9872 SDValue Srl = N->getOperand(0);
9910 ConstantFPSDNode *CSrc = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
10018 SDValue Src = N->getOperand(0);
10044 SDValue Src = N->getOperand(0);
10250 RegisterSDNode *DestReg = cast<RegisterSDNode>(Node->getOperand(1));
10251 SDValue SrcVal = Node->getOperand(2);
10264 = DAG.getCopyToReg(Node->getOperand(0), SL, VReg, SrcVal,
10277 if (!isFrameIndexOp(Node->getOperand(i))) {
10278 Ops.push_back(Node->getOperand(i));
10284 Node->getOperand(i).getValueType(),
10285 Node->getOperand(i)), 0));
10315 SDValue Src0 = Node->getOperand(0);
10316 SDValue Src1 = Node->getOperand(1);
10317 SDValue Src2 = Node->getOperand(2);
10354 Ops.push_back(Node->getOperand(I));
10361 ConstantSDNode *FI = cast<ConstantSDNode>(Node->getOperand(0));
10362 ConstantSDNode *BC = cast<ConstantSDNode>(Node->getOperand(2));
10365 SDValue VDstIn = Node->getOperand(6);
10371 SmallVector<SDValue, 8> Ops = { SDValue(FI, 0), Node->getOperand(1),
10372 SDValue(BC, 0), Node->getOperand(3),
10373 Node->getOperand(4), Node->getOperand(5),
10373 Node->getOperand(4), Node->getOperand(5),
10374 SDValue(ImpDef, 0), Node->getOperand(7) };
10817 N = N->getOperand(0).getNode();
10831 const RegisterSDNode *R = cast<RegisterSDNode>(N->getOperand(1));
10872 cast<ConstantSDNode>(N->getOperand(0))->getZExtValue());
10875 cast<ConstantSDNode>(N->getOperand(1))->getZExtValue());
lib/Target/AMDGPU/SIInstrInfo.cpp 96 while (N && Node->getOperand(N - 1).getValueType() == MVT::Glue)
125 return N0->getOperand(Op0Idx) == N1->getOperand(Op1Idx);
125 return N0->getOperand(Op0Idx) == N1->getOperand(Op1Idx);
164 if (Load0->getOperand(0) != Load1->getOperand(0))
164 if (Load0->getOperand(0) != Load1->getOperand(0))
181 Offset0 = cast<ConstantSDNode>(Load0->getOperand(Offset0Idx))->getZExtValue();
182 Offset1 = cast<ConstantSDNode>(Load1->getOperand(Offset1Idx))->getZExtValue();
195 if (Load0->getOperand(0) != Load1->getOperand(0))
195 if (Load0->getOperand(0) != Load1->getOperand(0))
199 dyn_cast<ConstantSDNode>(Load0->getOperand(1));
201 dyn_cast<ConstantSDNode>(Load1->getOperand(1));
232 SDValue Off0 = Load0->getOperand(OffIdx0);
233 SDValue Off1 = Load1->getOperand(OffIdx1);
lib/Target/ARM/ARMBaseInstrInfo.cpp 1889 if (Load1->getOperand(0) != Load2->getOperand(0) ||
1889 if (Load1->getOperand(0) != Load2->getOperand(0) ||
1890 Load1->getOperand(4) != Load2->getOperand(4))
1890 Load1->getOperand(4) != Load2->getOperand(4))
1894 if (Load1->getOperand(3) != Load2->getOperand(3))
1894 if (Load1->getOperand(3) != Load2->getOperand(3))
1898 if (isa<ConstantSDNode>(Load1->getOperand(1)) &&
1899 isa<ConstantSDNode>(Load2->getOperand(1))) {
1900 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue();
1901 Offset2 = cast<ConstantSDNode>(Load2->getOperand(1))->getSExtValue();
4391 cast<ConstantSDNode>(DefNode->getOperand(2))->getZExtValue();
4404 cast<ConstantSDNode>(DefNode->getOperand(2))->getZExtValue();
4418 cast<ConstantSDNode>(DefNode->getOperand(2))->getZExtValue();
lib/Target/ARM/ARMISelDAGToDAG.cpp 321 isInt32Immediate(N->getOperand(1).getNode(), Imm);
367 SDValue N0 = N->getOperand(0);
368 SDValue N1 = N->getOperand(1);
596 return CurDAG->haveNoCommonBitsSet(N, Parent->getOperand(1));
1932 if (!SelectAddrMode6(N, N->getOperand(AddrOpIdx), MemAddr, Align))
1935 SDValue Chain = N->getOperand(0);
1987 SDValue Inc = N->getOperand(AddrOpIdx + 1);
2023 SDValue Inc = N->getOperand(AddrOpIdx + 1);
2072 if (!SelectAddrMode6(N, N->getOperand(AddrOpIdx), MemAddr, Align))
2077 SDValue Chain = N->getOperand(0);
2078 EVT VT = N->getOperand(Vec0Idx).getValueType();
2115 SrcReg = N->getOperand(Vec0Idx);
2118 SDValue V0 = N->getOperand(Vec0Idx + 0);
2119 SDValue V1 = N->getOperand(Vec0Idx + 1);
2123 SDValue V2 = N->getOperand(Vec0Idx + 2);
2128 : N->getOperand(Vec0Idx + 3);
2133 SDValue Q0 = N->getOperand(Vec0Idx);
2134 SDValue Q1 = N->getOperand(Vec0Idx + 1);
2143 SDValue Inc = N->getOperand(AddrOpIdx + 1);
2174 SDValue V0 = N->getOperand(Vec0Idx + 0);
2175 SDValue V1 = N->getOperand(Vec0Idx + 1);
2176 SDValue V2 = N->getOperand(Vec0Idx + 2);
2179 : N->getOperand(Vec0Idx + 3);
2195 SDValue Inc = N->getOperand(AddrOpIdx + 1);
2223 if (!SelectAddrMode6(N, N->getOperand(AddrOpIdx), MemAddr, Align))
2228 SDValue Chain = N->getOperand(0);
2230 cast<ConstantSDNode>(N->getOperand(Vec0Idx + NumVecs))->getZExtValue();
2231 EVT VT = N->getOperand(Vec0Idx).getValueType();
2284 SDValue Inc = N->getOperand(AddrOpIdx + 1);
2291 SDValue V0 = N->getOperand(Vec0Idx + 0);
2292 SDValue V1 = N->getOperand(Vec0Idx + 1);
2299 SDValue V2 = N->getOperand(Vec0Idx + 2);
2302 : N->getOperand(Vec0Idx + 3);
2386 Ops.push_back(N->getOperand(2)); // vector of base addresses
2388 int32_t ImmValue = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue();
2392 AddMVEPredicateToOps(Ops, Loc, N->getOperand(4));
2396 Ops.push_back(N->getOperand(0)); // chain
2407 Ops.push_back(N->getOperand(1));
2408 Ops.push_back(N->getOperand(2));
2412 int32_t ImmValue = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue();
2415 Ops.push_back(N->getOperand(3));
2436 Ops.push_back(N->getOperand(FirstInputOp));
2437 Ops.push_back(N->getOperand(FirstInputOp + 1));
2438 SDValue CarryIn = N->getOperand(FirstInputOp + 2);
2452 N->getOperand(FirstInputOp + 3), // predicate
2453 N->getOperand(FirstInputOp - 1)); // inactive
2485 SDValue Chain = N->getOperand(0);
2487 SDValue Ops[] = {Data, N->getOperand(2), Chain};
2511 if (!SelectAddrMode6(N, N->getOperand(AddrOpIdx), MemAddr, Align))
2514 SDValue Chain = N->getOperand(0);
2575 SDValue Inc = N->getOperand(2);
2652 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SRL,
2671 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2683 SDValue Ops[] = { N->getOperand(0).getOperand(0), ShOpc,
2690 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2703 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SHL, Shl_imm)) {
2706 if (isInt32Immediate(N->getOperand(1), Srl_imm)) {
2715 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2725 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, And_imm) &&
2730 if (isInt32Immediate(N->getOperand(1), Srl_imm) && Srl_imm == LSB) {
2737 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2747 unsigned Width = cast<VTSDNode>(N->getOperand(1))->getVT().getSizeInBits();
2749 if (!isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SRL, LSB) &&
2750 !isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SRA, LSB))
2758 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2780 SDValue XORSrc0 = N->getOperand(0);
2781 SDValue XORSrc1 = N->getOperand(1);
2822 SDValue Ops[] = {N->getOperand(1), N->getOperand(2), N->getOperand(3),
2822 SDValue Ops[] = {N->getOperand(1), N->getOperand(2), N->getOperand(3),
2822 SDValue Ops[] = {N->getOperand(1), N->getOperand(2), N->getOperand(3),
2823 N->getOperand(0)};
2855 SDValue And = N->getOperand(0);
2859 SDValue Zero = N->getOperand(1);
3066 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1))) {
3073 SDValue V = N->getOperand(0);
3092 SDValue V = N->getOperand(0);
3117 auto *N1C = dyn_cast<ConstantSDNode>(N->getOperand(1));
3141 N->getOperand(0), NewImm, getAL(CurDAG, dl),
3146 SDValue Ops[] = {N->getOperand(0), NewImm, getAL(CurDAG, dl),
3169 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
3169 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
3196 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
3196 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
3197 N->getOperand(2), N->getOperand(3),
3197 N->getOperand(2), N->getOperand(3),
3205 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3205 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3205 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3206 N->getOperand(3), getAL(CurDAG, dl),
3212 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3212 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3212 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3213 N->getOperand(3), getAL(CurDAG, dl),
3224 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3224 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3224 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3225 N->getOperand(3), getAL(CurDAG, dl),
3231 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3231 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3231 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2),
3232 N->getOperand(3), getAL(CurDAG, dl),
3246 if (N->getOperand(1).getOpcode() != ISD::SMUL_LOHI ||
3247 N->getOperand(2).getOpcode() != ARMISD::SUBC ||
3255 SDValue SmulLoHi = N->getOperand(1);
3256 SDValue Subc = N->getOperand(2);
3261 N->getOperand(1) != SmulLoHi.getValue(1) ||
3262 N->getOperand(2) != Subc.getValue(1))
3267 N->getOperand(0), getAL(CurDAG, dl),
3288 SDValue Ops[] = { N->getOperand(1),
3289 N->getOperand(2),
3290 N->getOperand(0) };
3299 SDValue Ops[] = { N->getOperand(1),
3300 N->getOperand(2),
3301 N->getOperand(0) };
3324 SDValue Chain = N->getOperand(0);
3325 SDValue N1 = N->getOperand(1);
3326 SDValue N2 = N->getOperand(2);
3327 SDValue N3 = N->getOperand(3);
3328 SDValue InFlag = N->getOperand(4);
3338 uint64_t ID = cast<ConstantSDNode>(Int->getOperand(1))->getZExtValue();
3368 InFlag = N->getOperand(4);
3403 SDValue X = N->getOperand(0);
3404 auto *C = dyn_cast<ConstantSDNode>(N->getOperand(1).getNode());
3437 SDValue InFlag = N->getOperand(4);
3444 SDValue ARMcc = N->getOperand(2);
3458 SDValue Ops[] = {N->getOperand(0), N->getOperand(1), NewARMcc,
3458 SDValue Ops[] = {N->getOperand(0), N->getOperand(1), NewARMcc,
3459 N->getOperand(3), N->getOperand(4)};
3459 N->getOperand(3), N->getOperand(4)};
3487 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg };
3487 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg };
3510 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg };
3510 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg };
3532 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg };
3532 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg };
3543 N, createDRegPairNode(VecVT, N->getOperand(0), N->getOperand(1)));
3543 N, createDRegPairNode(VecVT, N->getOperand(0), N->getOperand(1)));
3549 N, createSRegPairNode(VecVT, N->getOperand(0), N->getOperand(1)));
3549 N, createSRegPairNode(VecVT, N->getOperand(0), N->getOperand(1)));
3554 createQuadSRegsNode(VecVT, N->getOperand(0), N->getOperand(1),
3554 createQuadSRegsNode(VecVT, N->getOperand(0), N->getOperand(1),
3555 N->getOperand(2), N->getOperand(3)));
3555 N->getOperand(2), N->getOperand(3)));
3798 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
3806 SDValue Chain = N->getOperand(0);
3815 Ops.push_back(getI32Imm(cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(), dl)); /* coproc */
3816 Ops.push_back(getI32Imm(cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(), dl)); /* opc */
3817 Ops.push_back(getI32Imm(cast<ConstantSDNode>(N->getOperand(4))->getZExtValue(), dl)); /* CRm */
3838 SDValue Chain = N->getOperand(0);
3839 SDValue MemAddr = N->getOperand(2);
3898 SDValue Chain = N->getOperand(0);
3899 SDValue Val0 = N->getOperand(2);
3900 SDValue Val1 = N->getOperand(3);
3901 SDValue MemAddr = N->getOperand(4);
4264 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
4415 const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(N->getOperand(1));
4442 Ops.push_back(N->getOperand(0));
4453 N->getOperand(0) };
4482 N->getOperand(0) };
4498 N->getOperand(0) };
4508 N->getOperand(0) };
4516 N->getOperand(0) };
4530 const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(N->getOperand(1));
4546 Ops.insert(Ops.begin()+2, N->getOperand(2));
4551 SDValue WriteValue[] = { N->getOperand(2), N->getOperand(3) };
4551 SDValue WriteValue[] = { N->getOperand(2), N->getOperand(3) };
4557 Ops.push_back(N->getOperand(0));
4566 Ops = { CurDAG->getTargetConstant(BankedReg, DL, MVT::i32), N->getOperand(2),
4568 N->getOperand(0) };
4589 Ops = { N->getOperand(2), getAL(CurDAG, DL),
4590 CurDAG->getRegister(0, MVT::i32), N->getOperand(0) };
4608 N->getOperand(2), getAL(CurDAG, DL),
4609 CurDAG->getRegister(0, MVT::i32), N->getOperand(0) };
4619 Ops = { CurDAG->getTargetConstant(Mask, DL, MVT::i32), N->getOperand(2),
4621 N->getOperand(0) };
4645 SDValue Glue = N->getGluedNode() ? N->getOperand(NumOps-1)
4651 SDValue op = N->getOperand(i);
4657 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(i))) {
4669 SDValue op = N->getOperand(++i);
4691 SDValue op = N->getOperand(++i);
4707 SDValue V0 = N->getOperand(i+1);
4708 SDValue V1 = N->getOperand(i+2);
lib/Target/ARM/ARMISelLowering.cpp 2879 if (Copy->getOperand(Copy->getNumOperands()-1).getValueType() == MVT::Glue)
2881 TCChain = Copy->getOperand(0);
2897 SDValue UseChain = UI->getOperand(0);
2905 if (UI->getOperand(UI->getNumOperands()-1).getValueType() == MVT::Glue)
2920 if (Copy->getOperand(Copy->getNumOperands()-1).getValueType() == MVT::Glue)
2922 TCChain = Copy->getOperand(0);
2959 SDValue WriteValue = Op->getOperand(2);
2969 SDValue Ops[] = { Op->getOperand(0), Op->getOperand(1), Lo, Hi };
2969 SDValue Ops[] = { Op->getOperand(0), Op->getOperand(1), Lo, Hi };
4171 SDValue BitcastOp = Op->getOperand(0);
4173 isNullConstant(BitcastOp->getOperand(0)))
4536 DAG.getSExtOrTrunc(Op->getOperand(0), dl, MVT::i32),
4537 DAG.getSExtOrTrunc(Op->getOperand(1), dl, MVT::i32));
4773 V2TmpReg = V2Tmp->getOperand(0);
5593 N->getOperand(0),
5594 N->getOperand(1));
5610 SDValue Op = BC->getOperand(0);
5660 SDValue Op = N->getOperand(0);
5896 SDValue X = N->getOperand(0);
5941 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, VT, N->getOperand(0));
5957 SDValue Res = DAG.getBitcast(VT8Bit, N->getOperand(0));
6047 if (isVShiftLImm(N->getOperand(1), VT, false, Cnt))
6048 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0),
6050 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0),
6051 N->getOperand(1));
6057 if (isVShiftRImm(N->getOperand(1), VT, false, false, Cnt)) {
6060 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0),
6066 EVT ShiftVT = N->getOperand(1).getValueType();
6068 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1));
6071 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), NegatedCount);
6089 SDValue ShAmt = N->getOperand(1);
6116 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0),
6119 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0),
6131 if (!isOneConstant(N->getOperand(1)) || N->getOpcode() == ISD::SHL)
6139 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0),
6141 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0),
7208 (constIndex = dyn_cast<ConstantSDNode>(Value->getOperand(1)))) {
7213 if (VT != Value->getOperand(0).getValueType()) {
7222 Value->getOperand(0), Value->getOperand(1));
7222 Value->getOperand(0), Value->getOperand(1));
7908 SDValue SubV1 = V1->getOperand(0);
7909 SDValue SubV2 = V1->getOperand(1);
8004 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0));
8067 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0));
8219 SDNode *BVN = N->getOperand(0).getNode();
8225 ConstantSDNode *Lo0 = dyn_cast<ConstantSDNode>(BVN->getOperand(LoElt));
8226 ConstantSDNode *Hi0 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt));
8227 ConstantSDNode *Lo1 = dyn_cast<ConstantSDNode>(BVN->getOperand(LoElt+2));
8228 ConstantSDNode *Hi1 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt+2));
8246 SDNode *Elt = N->getOperand(i).getNode();
8353 return AddRequiredExtensionForVMULL(N->getOperand(0), DAG,
8354 N->getOperand(0)->getValueType(0),
8375 SDNode *BVN = N->getOperand(0).getNode();
8381 {BVN->getOperand(LowElt), BVN->getOperand(LowElt + 2)});
8381 {BVN->getOperand(LowElt), BVN->getOperand(LowElt + 2)});
8392 ConstantSDNode *C = cast<ConstantSDNode>(N->getOperand(i));
8404 SDNode *N0 = N->getOperand(0).getNode();
8405 SDNode *N1 = N->getOperand(1).getNode();
8415 SDNode *N0 = N->getOperand(0).getNode();
8416 SDNode *N1 = N->getOperand(1).getNode();
8488 SDValue N00 = SkipExtensionForVMULL(N0->getOperand(0).getNode(), DAG);
8489 SDValue N01 = SkipExtensionForVMULL(N0->getOperand(1).getNode(), DAG);
8856 if (N->getOperand(0).getValueType().isVector())
8894 SDValue Op = N->getOperand(1);
8997 isNullConstant(PassThru->getOperand(0))));
9013 !IsZero(PassThru->getOperand(0))))
9035 SDValue Ops[] = { N->getOperand(0), // Chain
9074 SDValue Ops[] = {N->getOperand(1),
9075 createGPRPairNode(DAG, N->getOperand(2)),
9076 createGPRPairNode(DAG, N->getOperand(3)),
9077 N->getOperand(0)};
9244 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
9259 N->getOperand(3),
9262 N->getOperand(3),
9267 N->getOperand(1), N->getOperand(2),
9267 N->getOperand(1), N->getOperand(2),
10841 CC = N->getOperand(0);
10842 SDValue N1 = N->getOperand(1);
10843 SDValue N2 = N->getOperand(2);
10864 CC = N->getOperand(0);
10936 SDValue N0 = N->getOperand(0);
10937 SDValue N1 = N->getOperand(1);
10981 Ops.push_back(Unzip->getOperand(0));
10982 Ops.push_back(Unzip->getOperand(1));
11062 if (N0->getOperand(0)->getOpcode() != ISD::EXTRACT_VECTOR_ELT)
11064 SDValue Vec = N0->getOperand(0)->getOperand(0);
11064 SDValue Vec = N0->getOperand(0)->getOperand(0);
11072 if (N0->getOperand(i)->getOpcode() == ISD::EXTRACT_VECTOR_ELT
11073 && N1->getOperand(i)->getOpcode() == ISD::EXTRACT_VECTOR_ELT) {
11075 SDValue ExtVec0 = N0->getOperand(i);
11076 SDValue ExtVec1 = N1->getOperand(i);
11079 if (V != ExtVec0->getOperand(0).getNode() ||
11080 V != ExtVec1->getOperand(0).getNode())
11084 ConstantSDNode *C0 = dyn_cast<ConstantSDNode>(ExtVec0->getOperand(1));
11085 ConstantSDNode *C1 = dyn_cast<ConstantSDNode>(ExtVec1->getOperand(1));
11154 SDValue Mul = AddcNode->getOperand(0);
11155 SDValue Lo = AddcNode->getOperand(1);
11157 Lo = AddcNode->getOperand(0);
11158 Mul = AddcNode->getOperand(1);
11163 SDValue SRA = AddeNode->getOperand(0);
11164 SDValue Hi = AddeNode->getOperand(1);
11166 SRA = AddeNode->getOperand(1);
11167 Hi = AddeNode->getOperand(0);
11200 Op0 = Mul->getOperand(0).getOperand(0);
11201 Op1 = Mul->getOperand(1).getOperand(0);
11249 AddeSubeNode->getOperand(2).getValueType() == MVT::i32 &&
11253 SDNode *AddcSubcNode = AddeSubeNode->getOperand(2).getNode();
11260 SDValue AddcSubcOp0 = AddcSubcNode->getOperand(0);
11261 SDValue AddcSubcOp1 = AddcSubcNode->getOperand(1);
11281 SDValue AddeSubeOp0 = AddeSubeNode->getOperand(0);
11282 SDValue AddeSubeOp1 = AddeSubeNode->getOperand(1);
11400 SDNode* AddcNode = AddeNode->getOperand(2).getNode();
11407 if (AddcNode->getOperand(0).getOpcode() == ARMISD::UMLAL) {
11408 UmlalNode = AddcNode->getOperand(0).getNode();
11409 AddHi = AddcNode->getOperand(1);
11410 } else if (AddcNode->getOperand(1).getOpcode() == ARMISD::UMLAL) {
11411 UmlalNode = AddcNode->getOperand(1).getNode();
11412 AddHi = AddcNode->getOperand(0);
11419 if (!isNullConstant(UmlalNode->getOperand(3)))
11422 if ((isNullConstant(AddeNode->getOperand(0)) &&
11423 AddeNode->getOperand(1).getNode() == UmlalNode) ||
11424 (AddeNode->getOperand(0).getNode() == UmlalNode &&
11425 isNullConstant(AddeNode->getOperand(1)))) {
11427 SDValue Ops[] = { UmlalNode->getOperand(0), UmlalNode->getOperand(1),
11427 SDValue Ops[] = { UmlalNode->getOperand(0), UmlalNode->getOperand(1),
11428 UmlalNode->getOperand(2), AddHi };
11449 SDNode* AddcNode = N->getOperand(2).getNode();
11450 SDNode* AddeNode = N->getOperand(3).getNode();
11453 isNullConstant(AddeNode->getOperand(0)) &&
11454 isNullConstant(AddeNode->getOperand(1)) &&
11455 (AddeNode->getOperand(2).getNode() == AddcNode))
11458 {N->getOperand(0), N->getOperand(1),
11458 {N->getOperand(0), N->getOperand(1),
11459 AddcNode->getOperand(0), AddcNode->getOperand(1)});
11459 AddcNode->getOperand(0), AddcNode->getOperand(1)});
11471 SDValue LHS = N->getOperand(0);
11472 SDValue RHS = N->getOperand(1);
11474 isNullConstant(LHS->getOperand(0)) &&
11475 isNullConstant(LHS->getOperand(1)) && isOneConstant(RHS)) {
11476 return DCI.CombineTo(N, SDValue(N, 0), LHS->getOperand(2));
11481 SDValue RHS = N->getOperand(1);
11489 return DAG.getNode(Opcode, DL, N->getVTList(), N->getOperand(0), RHS);
11502 SDValue RHS = N->getOperand(1);
11516 N->getOperand(0), RHS, N->getOperand(2));
11516 N->getOperand(0), RHS, N->getOperand(2));
11519 } else if (N->getOperand(1)->getOpcode() == ISD::SMUL_LOHI) {
11597 SDValue N1 = N->getOperand(0);
11601 if (auto *Const = dyn_cast<ConstantSDNode>(N1->getOperand(1))) {
11679 if (isa<ConstantSDNode>(U->getOperand(0)) ||
11680 isa<ConstantSDNode>(U->getOperand(1)))
11684 if (U->getOperand(0).getOpcode() == ISD::SHL ||
11685 U->getOperand(1).getOpcode() == ISD::SHL)
11695 if (N->getOperand(0).getOpcode() != ISD::SHL)
11698 SDValue SHL = N->getOperand(0);
11700 auto *C1ShlC2 = dyn_cast<ConstantSDNode>(N->getOperand(1));
11746 SDValue N0 = N->getOperand(0);
11747 SDValue N1 = N->getOperand(1);
11765 SDValue N0 = N->getOperand(0);
11766 SDValue N1 = N->getOperand(1);
11798 SDValue N0 = N->getOperand(0);
11799 SDValue N1 = N->getOperand(1);
11815 SDValue N00 = N0->getOperand(0);
11816 SDValue N01 = N0->getOperand(1);
11839 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1));
11847 SDValue V = N->getOperand(0);
11915 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N->getOperand(1));
11924 SDNode *N0 = N->getOperand(0).getNode();
11933 ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0->getOperand(1));
11959 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0),
11970 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0),
11983 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0),
11996 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0),
12013 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(N->getOperand(1));
12034 DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0));
12066 SDValue SRL = OR->getOperand(0);
12067 SDValue SHL = OR->getOperand(1);
12070 SRL = OR->getOperand(1);
12071 SHL = OR->getOperand(0);
12093 SDValue OpS16 = SMULLOHI->getOperand(0);
12094 SDValue OpS32 = SMULLOHI->getOperand(1);
12099 OpS32 = SMULLOHI->getOperand(0);
12108 OpS16 = OpS16->getOperand(0);
12126 SDValue N0 = N->getOperand(0);
12127 SDValue N1 = N->getOperand(1);
12267 SDValue N0 = N->getOperand(0);
12268 SDValue N1 = N->getOperand(1);
12273 CondCode0 = (ARMCC::CondCodes)cast<const ConstantSDNode>(N0->getOperand(2))
12276 CondCode0 = (ARMCC::CondCodes)cast<const ConstantSDNode>(N0->getOperand(1))
12279 CondCode1 = (ARMCC::CondCodes)cast<const ConstantSDNode>(N1->getOperand(2))
12282 CondCode1 = (ARMCC::CondCodes)cast<const ConstantSDNode>(N1->getOperand(1))
12292 N0->getOperand(0)->getValueType(0).isFloatingPoint()) ||
12294 N1->getOperand(0)->getValueType(0).isFloatingPoint()))
12298 Ops0.push_back(N0->getOperand(0));
12300 Ops0.push_back(N0->getOperand(1));
12303 Ops1.push_back(N1->getOperand(0));
12305 Ops1.push_back(N1->getOperand(1));
12320 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(N->getOperand(1));
12341 DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0));
12356 SDValue N0 = N->getOperand(0);
12357 SDValue N1 = N->getOperand(1);
12374 BuildVectorSDNode *BVN0 = dyn_cast<BuildVectorSDNode>(N0->getOperand(1));
12375 BuildVectorSDNode *BVN1 = dyn_cast<BuildVectorSDNode>(N1->getOperand(1));
12390 N0->getOperand(1),
12391 N0->getOperand(0),
12392 N1->getOperand(0));
12443 SDValue From = N->getOperand(1);
12444 ToMask = ~cast<ConstantSDNode>(N->getOperand(2))->getAPIntValue();
12450 isa<ConstantSDNode>(From->getOperand(1))) {
12451 APInt Shift = cast<ConstantSDNode>(From->getOperand(1))->getAPIntValue();
12454 From = From->getOperand(0);
12474 SDValue To = N->getOperand(0);
12515 SDValue N1 = N->getOperand(1);
12522 unsigned InvMask = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
12532 N->getOperand(0), N1.getOperand(0),
12533 N->getOperand(2));
12534 } else if (N->getOperand(0).getOpcode() == ARMISD::BFI) {
12564 return DCI.DAG.getNode(ARMISD::BFI, dl, VT, N->getOperand(0), From1,
12576 SDValue InDouble = N->getOperand(0);
12584 InNode->getOperand(1).getOpcode() == ISD::FrameIndex &&
12618 SDValue Op0 = N->getOperand(0);
12619 SDValue Op1 = N->getOperand(1);
12639 SDNode *Elt = N->getOperand(i).getNode();
12669 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(i));
12719 SDValue Elt = N->getOperand(Idx);
12722 if (Elt->getOperand(0).getValueType() == MVT::i32)
12750 SDValue V = N->getOperand(Idx);
12754 V->getOperand(0).getValueType() == MVT::i32)
12774 SDValue Op = N->getOperand(0);
12780 if (Op->getOperand(0).getValueType() == VT)
12781 return Op->getOperand(0);
12783 Op->getOperand(0).getValueType(), Op->getOperand(0));
12783 Op->getOperand(0).getValueType(), Op->getOperand(0));
12796 SDNode *Elt = N->getOperand(1).getNode();
12805 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0));
12806 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(1));
12811 Vec, V, N->getOperand(2));
12828 SDValue Op0 = N->getOperand(0);
12829 SDValue Op1 = N->getOperand(1);
12879 SDValue Addr = N->getOperand(AddrOpIdx);
12909 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
12967 VecTy = N->getOperand(AddrOpIdx+1).getValueType();
12970 VecTy = N->getOperand(1).getValueType();
12978 SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0);
12978 SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0);
13039 Ops.push_back(N->getOperand(0)); // incoming chain
13040 Ops.push_back(N->getOperand(AddrOpIdx));
13050 Ops.push_back(N->getOperand(i));
13108 SDNode *VLD = N->getOperand(0).getNode();
13113 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue();
13130 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue();
13138 VLDLaneNo != cast<ConstantSDNode>(User->getOperand(1))->getZExtValue())
13149 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) };
13149 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) };
13181 SDValue Op = N->getOperand(0);
13214 SDValue Op = N->getOperand(0);
13225 SDValue Ops[] = { LD->getOperand(0), LD->getOperand(1),
13225 SDValue Ops[] = { LD->getOperand(0), LD->getOperand(1),
13345 EVT FromVT = Trunc->getOperand(0).getValueType();
13420 St->getChain(), DL, StVal.getNode()->getOperand(isBigEndian ? 1 : 0),
13427 StVal.getNode()->getOperand(isBigEndian ? 0 : 1),
13479 SDValue Op = N->getOperand(0);
13484 SDValue ConstVec = Op->getOperand(1);
13513 DAG.getConstant(IntrinsicOpcode, dl, MVT::i32), Op->getOperand(0),
13536 SDValue Op = N->getOperand(0);
13542 SDValue ConstVec = N->getOperand(1);
13583 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
13608 EVT VT = N->getOperand(1).getValueType();
13615 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt)) {
13619 if (isVShiftRImm(N->getOperand(2), VT, false, true, Cnt)) {
13628 if (isVShiftRImm(N->getOperand(2), VT, false, true, Cnt))
13634 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
13639 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
13651 if (isVShiftRImm(N->getOperand(2), VT, true, true, Cnt))
13705 N->getOperand(1), DAG.getConstant(Cnt, dl, MVT::i32));
13709 EVT VT = N->getOperand(1).getValueType();
13713 if (isVShiftLImm(N->getOperand(3), VT, false, Cnt))
13715 else if (isVShiftRImm(N->getOperand(3), VT, false, true, Cnt))
13723 N->getOperand(1), N->getOperand(2),
13723 N->getOperand(1), N->getOperand(2),
13749 SDValue N1 = N->getOperand(1);
13751 SDValue N0 = N->getOperand(0);
13760 N->getOperand(0)->getOpcode() == ISD::AND &&
13761 N->getOperand(0)->hasOneUse()) {
13768 SDValue N0 = N->getOperand(0);
13769 ConstantSDNode *ShiftAmtNode = dyn_cast<ConstantSDNode>(N->getOperand(1));
13773 ConstantSDNode *AndMaskNode = dyn_cast<ConstantSDNode>(N0->getOperand(1));
13784 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0),
13806 if (isVShiftLImm(N->getOperand(1), VT, false, Cnt)) {
13808 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0),
13815 if (isVShiftRImm(N->getOperand(1), VT, false, false, Cnt)) {
13819 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0),
13830 SDValue N0 = N->getOperand(0);
13895 SDValue N0 = N->getOperand(0);
13957 SDValue Op0 = CMOV->getOperand(0);
13958 SDValue Op1 = CMOV->getOperand(1);
13959 auto CCNode = cast<ConstantSDNode>(CMOV->getOperand(2));
13961 SDValue CmpZ = CMOV->getOperand(4);
13964 if (!isNullConstant(CmpZ->getOperand(1)))
13968 SDValue And = CmpZ->getOperand(0);
13971 const APInt *AndC = isPowerOf2Constant(And->getOperand(1));
13974 SDValue X = And->getOperand(0);
13987 ConstantSDNode *OrC = dyn_cast<ConstantSDNode>(Op1->getOperand(1));
13990 SDValue Y = Op1->getOperand(0);
14063 return SearchLoopIntrinsic(N->getOperand(0), CC, Imm, Negate);
14095 SDValue Chain = N->getOperand(0);
14100 Cond = N->getOperand(1);
14101 Dest = N->getOperand(2);
14104 CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
14105 Cond = N->getOperand(2);
14106 Dest = N->getOperand(4);
14107 if (auto *Const = dyn_cast<ConstantSDNode>(N->getOperand(3))) {
14144 unsigned IntOp = cast<ConstantSDNode>(Int->getOperand(1))->getZExtValue();
14148 SDValue OtherTarget = Br->getOperand(1);
14152 SDValue NewBrOps[] = { Br->getOperand(0), Dest };
14201 SDValue Cmp = N->getOperand(4);
14210 SDValue Chain = N->getOperand(0);
14211 SDValue BB = N->getOperand(1);
14212 SDValue ARMcc = N->getOperand(2);
14219 LHS->getOperand(0)->getOpcode() == ARMISD::CMOV &&
14220 LHS->getOperand(0)->hasOneUse()) {
14221 auto *LHS00C = dyn_cast<ConstantSDNode>(LHS->getOperand(0)->getOperand(0));
14221 auto *LHS00C = dyn_cast<ConstantSDNode>(LHS->getOperand(0)->getOperand(0));
14222 auto *LHS01C = dyn_cast<ConstantSDNode>(LHS->getOperand(0)->getOperand(1));
14222 auto *LHS01C = dyn_cast<ConstantSDNode>(LHS->getOperand(0)->getOperand(1));
14223 auto *LHS1C = dyn_cast<ConstantSDNode>(LHS->getOperand(1));
14230 ARMISD::BRCOND, dl, VT, Chain, BB, LHS->getOperand(0)->getOperand(2),
14230 ARMISD::BRCOND, dl, VT, Chain, BB, LHS->getOperand(0)->getOperand(2),
14231 LHS->getOperand(0)->getOperand(3), LHS->getOperand(0)->getOperand(4));
14231 LHS->getOperand(0)->getOperand(3), LHS->getOperand(0)->getOperand(4));
14231 LHS->getOperand(0)->getOperand(3), LHS->getOperand(0)->getOperand(4));
14231 LHS->getOperand(0)->getOperand(3), LHS->getOperand(0)->getOperand(4));
14241 SDValue Cmp = N->getOperand(4);
14250 SDValue FalseVal = N->getOperand(0);
14251 SDValue TrueVal = N->getOperand(1);
14252 SDValue ARMcc = N->getOperand(2);
14283 N->getOperand(3), Cmp);
14288 N->getOperand(3), NewCmp);
14294 auto *LHS0C = dyn_cast<ConstantSDNode>(LHS->getOperand(0));
14295 auto *LHS1C = dyn_cast<ConstantSDNode>(LHS->getOperand(1));
14301 LHS->getOperand(2), LHS->getOperand(3),
14301 LHS->getOperand(2), LHS->getOperand(3),
14302 LHS->getOperand(4));
14348 N->getOperand(3), CPSRGlue.getValue(1));
14363 N->getOperand(3), CPSRGlue.getValue(1));
14471 if (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI))
14478 if (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI))
14487 if ((SimplifyDemandedBits(N->getOperand(0), DemandedMask, DCI)) ||
14488 (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI)))
14493 unsigned LowWidth = N->getOperand(0).getValueType().getSizeInBits();
14495 unsigned HighWidth = N->getOperand(1).getValueType().getSizeInBits();
14497 if ((SimplifyDemandedBits(N->getOperand(0), LowMask, DCI)) ||
14498 (SimplifyDemandedBits(N->getOperand(1), HighMask, DCI)))
14503 unsigned HighWidth = N->getOperand(0).getValueType().getSizeInBits();
14505 unsigned LowWidth = N->getOperand(1).getValueType().getSizeInBits();
14507 if ((SimplifyDemandedBits(N->getOperand(0), HighMask, DCI)) ||
14508 (SimplifyDemandedBits(N->getOperand(1), LowMask, DCI)))
14515 if ((SimplifyDemandedBits(N->getOperand(0), DemandedMask, DCI)) ||
14516 (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI)))
14524 if ((SimplifyDemandedBits(N->getOperand(0), DemandedMask, DCI)) ||
14525 (SimplifyDemandedBits(N->getOperand(1), DemandedMask, DCI)))
14531 switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) {
15132 Base = Ptr->getOperand(0);
15133 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Ptr->getOperand(1))) {
15143 Offset = Ptr->getOperand(1);
15147 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Ptr->getOperand(1))) {
15153 Base = Ptr->getOperand(0);
15161 ARM_AM::getShiftOpcForNode(Ptr->getOperand(0).getOpcode());
15163 Base = Ptr->getOperand(1);
15164 Offset = Ptr->getOperand(0);
15166 Base = Ptr->getOperand(0);
15167 Offset = Ptr->getOperand(1);
15173 Base = Ptr->getOperand(0);
15174 Offset = Ptr->getOperand(1);
15189 Base = Ptr->getOperand(0);
15190 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Ptr->getOperand(1))) {
15213 if (!isa<ConstantSDNode>(Ptr->getOperand(1)))
15216 ConstantSDNode *RHS = cast<ConstantSDNode>(Ptr->getOperand(1));
15235 Base = Ptr->getOperand(0);
15334 auto *RHS = dyn_cast<ConstantSDNode>(Op->getOperand(1));
15338 Offset = Op->getOperand(1);
15339 Base = Op->getOperand(0);
15415 ConstantSDNode *CN = cast<ConstantSDNode>(Op->getOperand(1));
15944 EVT ArgVT = N->getOperand(i).getValueType();
15946 Entry.Node = N->getOperand(i);
15980 const SDValue Dividend = Op->getOperand(0);
15981 const SDValue Divisor = Op->getOperand(1);
16057 return ResNode->getOperand(1);
16188 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(0),
16190 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(0),
lib/Target/AVR/AVRISelDAGToDAG.cpp 240 SDValue CopyFromRegOp = Op->getOperand(0);
241 SDValue ImmOp = Op->getOperand(1);
252 cast<RegisterSDNode>(CopyFromRegOp->getOperand(1));
418 SDValue Chain = N->getOperand(0);
419 SDValue Callee = N->getOperand(1);
429 if (N->getOperand(LastOpNum).getValueType() == MVT::Glue) {
440 Ops.push_back(N->getOperand(i));
457 SDValue Chain = N->getOperand(0);
458 SDValue JmpAddr = N->getOperand(1);
480 SDValue Lhs = N->getOperand(0);
481 SDValue Rhs = N->getOperand(1);
lib/Target/AVR/AVRISelLowering.cpp 287 if (!isa<ConstantSDNode>(N->getOperand(1))) {
292 return DAG.getNode(AVRISD::LSLLOOP, dl, VT, N->getOperand(0),
293 N->getOperand(1));
295 return DAG.getNode(AVRISD::LSRLOOP, dl, VT, N->getOperand(0),
296 N->getOperand(1));
298 return DAG.getNode(AVRISD::ROLLOOP, dl, VT, N->getOperand(0),
299 N->getOperand(1));
301 return DAG.getNode(AVRISD::RORLOOP, dl, VT, N->getOperand(0),
302 N->getOperand(1));
304 return DAG.getNode(AVRISD::ASRLOOP, dl, VT, N->getOperand(0),
305 N->getOperand(1));
309 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
310 SDValue Victim = N->getOperand(0);
723 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1))) {
725 ISD::SUB, DL, N->getValueType(0), N->getOperand(0),
806 if (const ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Op->getOperand(1))) {
815 Base = Op->getOperand(0);
857 if (const ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Op->getOperand(1))) {
865 Base = Op->getOperand(0);
lib/Target/BPF/BPFISelDAGToDAG.cpp 205 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
211 SDValue Chain = Node->getOperand(0);
212 SDValue N1 = Node->getOperand(1);
213 SDValue Skb = Node->getOperand(2);
214 SDValue N3 = Node->getOperand(3);
259 SDNode *LDAddrNode = LD->getOperand(1).getNode();
263 SDValue OP1 = LDAddrNode->getOperand(0);
264 SDValue OP2 = LDAddrNode->getOperand(1);
274 dyn_cast<GlobalAddressSDNode>(OP1N->getOperand(0).getNode());
283 SDValue OP1 = LDAddrNode->getOperand(0);
467 ConstantSDNode *MaskN = dyn_cast<ConstantSDNode>(Node->getOperand(1));
477 SDValue BaseV = Node->getOperand(0);
481 unsigned IntNo = cast<ConstantSDNode>(BaseV->getOperand(1))->getZExtValue();
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 190 unsigned IntNo = cast<ConstantSDNode>(IntN->getOperand(1))->getZExtValue();
205 auto Inc = cast<ConstantSDNode>(IntN->getOperand(5));
208 { IntN->getOperand(2), I, IntN->getOperand(4),
208 { IntN->getOperand(2), I, IntN->getOperand(4),
209 IntN->getOperand(0) });
229 SDValue Loc = IntN->getOperand(3);
265 SDValue Ch = N->getOperand(0);
266 SDValue Loc = N->getOperand(1);
282 switch (cast<ConstantSDNode>(C->getOperand(1))->getZExtValue()) {
300 if (C->getNumOperands() < 4 || Loc.getNode() != C->getOperand(3).getNode())
323 unsigned IntNo = cast<ConstantSDNode>(IntN->getOperand(1))->getZExtValue();
343 {IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(0)});
343 {IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(0)});
343 {IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(0)});
364 unsigned IntNo = cast<ConstantSDNode>(IntN->getOperand(1))->getZExtValue();
390 auto Inc = cast<ConstantSDNode>(IntN->getOperand(3));
393 Ops = { IntN->getOperand(2), I, IntN->getOperand(4), IntN->getOperand(5),
393 Ops = { IntN->getOperand(2), I, IntN->getOperand(4), IntN->getOperand(5),
393 Ops = { IntN->getOperand(2), I, IntN->getOperand(4), IntN->getOperand(5),
394 IntN->getOperand(0) };
398 Ops = { IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(4),
398 Ops = { IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(4),
398 Ops = { IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(4),
399 IntN->getOperand(0) };
425 auto Inc = cast<ConstantSDNode>(IntN->getOperand(3));
428 Ops = { IntN->getOperand(2), I, IntN->getOperand(4), IntN->getOperand(5),
428 Ops = { IntN->getOperand(2), I, IntN->getOperand(4), IntN->getOperand(5),
428 Ops = { IntN->getOperand(2), I, IntN->getOperand(4), IntN->getOperand(5),
429 IntN->getOperand(6), IntN->getOperand(0) };
429 IntN->getOperand(6), IntN->getOperand(0) };
433 Ops = { IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(4),
433 Ops = { IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(4),
433 Ops = { IntN->getOperand(2), IntN->getOperand(3), IntN->getOperand(4),
434 IntN->getOperand(5), IntN->getOperand(0) };
434 IntN->getOperand(5), IntN->getOperand(0) };
570 SDValue Shl_0 = N->getOperand(0);
571 SDValue Shl_1 = N->getOperand(1);
639 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
663 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
683 SDValue V = N->getOperand(1);
687 N->getOperand(0), U);
765 { N->getOperand(0), N->getOperand(1),
765 { N->getOperand(0), N->getOperand(1),
766 N->getOperand(2) });
780 N->getOperand(0),
782 N->getOperand(1),
792 M0, N->getOperand(2), M1);
801 N->getOperand(2));
803 N->getOperand(0), N->getOperand(1),
803 N->getOperand(0), N->getOperand(1),
811 SDValue A = N->getOperand(1);
817 N->getOperand(0), M);
825 SDValue Op = N->getOperand(0);
835 N->getOperand(0));
844 N->getOperand(0), Zero);
852 MVT OpTy = N->getOperand(0).getValueType().getSimpleVT(); (void)OpTy;
858 N->getOperand(0), SDValue(R,0));
871 N->getOperand(0), SDValue(R,0));
952 SDValue S0 = U->getOperand(0);
953 SDValue S1 = U->getOperand(1);
995 SDValue N0 = I->getOperand(0), N1 = I->getOperand(1);
995 SDValue N0 = I->getOperand(0), N1 = I->getOperand(1);
1033 SDValue Off = I->getOperand(2);
1096 SDValue Addr = Opc == ISD::LOAD ? N->getOperand(1) : N->getOperand(2);
1096 SDValue Addr = Opc == ISD::LOAD ? N->getOperand(1) : N->getOperand(2);
1161 SDValue OpI1 = N->getOperand(0);
1179 Ops[i] = U->getOperand(i);
1587 const VTSDNode *VN = dyn_cast<const VTSDNode>(N->getOperand(1));
1608 return isa<ConstantSDNode>(N->getOperand(1).getNode());
1782 N->getOperand(1).getValueType());
1888 SDValue Op0 = N->getOperand(0);
1889 SDValue Op1 = N->getOperand(1);
1902 SDNode *Op1N = N->getOperand(1).getNode(); // Op1 may have been RAUWd
1910 RootHeights[N] = std::max(getHeight(N->getOperand(0).getNode()),
1911 getHeight(N->getOperand(1).getNode())) + 1;
2021 Op1 = Child->getOperand(1);
2023 if (!NodeHeights.count(Op1) || !NodeHeights.count(Child->getOperand(0))) {
2028 Worklist.push_back(Child->getOperand(0));
2031 if (std::abs(NodeHeights[Op1] - NodeHeights[Child->getOperand(0)]) > 1)
2035 NodeHeights[Child->getOperand(0)]) + 1;
2262 Worklist.push_back(N->getOperand(0).getNode());
2263 Worklist.push_back(N->getOperand(1).getNode());
2281 N = CurDAG->UpdateNodeOperands(N, N->getOperand(0),
2282 NewBasePtr, N->getOperand(2));
2284 N = CurDAG->UpdateNodeOperands(N, N->getOperand(0), N->getOperand(1),
2284 N = CurDAG->UpdateNodeOperands(N, N->getOperand(0), N->getOperand(1),
2285 NewBasePtr, N->getOperand(3));
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 968 WorkQ.insert(W->getOperand(j).getNode());
2047 SDValue Vec0 = N->getOperand(0);
2048 SDValue Vec1 = N->getOperand(1);
2080 SDValue VecV = N->getOperand(0);
2081 SDValue RotV = N->getOperand(1);
2102 SDValue Vv = N->getOperand(0);
2103 SDValue Vu = N->getOperand(1);
2104 SDValue Rt = N->getOperand(2);
2125 SDValue Chain = N->getOperand(0);
2126 SDValue Address = N->getOperand(2);
2127 SDValue Predicate = N->getOperand(3);
2128 SDValue Base = N->getOperand(4);
2129 SDValue Modifier = N->getOperand(5);
2130 SDValue Offset = N->getOperand(6);
2133 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
2163 SDValue Chain = N->getOperand(0);
2164 SDValue Address = N->getOperand(2);
2165 SDValue Base = N->getOperand(3);
2166 SDValue Modifier = N->getOperand(4);
2167 SDValue Offset = N->getOperand(5);
2170 unsigned IntNo = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
2199 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
2203 SmallVector<SDValue, 3> Ops = { N->getOperand(1), N->getOperand(2),
2203 SmallVector<SDValue, 3> Ops = { N->getOperand(1), N->getOperand(2),
2204 N->getOperand(3) };
2210 SmallVector<SDValue, 3> Ops = { N->getOperand(1), N->getOperand(2),
2210 SmallVector<SDValue, 3> Ops = { N->getOperand(1), N->getOperand(2),
2211 N->getOperand(3) };
2217 SmallVector<SDValue, 3> Ops = { N->getOperand(1), N->getOperand(2),
2217 SmallVector<SDValue, 3> Ops = { N->getOperand(1), N->getOperand(2),
2218 N->getOperand(3) };
2224 SmallVector<SDValue, 3> Ops = { N->getOperand(1), N->getOperand(2),
2224 SmallVector<SDValue, 3> Ops = { N->getOperand(1), N->getOperand(2),
2225 N->getOperand(3) };
lib/Target/Hexagon/HexagonISelLowering.cpp 564 Base = Op->getOperand(0);
565 Offset = Op->getOperand(1);
2913 N->getOperand(0), DAG);
lib/Target/Lanai/LanaiISelLowering.cpp 888 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op->getOperand(1));
938 SDValue V = Op->getOperand(0);
1354 CC = N->getOperand(0);
1355 SDValue N1 = N->getOperand(1);
1356 SDValue N2 = N->getOperand(2);
1373 CC = N->getOperand(0);
1383 CC = N->getOperand(0);
1445 SDValue N0 = N->getOperand(0);
1446 SDValue N1 = N->getOperand(1);
1459 SDValue N0 = N->getOperand(0);
1460 SDValue N1 = N->getOperand(1);
1501 Known = DAG.computeKnownBits(Op->getOperand(0), Depth + 1);
1502 Known2 = DAG.computeKnownBits(Op->getOperand(1), Depth + 1);
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp 210 if (!MatchAddress(N.getNode()->getOperand(0), AM) &&
211 !MatchAddress(N.getNode()->getOperand(1), AM))
214 if (!MatchAddress(N.getNode()->getOperand(1), AM) &&
215 !MatchAddress(N.getNode()->getOperand(0), AM))
413 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
413 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
416 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
416 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
423 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
423 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
430 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
430 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
433 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
433 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
440 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
440 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
443 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
443 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
450 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
450 if (tryIndexedBinOp(Node, Node->getOperand(0), Node->getOperand(1),
453 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
453 else if (tryIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0),
lib/Target/MSP430/MSP430ISelLowering.cpp 951 if (!isa<ConstantSDNode>(N->getOperand(1)))
954 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
957 SDValue Victim = N->getOperand(0);
1340 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Op->getOperand(1))) {
1346 Base = Op->getOperand(0);
lib/Target/Mips/Mips16ISelDAGToDAG.cpp 48 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
49 N->getOperand(1));
lib/Target/Mips/MipsISelDAGToDAG.cpp 229 SDValue X = Node->getOperand(0);
230 SDValue C = Node->getOperand(1);
lib/Target/Mips/MipsISelLowering.cpp 581 N->getOperand(0), N->getOperand(1));
581 N->getOperand(0), N->getOperand(1));
682 SDValue SetCC = N->getOperand(0);
688 SDValue False = N->getOperand(2);
710 SDValue True = N->getOperand(1);
720 SDValue True = N->getOperand(1);
761 SDValue ValueIfTrue = N->getOperand(0), ValueIfFalse = N->getOperand(2);
761 SDValue ValueIfTrue = N->getOperand(0), ValueIfFalse = N->getOperand(2);
777 SDValue FCC = N->getOperand(1), Glue = N->getOperand(3);
777 SDValue FCC = N->getOperand(1), Glue = N->getOperand(3);
788 SDValue FirstOperand = N->getOperand(0);
790 SDValue Mask = N->getOperand(1);
874 SDValue And0 = N->getOperand(0), And1 = N->getOperand(1);
874 SDValue And0 = N->getOperand(0), And1 = N->getOperand(1);
927 if (!(CN1 = dyn_cast<ConstantSDNode>(And1->getOperand(1))))
930 if (!(CN1 = dyn_cast<ConstantSDNode>(N->getOperand(1))))
939 EVT ValTy = N->getOperand(0)->getValueType(0);
955 And0->getOperand(0));
966 if (ROOTNode->getOperand(0).getOpcode() != ISD::MUL &&
967 ROOTNode->getOperand(1).getOpcode() != ISD::MUL)
996 SDValue Mult = ROOTNode->getOperand(0).getOpcode() == ISD::MUL
997 ? ROOTNode->getOperand(0)
998 : ROOTNode->getOperand(1);
1000 SDValue AddOperand = ROOTNode->getOperand(0).getOpcode() == ISD::MUL
1001 ? ROOTNode->getOperand(1)
1002 : ROOTNode->getOperand(0);
1014 SDValue MultLHS = Mult->getOperand(0);
1015 SDValue MultRHS = Mult->getOperand(1);
1043 CurDAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Mult->getOperand(0)),
1044 CurDAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Mult->getOperand(1)), ACCIn};
1083 SDValue Add = N->getOperand(1);
1097 SDValue Add1 = DAG.getNode(ISD::ADD, DL, ValTy, N->getOperand(0),
1112 SDValue FirstOperand = N->getOperand(0);
1114 SDValue SecondOperand = N->getOperand(1);
1193 if (N->getOperand(0).getValueType().isVector())
2148 SDValue Chain = Node->getOperand(0);
2149 SDValue VAListPtr = Node->getOperand(1);
2152 const Value *SV = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
2986 Node->getOperand(0).getNumOperands() < 2) {
2992 const SDValue TargetAddr = Node->getOperand(0).getOperand(1);
lib/Target/Mips/MipsSEISelDAGToDAG.cpp 206 SDValue InFlag = Node->getOperand(2);
208 SDValue LHS = Node->getOperand(0), RHS = Node->getOperand(1);
208 SDValue LHS = Node->getOperand(0), RHS = Node->getOperand(1);
555 N = N->getOperand(0);
631 N = N->getOperand(0);
662 N = N->getOperand(0);
696 N = N->getOperand(0);
718 N = N->getOperand(0);
747 SDValue cond = Node->getOperand(0);
748 SDValue Hi1 = Node->getOperand(1);
749 SDValue Lo1 = Node->getOperand(2);
750 SDValue Hi2 = Node->getOperand(3);
751 SDValue Lo2 = Node->getOperand(4);
834 switch (cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue()) {
839 SDValue ChainIn = Node->getOperand(0);
840 SDValue RegIdx = Node->getOperand(2);
851 switch (cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue()) {
860 Node->getOperand(1)));
867 switch (cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue()) {
872 SDValue ChainIn = Node->getOperand(0);
873 SDValue RegIdx = Node->getOperand(2);
874 SDValue Value = Node->getOperand(3);
899 if (Node->getOperand(1)->getOpcode() != ISD::Constant ||
900 Node->getOperand(2)->getOpcode() != ISD::Constant)
932 Node->getOperand(0), CurDAG->getTargetConstant(Pos, DL, MVT::i32),
933 CurDAG->getTargetConstant(Size, DL, MVT::i32), Node->getOperand(3)};
lib/Target/Mips/MipsSEISelLowering.cpp 418 SDValue Tmp = DAG.getNode(MipsISD::MTC1_D64, DL, MVT::f64, Op->getOperand(0));
419 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1),
420 Op->getOperand(2));
487 SDValue Op0 = N->getOperand(0);
488 SDValue Op1 = N->getOperand(1);
507 SDValue Op0Op2 = Op0->getOperand(2);
514 SDValue Ops[] = { Op0->getOperand(0), Op0->getOperand(1), Op0Op2 };
514 SDValue Ops[] = { Op0->getOperand(0), Op0->getOperand(1), Op0Op2 };
557 N = N->getOperand(0);
581 if (isVectorAllOnes(N->getOperand(0)))
582 return N->getOperand(1) == OfNode;
584 if (isVectorAllOnes(N->getOperand(1)))
585 return N->getOperand(0) == OfNode;
607 SDValue Op0 = N->getOperand(0);
608 SDValue Op1 = N->getOperand(1);
611 SDValue Op0Op0 = Op0->getOperand(0);
612 SDValue Op0Op1 = Op0->getOperand(1);
613 SDValue Op1Op0 = Op1->getOperand(0);
614 SDValue Op1Op1 = Op1->getOperand(1);
834 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1)))
837 return genConstMult(N->getOperand(0), C->getAPIntValue(), SDLoc(N), VT,
852 BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N->getOperand(1));
865 return DAG.getNode(Opc, DL, Ty, N->getOperand(0),
898 SDValue Op0 = N->getOperand(0);
899 SDValue Op1 = N->getOperand(1);
905 if (Op0->getOpcode() == ISD::SHL && Op1 == Op0->getOperand(1)) {
906 SDValue Op0Op0 = Op0->getOperand(0);
916 EVT ExtendTy = cast<VTSDNode>(Op0Op0->getOperand(2))->getVT();
922 SDValue Ops[] = { Op0Op0->getOperand(0), Op0Op0->getOperand(1),
922 SDValue Ops[] = { Op0Op0->getOperand(0), Op0Op0->getOperand(1),
923 Op0Op0->getOperand(2) };
973 if (!isLegalDSPCondCode(Ty, cast<CondCodeSDNode>(N->getOperand(2))->get()))
976 return DAG.getNode(MipsISD::SETCC_DSP, SDLoc(N), Ty, N->getOperand(0),
977 N->getOperand(1), N->getOperand(2));
977 N->getOperand(1), N->getOperand(2));
984 SDValue SetCC = N->getOperand(0);
991 N->getOperand(1), N->getOperand(2), SetCC.getOperand(2));
991 N->getOperand(1), N->getOperand(2), SetCC.getOperand(2));
1005 SDValue Op0 = N->getOperand(0);
1006 SDValue Op1 = N->getOperand(1);
1017 return DAG.getNode(MipsISD::VNOR, SDLoc(N), Ty, NotOp->getOperand(0),
1018 NotOp->getOperand(1));
1314 bool HasChainIn = Op->getOperand(0).getValueType() == MVT::Other;
1320 Ops.push_back(Op->getOperand(OpNo++));
1323 assert(Op->getOperand(OpNo).getOpcode() == ISD::TargetConstant);
1326 SDValue Opnd = Op->getOperand(++OpNo), In64;
1335 Ops.push_back(Op->getOperand(OpNo));
1363 SDValue Vec = Op->getOperand(1);
1364 SDValue Idx = Op->getOperand(2);
1383 SDValue LaneA = Op->getOperand(OpNr);
1420 auto *CImm = cast<ConstantSDNode>(Op->getOperand(ImmOp));
1504 return DAG.getNode(Opc, DL, VecTy, Op->getOperand(1), Exp2Imm);
1510 SDValue Vec = Op->getOperand(2);
1526 return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1),
1534 << cast<ConstantSDNode>(Op->getOperand(2))->getAPIntValue();
1537 return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1), BitMask);
1543 unsigned Intrinsic = cast<ConstantSDNode>(Op->getOperand(0))->getZExtValue();
1583 return DAG.getNode(ISD::ADD, DL, Op->getValueType(0), Op->getOperand(1),
1584 Op->getOperand(2));
1589 return DAG.getNode(ISD::ADD, DL, Op->getValueType(0), Op->getOperand(1),
1592 return DAG.getNode(ISD::AND, DL, Op->getValueType(0), Op->getOperand(1),
1593 Op->getOperand(2));
1595 return DAG.getNode(ISD::AND, DL, Op->getValueType(0), Op->getOperand(1),
1620 Op->getOperand(2), Op->getOperand(1));
1620 Op->getOperand(2), Op->getOperand(1));
1635 Op->getOperand(2), Op->getOperand(1));
1635 Op->getOperand(2), Op->getOperand(1));
1638 return DAG.getNode(ISD::VSELECT, DL, Op->getValueType(0), Op->getOperand(3),
1639 Op->getOperand(2), Op->getOperand(1));
1639 Op->getOperand(2), Op->getOperand(1));
1642 lowerMSASplatImm(Op, 3, DAG), Op->getOperand(2),
1643 Op->getOperand(1));
1645 return DAG.getNode(ISD::VSELECT, DL, Op->getValueType(0), Op->getOperand(3),
1646 Op->getOperand(1), Op->getOperand(2));
1646 Op->getOperand(1), Op->getOperand(2));
1649 lowerMSASplatImm(Op, 3, DAG), Op->getOperand(1),
1650 Op->getOperand(2));
1658 return DAG.getNode(ISD::XOR, DL, VecTy, Op->getOperand(1),
1666 return lowerMSABinaryBitImmIntr(Op, DAG, ISD::XOR, Op->getOperand(2),
1673 Op->getOperand(1));
1676 Op->getOperand(1));
1680 Op->getOperand(1), Op->getOperand(3),
1680 Op->getOperand(1), Op->getOperand(3),
1681 Op->getOperand(2));
1685 Op->getOperand(1), lowerMSASplatImm(Op, 3, DAG),
1686 Op->getOperand(2));
1694 return DAG.getNode(ISD::OR, DL, VecTy, Op->getOperand(1),
1702 return lowerMSABinaryBitImmIntr(Op, DAG, ISD::OR, Op->getOperand(2),
1709 Op->getOperand(1));
1712 Op->getOperand(1));
1717 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1718 Op->getOperand(2), ISD::SETEQ);
1723 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1729 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1730 Op->getOperand(2), ISD::SETLE);
1735 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1741 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1742 Op->getOperand(2), ISD::SETULE);
1747 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1753 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1754 Op->getOperand(2), ISD::SETLT);
1759 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1765 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1766 Op->getOperand(2), ISD::SETULT);
1771 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1785 Op->getValueType(0), Op->getOperand(1),
1786 Op->getOperand(2));
1803 Op->getValueType(0), Op->getOperand(1),
1804 Op->getOperand(2));
1810 return DAG.getNode(ISD::SDIV, DL, Op->getValueType(0), Op->getOperand(1),
1811 Op->getOperand(2));
1816 return DAG.getNode(ISD::UDIV, DL, Op->getValueType(0), Op->getOperand(1),
1817 Op->getOperand(2));
1821 return DAG.getNode(ISD::FADD, DL, Op->getValueType(0), Op->getOperand(1),
1822 Op->getOperand(2));
1826 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1827 Op->getOperand(2), ISD::SETOEQ);
1830 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1831 Op->getOperand(2), ISD::SETOLE);
1834 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1835 Op->getOperand(2), ISD::SETOLT);
1838 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1839 Op->getOperand(2), ISD::SETONE);
1842 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1843 Op->getOperand(2), ISD::SETO);
1846 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1847 Op->getOperand(2), ISD::SETUEQ);
1850 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1851 Op->getOperand(2), ISD::SETULE);
1854 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1855 Op->getOperand(2), ISD::SETULT);
1858 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1859 Op->getOperand(2), ISD::SETUO);
1862 return DAG.getSetCC(DL, Op->getValueType(0), Op->getOperand(1),
1863 Op->getOperand(2), ISD::SETUNE);
1867 return DAG.getNode(ISD::FDIV, DL, Op->getValueType(0), Op->getOperand(1),
1868 Op->getOperand(2));
1872 Op->getOperand(1));
1876 Op->getOperand(1));
1883 Op->getOperand(1));
1894 ISD::FMUL, SDLoc(Op), ResTy, Op->getOperand(1),
1895 DAG.getNode(ISD::FEXP2, SDLoc(Op), ResTy, Op->getOperand(2)));
1899 return DAG.getNode(ISD::FLOG2, DL, Op->getValueType(0), Op->getOperand(1));
1903 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
1903 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
1903 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
1907 return DAG.getNode(ISD::FMUL, DL, Op->getValueType(0), Op->getOperand(1),
1908 Op->getOperand(2));
1913 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
1913 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
1913 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
1917 return DAG.getNode(ISD::FRINT, DL, Op->getValueType(0), Op->getOperand(1));
1920 return DAG.getNode(ISD::FSQRT, DL, Op->getValueType(0), Op->getOperand(1));
1924 return DAG.getNode(ISD::FSUB, DL, Op->getValueType(0), Op->getOperand(1),
1925 Op->getOperand(2));
1929 Op->getOperand(1));
1933 Op->getOperand(1));
1939 Op->getOperand(1), Op->getOperand(2));
1939 Op->getOperand(1), Op->getOperand(2));
1945 Op->getOperand(1), Op->getOperand(2));
1945 Op->getOperand(1), Op->getOperand(2));
1951 Op->getOperand(1), Op->getOperand(2));
1951 Op->getOperand(1), Op->getOperand(2));
1957 Op->getOperand(1), Op->getOperand(2));
1957 Op->getOperand(1), Op->getOperand(2));
1963 Op->getOperand(1), Op->getOperand(3), Op->getOperand(2));
1963 Op->getOperand(1), Op->getOperand(3), Op->getOperand(2));
1963 Op->getOperand(1), Op->getOperand(3), Op->getOperand(2));
1977 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
1981 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3),
1981 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3),
1981 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3),
1992 return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1),
1994 Op->getOperand(2), Op->getOperand(3)));
1994 Op->getOperand(2), Op->getOperand(3)));
2001 return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1),
2003 Op->getOperand(2), Op->getOperand(3)));
2003 Op->getOperand(2), Op->getOperand(3)));
2010 Op->getOperand(1), Op->getOperand(2));
2010 Op->getOperand(1), Op->getOperand(2));
2016 Op->getOperand(1), Op->getOperand(2));
2016 Op->getOperand(1), Op->getOperand(2));
2022 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG, true));
2028 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
2034 Op->getOperand(1), Op->getOperand(2));
2034 Op->getOperand(1), Op->getOperand(2));
2040 Op->getOperand(1), Op->getOperand(2));
2040 Op->getOperand(1), Op->getOperand(2));
2046 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG, true));
2052 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
2057 return DAG.getNode(ISD::SREM, DL, Op->getValueType(0), Op->getOperand(1),
2058 Op->getOperand(2));
2063 return DAG.getNode(ISD::UREM, DL, Op->getValueType(0), Op->getOperand(1),
2064 Op->getOperand(2));
2069 return DAG.getNode(ISD::MUL, DL, Op->getValueType(0), Op->getOperand(1),
2070 Op->getOperand(2));
2076 return DAG.getNode(ISD::SUB, SDLoc(Op), ResTy, Op->getOperand(1),
2078 Op->getOperand(2), Op->getOperand(3)));
2078 Op->getOperand(2), Op->getOperand(3)));
2084 return DAG.getNode(ISD::CTLZ, DL, Op->getValueType(0), Op->getOperand(1));
2087 Op->getOperand(1), Op->getOperand(2));
2087 Op->getOperand(1), Op->getOperand(2));
2092 Op->getOperand(1),
2097 return DAG.getNode(ISD::OR, DL, Op->getValueType(0), Op->getOperand(1),
2098 Op->getOperand(2));
2101 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
2107 Op->getOperand(1), Op->getOperand(2));
2107 Op->getOperand(1), Op->getOperand(2));
2113 Op->getOperand(1), Op->getOperand(2));
2113 Op->getOperand(1), Op->getOperand(2));
2118 return DAG.getNode(ISD::CTPOP, DL, Op->getValueType(0), Op->getOperand(1));
2140 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2148 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2152 Op->getOperand(2), Op->getOperand(1));
2152 Op->getOperand(2), Op->getOperand(1));
2167 int64_t Value = cast<ConstantSDNode>(Op->getOperand(3))->getSExtValue();
2176 return DAG.getNode(ISD::SHL, DL, Op->getValueType(0), Op->getOperand(1),
2183 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
2193 lowerMSASplatZExt(Op, 2, DAG), Op->getOperand(1),
2194 Op->getOperand(1));
2200 lowerMSASplatImm(Op, 2, DAG), Op->getOperand(1),
2201 Op->getOperand(1));
2206 return DAG.getNode(ISD::SRA, DL, Op->getValueType(0), Op->getOperand(1),
2213 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
2227 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2236 return DAG.getNode(ISD::SRL, DL, Op->getValueType(0), Op->getOperand(1),
2243 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
2257 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2266 return DAG.getNode(ISD::SUB, DL, Op->getValueType(0), Op->getOperand(1),
2267 Op->getOperand(2));
2273 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
2279 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
2279 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
2279 Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
2281 return DAG.getNode(ISD::XOR, DL, Op->getValueType(0), Op->getOperand(1),
2282 Op->getOperand(2));
2285 Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
2296 SDValue ChainIn = Op->getOperand(0);
2297 SDValue Address = Op->getOperand(2);
2298 SDValue Offset = Op->getOperand(3);
2315 unsigned Intr = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue();
2370 SDValue ChainIn = Op->getOperand(0);
2371 SDValue Value = Op->getOperand(2);
2372 SDValue Address = Op->getOperand(3);
2373 SDValue Offset = Op->getOperand(4);
2390 unsigned Intr = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue();
2413 SDValue Op0 = Op->getOperand(0);
2420 SDValue Op1 = Op->getOperand(1);
2441 if (isConstantOrUndef(Op->getOperand(i)))
2526 Node->getOperand(i),
2600 Op->getOperand(0));
2679 Wt = Op->getOperand(0);
2681 Wt = Op->getOperand(1);
2688 Ws = Op->getOperand(0);
2690 Ws = Op->getOperand(1);
2725 Wt = Op->getOperand(0);
2727 Wt = Op->getOperand(1);
2734 Ws = Op->getOperand(0);
2736 Ws = Op->getOperand(1);
2772 Wt = Op->getOperand(0);
2774 Wt = Op->getOperand(1);
2781 Ws = Op->getOperand(0);
2783 Ws = Op->getOperand(1);
2820 Wt = Op->getOperand(0);
2822 Wt = Op->getOperand(1);
2829 Ws = Op->getOperand(0);
2832 Ws = Op->getOperand(1);
2866 Wt = Op->getOperand(0);
2868 Wt = Op->getOperand(1);
2873 Ws = Op->getOperand(0);
2875 Ws = Op->getOperand(1);
2909 Wt = Op->getOperand(0);
2911 Wt = Op->getOperand(1);
2916 Ws = Op->getOperand(0);
2918 Ws = Op->getOperand(1);
2963 Op0 = Op->getOperand(0);
2964 Op1 = Op->getOperand(1);
2966 Op0 = Op1 = Op->getOperand(0);
2968 Op0 = Op1 = Op->getOperand(1);
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 507 unsigned IID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
593 getPTXCmpMode(*cast<CondCodeSDNode>(N->getOperand(2)), useF32FTZ());
596 NVPTX::SETP_f16x2rr, DL, MVT::i1, MVT::i1, N->getOperand(0),
597 N->getOperand(1), CurDAG->getTargetConstant(PTXCmpMode, DL, MVT::i32));
605 SDValue Vector = N->getOperand(0);
617 if (U->getOperand(0) != Vector)
620 dyn_cast<ConstantSDNode>(U->getOperand(1))) {
641 Source = Vector->getOperand(0);
719 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
731 SDValue Wrapper = N->getOperand(1);
738 SDValue Src = N->getOperand(0);
909 SDValue Chain = N->getOperand(0);
910 SDValue N1 = N->getOperand(1);
993 SDValue Chain = N->getOperand(0);
994 SDValue Op1 = N->getOperand(1);
1037 N->getOperand(N->getNumOperands() - 1))->getZExtValue();
1232 SDValue Chain = N->getOperand(0);
1240 Op1 = N->getOperand(2);
1242 unsigned IID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
1258 Op1 = N->getOperand(1);
1871 SDValue Chain = N->getOperand(0);
1872 SDValue Op1 = N->getOperand(1);
1917 StOps.push_back(N->getOperand(1));
1918 StOps.push_back(N->getOperand(2));
1919 N2 = N->getOperand(3);
1923 StOps.push_back(N->getOperand(1));
1924 StOps.push_back(N->getOperand(2));
1925 StOps.push_back(N->getOperand(3));
1926 StOps.push_back(N->getOperand(4));
1927 N2 = N->getOperand(5);
2095 SDValue Chain = Node->getOperand(0);
2096 SDValue Offset = Node->getOperand(2);
2097 SDValue Flag = Node->getOperand(3);
2173 SDValue Chain = N->getOperand(0);
2174 SDValue Offset = N->getOperand(1);
2197 Ops.push_back(N->getOperand(i + 2));
2243 SDValue Chain = N->getOperand(0);
2244 SDValue Param = N->getOperand(1);
2246 SDValue Offset = N->getOperand(2);
2249 SDValue Flag = N->getOperand(N->getNumOperands() - 1);
2272 Ops.push_back(N->getOperand(i + 3));
2858 Ops.push_back(N->getOperand(0)); // Move chain to the back.
3367 Ops.push_back(N->getOperand(0)); // Move chain to the back.
3378 SDValue LHS = N->getOperand(0);
3379 SDValue RHS = N->getOperand(1);
3413 Val = LHS.getNode()->getOperand(0);
3414 Start = LHS.getNode()->getOperand(1);
3451 SDValue AndLHS = LHS->getOperand(0);
3452 SDValue AndRHS = LHS->getOperand(1);
3502 Val = LHS->getOperand(0);
3504 SDValue ShlRHS = LHS->getOperand(1);
3597 CastN->getOperand(0).getOpcode() == NVPTXISD::MoveParam)
3598 return SelectDirectAddr(CastN->getOperand(0).getOperand(0), Address);
lib/Target/NVPTX/NVPTXISelLowering.cpp 1895 SDValue SubOp = Node->getOperand(i);
1921 isa<ConstantFPSDNode>(Op->getOperand(0)) &&
1922 isa<ConstantFPSDNode>(Op->getOperand(1))))
1926 cast<ConstantFPSDNode>(Op->getOperand(0))->getValueAPF().bitcastToAPInt();
1928 cast<ConstantFPSDNode>(Op->getOperand(1))->getValueAPF().bitcastToAPInt();
1936 SDValue Index = Op->getOperand(1);
1942 SDValue Vector = Op->getOperand(0);
2209 SDValue Op0 = Op->getOperand(0);
2210 SDValue Op1 = Op->getOperand(1);
2211 SDValue Op2 = Op->getOperand(2);
2289 SDValue Val = N->getOperand(1);
2368 Ops.push_back(N->getOperand(0));
4452 SDValue N0 = N->getOperand(0);
4453 SDValue N1 = N->getOperand(1);
4471 SDValue Val = N->getOperand(0);
4472 SDValue Mask = N->getOperand(1);
4482 Val = Val->getOperand(0);
4486 Val = Val->getOperand(0);
4516 cast<ConstantSDNode>(Val->getOperand(Val->getNumOperands()-1))->
4554 const SDValue &Num = N->getOperand(0);
4555 const SDValue &Den = N->getOperand(1);
4558 if (U->getOpcode() == DivOpc && U->getOperand(0) == Num &&
4559 U->getOperand(1) == Den) {
4651 SDValue LHS = N->getOperand(0);
4652 SDValue RHS = N->getOperand(1);
4737 SDValue A = N->getOperand(0);
4738 SDValue B = N->getOperand(1);
4750 {A, B, N->getOperand(2)});
4911 SDValue Chain = N->getOperand(0);
4912 SDValue Intrin = N->getOperand(1);
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 570 && isInt32Immediate(N->getOperand(1).getNode(), Imm);
598 !isInt32Immediate(N->getOperand(1).getNode(), Shift) || (Shift > 31))
715 SDValue Op0 = N->getOperand(0);
716 SDValue Op1 = N->getOperand(1);
2537 if (isLogicOp(N->getOperand(0).getOpcode()) &&
2538 N->getOperand(0).getValueType() == MVT::i1 &&
2540 WideRes = computeLogicOpInGPR(N->getOperand(0));
2541 else if (N->getOperand(0).getOpcode() != ISD::SETCC)
2545 getSETCCInGPR(N->getOperand(0),
4009 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
4015 isInt32Immediate(N->getOperand(1), Imm)) {
4020 SDValue Op = N->getOperand(0);
4055 SDValue Op = N->getOperand(0);
4098 SDValue LHS = N->getOperand(0);
4099 SDValue RHS = N->getOperand(1);
4171 AddrOp = LDN->getOperand(1);
4173 AddrOp = STN->getOperand(2);
4212 SDValue LHS = N->getOperand(0);
4213 SDValue RHS = N->getOperand(1);
4214 SDValue TrueRes = N->getOperand(2);
4215 SDValue FalseRes = N->getOperand(3);
4360 N->getOperand(1).getOpcode() == ISD::TargetConstant)
4404 SDValue Op = N->getOperand(1);
4426 SDValue InFlag = N->getOperand(1);
4428 N->getOperand(0), InFlag));
4434 MVT::Other, N->getOperand(0)));
4438 SDValue N0 = N->getOperand(0);
4440 CurDAG->getTargetConstant(*cast<ConstantSDNode>(N->getOperand(1))->
4574 if (isInt32Immediate(N->getOperand(1), Imm) &&
4575 isRotateAndMask(N->getOperand(0).getNode(), Imm, false, SH, MB, ME)) {
4576 SDValue Val = N->getOperand(0).getOperand(0);
4584 if (isInt32Immediate(N->getOperand(1), Imm) &&
4586 N->getOperand(0).getOpcode() != ISD::ROTL) {
4587 SDValue Val = N->getOperand(0);
4594 if (isInt64Immediate(N->getOperand(1).getNode(), Imm64) &&
4596 SDValue Val = N->getOperand(0);
4636 if (isInt64Immediate(N->getOperand(1).getNode(), Imm64) &&
4638 SDValue Val = N->getOperand(0);
4647 if (isInt32Immediate(N->getOperand(1), Imm) && (Imm == 0)) {
4648 ReplaceUses(SDValue(N, 0), N->getOperand(1));
4654 if (isInt32Immediate(N->getOperand(1), Imm) &&
4655 N->getOperand(0).getOpcode() == ISD::OR &&
4656 isInt32Immediate(N->getOperand(0).getOperand(1), Imm2)) {
4671 SDValue Ops[] = { N->getOperand(0).getOperand(0),
4672 N->getOperand(0).getOperand(1),
4689 if (N->getOperand(0)->getOpcode() == ISD::FrameIndex &&
4690 isIntS16Immediate(N->getOperand(1), Imm)) {
4691 KnownBits LHSKnown = CurDAG->computeKnownBits(N->getOperand(0));
4696 selectFrameIndex(N, N->getOperand(0).getNode(), (int)Imm);
4705 if (IsPPC64 && isInt64Immediate(N->getOperand(1), Imm64) &&
4712 N->getOperand(0),
4728 if (IsPPC64 && isInt64Immediate(N->getOperand(1), Imm64) &&
4735 N->getOperand(0),
4747 if (N->getOperand(0)->getOpcode() == ISD::FrameIndex &&
4748 isIntS16Immediate(N->getOperand(1), Imm)) {
4749 selectFrameIndex(N, N->getOperand(0).getNode(), (int)Imm);
4757 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, Imm) &&
4759 SDValue Ops[] = { N->getOperand(0).getOperand(0),
4771 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, Imm) &&
4773 SDValue Ops[] = { N->getOperand(0).getOperand(0),
4789 EVT InVT = N->getOperand(0).getValueType();
4795 N->getOperand(0),
4808 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get();
4815 N->getOperand(0).getValueType() == MVT::i1)
4822 SDValue LHS = N->getOperand(0);
4823 SDValue RHS = N->getOperand(1);
4845 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N->getOperand(1)))
4846 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N->getOperand(2)))
4847 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N->getOperand(3)))
4854 N->getOperand(0), getI32Imm(~0U, dl));
4856 N->getOperand(0), SDValue(Tmp, 1));
4860 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl);
4860 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl);
4884 C, N->getOperand(2)), 0);
4886 NotC, N->getOperand(3)), 0);
4929 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3),
4929 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3),
4939 SDValue Op1 = N->getOperand(SVN->getMaskElt(0) < 2 ? 0 : 1),
4940 Op2 = N->getOperand(SVN->getMaskElt(1) < 2 ? 0 : 1);
4989 SDValue Ops[] = { N->getOperand(1), N->getOperand(0) };
4989 SDValue Ops[] = { N->getOperand(1), N->getOperand(0) };
5003 unsigned PCC = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
5005 PCC |= getBranchHint(PCC, FuncInfo, N->getOperand(3));
5008 SDValue Ops[] = { Pred, N->getOperand(2), N->getOperand(3),
5008 SDValue Ops[] = { Pred, N->getOperand(2), N->getOperand(3),
5009 N->getOperand(0), N->getOperand(4) };
5009 N->getOperand(0), N->getOperand(4) };
5014 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
5017 if (N->getOperand(2).getValueType() == MVT::i1) {
5040 N->getOperand(Swap ? 3 : 2),
5041 N->getOperand(Swap ? 2 : 3)), 0);
5042 CurDAG->SelectNodeTo(N, PPC::BC, MVT::Other, BitComp, N->getOperand(4),
5043 N->getOperand(0));
5048 PCC |= getBranchHint(PCC, FuncInfo, N->getOperand(4));
5050 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl);
5050 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl);
5052 N->getOperand(4), N->getOperand(0) };
5052 N->getOperand(4), N->getOperand(0) };
5058 SDValue Chain = N->getOperand(0);
5059 SDValue Target = N->getOperand(1);
5091 SDValue GA = TocEntry->getOperand(0);
5092 SDValue TocBase = TocEntry->getOperand(1);
5130 SDValue GA = N->getOperand(0);
5131 SDValue TOCbase = N->getOperand(1);
5165 assert(isa<ConstantSDNode>(N->getOperand(0)) &&
5166 isa<ConstantSDNode>(N->getOperand(1)) &&
5471 if (N->getOperand(0).getValueType() != MVT::i1)
5479 SDValue Cond = N->getOperand(0);
5490 SDValue UserO0 = User->getOperand(0), UserO1 = User->getOperand(1);
5490 SDValue UserO0 = User->getOperand(0), UserO1 = User->getOperand(1);
5587 SDNode *Op2 = User->getOperand(2).getNode();
5595 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op2->getOperand(0));
5622 User->getValueType(0), User->getOperand(0),
5623 User->getOperand(2),
5624 User->getOperand(1));
5662 SDValue Op = MachineNode->getOperand(1);
5689 SDValue Op = MachineNode->getOperand(0);
5707 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5707 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5709 ResNode = MachineNode->getOperand(0).getNode();
5712 ResNode = MachineNode->getOperand(1).getNode();
5715 ResNode = MachineNode->getOperand(0).getNode();
5723 MVT::i1, MachineNode->getOperand(1),
5724 MachineNode->getOperand(0).
5729 MVT::i1, MachineNode->getOperand(0),
5730 MachineNode->getOperand(1).
5734 MVT::i1, MachineNode->getOperand(0),
5735 MachineNode->getOperand(1));
5740 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5740 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5743 MVT::i1, MachineNode->getOperand(0),
5744 MachineNode->getOperand(0));
5748 MVT::i1, MachineNode->getOperand(1),
5749 MachineNode->getOperand(1));
5753 MVT::i1, MachineNode->getOperand(0),
5754 MachineNode->getOperand(0));
5762 MVT::i1, MachineNode->getOperand(0).
5764 MachineNode->getOperand(1));
5768 MVT::i1, MachineNode->getOperand(1).
5770 MachineNode->getOperand(0));
5773 MVT::i1, MachineNode->getOperand(0),
5774 MachineNode->getOperand(1));
5779 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5779 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5781 ResNode = MachineNode->getOperand(0).getNode();
5788 ResNode = MachineNode->getOperand(1).getNode();
5791 ResNode = MachineNode->getOperand(0).getNode();
5795 MVT::i1, MachineNode->getOperand(1),
5796 MachineNode->getOperand(0).
5801 MVT::i1, MachineNode->getOperand(0),
5802 MachineNode->getOperand(1).
5806 MVT::i1, MachineNode->getOperand(0),
5807 MachineNode->getOperand(1));
5812 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5812 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5819 MVT::i1, MachineNode->getOperand(1),
5820 MachineNode->getOperand(1));
5824 MVT::i1, MachineNode->getOperand(0),
5825 MachineNode->getOperand(0));
5828 ResNode = MachineNode->getOperand(1).getNode();
5831 ResNode = MachineNode->getOperand(0).getNode();
5835 MVT::i1, MachineNode->getOperand(0).
5837 MachineNode->getOperand(1));
5841 MVT::i1, MachineNode->getOperand(0),
5842 MachineNode->getOperand(1).
5846 MVT::i1, MachineNode->getOperand(0),
5847 MachineNode->getOperand(1));
5859 MVT::i1, MachineNode->getOperand(1),
5860 MachineNode->getOperand(1));
5864 MVT::i1, MachineNode->getOperand(0),
5865 MachineNode->getOperand(0));
5869 MVT::i1, MachineNode->getOperand(0).
5871 MachineNode->getOperand(1));
5875 MVT::i1, MachineNode->getOperand(1).
5877 MachineNode->getOperand(0));
5880 MVT::i1, MachineNode->getOperand(0),
5881 MachineNode->getOperand(1));
5886 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5886 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5892 ResNode = MachineNode->getOperand(1).getNode();
5895 ResNode = MachineNode->getOperand(0).getNode();
5899 MVT::i1, MachineNode->getOperand(1),
5900 MachineNode->getOperand(1));
5904 MVT::i1, MachineNode->getOperand(0),
5905 MachineNode->getOperand(0));
5909 MVT::i1, MachineNode->getOperand(0).
5911 MachineNode->getOperand(1));
5915 MVT::i1, MachineNode->getOperand(0),
5916 MachineNode->getOperand(1).
5920 MVT::i1, MachineNode->getOperand(0),
5921 MachineNode->getOperand(1));
5926 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5926 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5933 MVT::i1, MachineNode->getOperand(1),
5934 MachineNode->getOperand(1));
5941 ResNode = MachineNode->getOperand(0).getNode();
5945 MVT::i1, MachineNode->getOperand(0).
5947 MachineNode->getOperand(1));
5951 MVT::i1, MachineNode->getOperand(0),
5952 MachineNode->getOperand(1).
5956 MVT::i1, MachineNode->getOperand(1),
5957 MachineNode->getOperand(0));
5962 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5962 if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
5972 ResNode = MachineNode->getOperand(0).getNode();
5976 MVT::i1, MachineNode->getOperand(1),
5977 MachineNode->getOperand(1));
5981 MVT::i1, MachineNode->getOperand(0).
5983 MachineNode->getOperand(1));
5987 MVT::i1, MachineNode->getOperand(0),
5988 MachineNode->getOperand(1).
5992 MVT::i1, MachineNode->getOperand(1),
5993 MachineNode->getOperand(0));
6011 ResNode = MachineNode->getOperand(1).getNode();
6013 ResNode = MachineNode->getOperand(2).getNode();
6018 MachineNode->getOperand(0).
6020 MachineNode->getOperand(2),
6021 MachineNode->getOperand(1));
6030 MachineNode->getOperand(0).
6032 MachineNode->getOperand(1),
6033 MachineNode->getOperand(2));
6233 SDValue ISR = N->getOperand(0);
6252 SDValue Op32 = ISR->getOperand(1);
6429 if (!isa<ConstantSDNode>(N->getOperand(FirstOp)))
6432 SDValue Base = N->getOperand(FirstOp + 1);
6570 (void)CurDAG->UpdateNodeOperands(N, N->getOperand(0), ImmOpnd,
6571 Base.getOperand(0), N->getOperand(3));
6574 N->getOperand(2));
lib/Target/PowerPC/PPCISelLowering.cpp 1910 if (N->getOperand(1).isUndef()) {
1950 if (N->getOperand(1).isUndef()) {
2048 if (N->getOperand(1).isUndef()) {
2119 if (N->getOperand(i).isUndef()) continue;
2121 if (!isa<ConstantSDNode>(N->getOperand(i))) return SDValue();
2124 UniquedVals[i&(Multiple-1)] = N->getOperand(i);
2125 else if (UniquedVals[i&(Multiple-1)] != N->getOperand(i))
2164 if (N->getOperand(i).isUndef()) continue;
2166 OpVal = N->getOperand(i);
2167 else if (OpVal != N->getOperand(i))
3033 SDValue InChain = Node->getOperand(0);
3034 SDValue VAListPtr = Node->getOperand(1);
3035 const Value *SV = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
5555 CallSeqStart.getNode()->getOperand(0),
5653 CallSeqStart.getNode()->getOperand(0),
7444 if (EnableQuadPrecision && (Op->getOperand(0).getValueType() == MVT::f128))
8198 SDValue Op0 = V->getOperand(0);
8206 if (V->getOperand(i).isUndef())
8210 if (V->getOperand(i).getOpcode() == ISD::LOAD ||
8211 (V->getOperand(i).getOpcode() == ISD::FP_ROUND &&
8212 V->getOperand(i).getOperand(0).getOpcode() == ISD::LOAD) ||
8213 (V->getOperand(i).getOpcode() == ISD::FP_TO_SINT &&
8214 V->getOperand(i).getOperand(0).getOpcode() == ISD::LOAD) ||
8215 (V->getOperand(i).getOpcode() == ISD::FP_TO_UINT &&
8216 V->getOperand(i).getOperand(0).getOpcode() == ISD::LOAD))
8220 if (V->getOperand(i) != Op0 ||
8221 (!IsLoad && !V->isOnlyUserOf(V->getOperand(i).getNode())))
8231 SDValue Op0 = Op->getOperand(0);
8283 if (BVN->getOperand(i).isUndef()) continue;
8284 if (!isa<ConstantSDNode>(BVN->getOperand(i))) {
8298 if (BVN->getOperand(i).isUndef())
8300 else if (isNullConstant(BVN->getOperand(i)))
8319 if (BVN->getOperand(i).isUndef()) continue;
8325 unsigned StoreSize = BVN->getOperand(i).getValueType().getStoreSize();
8328 DAG.getTruncStore(DAG.getEntryNode(), dl, BVN->getOperand(i), Idx,
8331 SDValue StoreValue = BVN->getOperand(i);
8671 SDValue V1 = N->getOperand(0);
8672 SDValue V2 = N->getOperand(1);
8777 SDValue V1 = N->getOperand(0);
8778 SDValue V2 = N->getOperand(1);
9546 if (UI->getOperand(0) == Op.getOperand(0) &&
9547 UI->getOperand(1) == Op.getOperand(1))
9597 Ops.push_back(AtomicNode->getOperand(i));
9656 assert(N->getOperand(0).getValueType() == MVT::v4i1 &&
9659 SDValue Value = N->getOperand(0);
9697 unsigned Offset = 4*cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
10053 isa<ConstantSDNode>(Op0->getOperand(1)) &&
10195 SDValue RTB = DAG.getNode(PPCISD::READ_TIME_BASE, dl, VTs, N->getOperand(0));
10203 if (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() !=
10212 SDValue NewInt = DAG.getNode(N->getOpcode(), dl, VTs, N->getOperand(0),
10213 N->getOperand(1));
10236 if (N->getOperand(0).getValueType() == MVT::ppcf128)
10242 EVT OpVT = N->getOperand(0).getValueType();
11772 switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) {
11813 return isConsecutiveLSLoc(N->getOperand(2), VT, Base, Bytes, Dist, DAG);
11818 switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) {
11863 return isConsecutiveLSLoc(N->getOperand(3), VT, Base, Bytes, Dist, DAG);
11947 auto Op0 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N->getOperand(0),
11949 auto Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N->getOperand(1),
11993 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
11994 auto OpSize = N->getOperand(0).getValueSizeInBits();
12034 if (N->getOperand(0).getValueType() != MVT::i32 &&
12035 N->getOperand(0).getValueType() != MVT::i64)
12043 cast<CondCodeSDNode>(N->getOperand(
12045 unsigned OpBits = N->getOperand(0).getValueSizeInBits();
12048 if (DAG.ComputeNumSignBits(N->getOperand(0)) != OpBits ||
12049 DAG.ComputeNumSignBits(N->getOperand(1)) != OpBits)
12052 if (!DAG.MaskedValueIsZero(N->getOperand(0),
12054 !DAG.MaskedValueIsZero(N->getOperand(1),
12061 KnownBits Op1Known = DAG.computeKnownBits(N->getOperand(0));
12062 KnownBits Op2Known = DAG.computeKnownBits(N->getOperand(1));
12077 if (N->getOperand(0).getOpcode() != ISD::AND &&
12078 N->getOperand(0).getOpcode() != ISD::OR &&
12079 N->getOperand(0).getOpcode() != ISD::XOR &&
12080 N->getOperand(0).getOpcode() != ISD::SELECT &&
12081 N->getOperand(0).getOpcode() != ISD::SELECT_CC &&
12082 N->getOperand(0).getOpcode() != ISD::TRUNCATE &&
12083 N->getOperand(0).getOpcode() != ISD::SIGN_EXTEND &&
12084 N->getOperand(0).getOpcode() != ISD::ZERO_EXTEND &&
12085 N->getOperand(0).getOpcode() != ISD::ANY_EXTEND)
12089 N->getOperand(1).getOpcode() != ISD::AND &&
12090 N->getOperand(1).getOpcode() != ISD::OR &&
12091 N->getOperand(1).getOpcode() != ISD::XOR &&
12092 N->getOperand(1).getOpcode() != ISD::SELECT &&
12093 N->getOperand(1).getOpcode() != ISD::SELECT_CC &&
12094 N->getOperand(1).getOpcode() != ISD::TRUNCATE &&
12095 N->getOperand(1).getOpcode() != ISD::SIGN_EXTEND &&
12096 N->getOperand(1).getOpcode() != ISD::ZERO_EXTEND &&
12097 N->getOperand(1).getOpcode() != ISD::ANY_EXTEND)
12105 if (((N->getOperand(i).getOpcode() == ISD::SIGN_EXTEND ||
12106 N->getOperand(i).getOpcode() == ISD::ZERO_EXTEND ||
12107 N->getOperand(i).getOpcode() == ISD::ANY_EXTEND) &&
12108 N->getOperand(i).getOperand(0).getValueType() == MVT::i1) ||
12109 isa<ConstantSDNode>(N->getOperand(i)))
12110 Inputs.push_back(N->getOperand(i));
12112 BinOps.push_back(N->getOperand(i));
12180 if (User->getOperand(0) == Inputs[i])
12183 if (User->getOperand(0) == Inputs[i] ||
12184 User->getOperand(1) == Inputs[i])
12204 if (User->getOperand(0) == PromOps[i])
12207 if (User->getOperand(0) == PromOps[i] ||
12208 User->getOperand(1) == PromOps[i])
12289 return N->getOperand(0);
12319 if (!((N->getOperand(0).getValueType() == MVT::i1 && Subtarget.useCRBits()) ||
12320 (N->getOperand(0).getValueType() == MVT::i32 && Subtarget.isPPC64())))
12323 if (N->getOperand(0).getOpcode() != ISD::AND &&
12324 N->getOperand(0).getOpcode() != ISD::OR &&
12325 N->getOperand(0).getOpcode() != ISD::XOR &&
12326 N->getOperand(0).getOpcode() != ISD::SELECT &&
12327 N->getOperand(0).getOpcode() != ISD::SELECT_CC)
12331 SmallVector<SDValue, 8> BinOps(1, N->getOperand(0)), PromOps;
12390 if (User->getOperand(0) == Inputs[i])
12392 User->getOperand(0).getValueType()));
12394 if (User->getOperand(0) == Inputs[i])
12396 User->getOperand(0).getValueType()));
12397 if (User->getOperand(1) == Inputs[i])
12399 User->getOperand(1).getValueType()));
12415 if (User->getOperand(0) == PromOps[i])
12417 User->getOperand(0).getValueType()));
12419 if (User->getOperand(0) == PromOps[i])
12421 User->getOperand(0).getValueType()));
12422 if (User->getOperand(1) == PromOps[i])
12424 User->getOperand(1).getValueType()));
12429 unsigned PromBits = N->getOperand(0).getValueSizeInBits();
12558 return N->getOperand(0);
12563 return DAG.getNode(ISD::AND, dl, N->getValueType(0), N->getOperand(0),
12575 DAG.getNode(ISD::SHL, dl, N->getValueType(0), N->getOperand(0), ShiftCst),
12584 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
12586 SDValue LHS = N->getOperand(0);
12587 SDValue RHS = N->getOperand(1);
12634 SDValue FirstInput = N->getOperand(0);
12652 SDValue NextOp = N->getOperand(i);
12664 if (N->getOperand(i) != FirstInput)
12676 SDValue In = N->getOperand(i).getOperand(0);
12725 SDValue FirstInput = N->getOperand(0);
12740 if (IsRoundOfExtLoad && N->getOperand(i).getOpcode() != ISD::FP_ROUND)
12743 SDValue NextInput = IsRoundOfExtLoad ? N->getOperand(i).getOperand(0) :
12744 N->getOperand(i);
12749 IsRoundOfExtLoad ? N->getOperand(i-1).getOperand(0) : N->getOperand(i-1);
12749 IsRoundOfExtLoad ? N->getOperand(i-1).getOperand(0) : N->getOperand(i-1);
12773 IsRoundOfExtLoad ? N->getOperand(N->getNumOperands()-1).getOperand(0) :
12774 N->getOperand(N->getNumOperands()-1);
12895 if (!isSExtOfVecExtract(N->getOperand(i))) {
12944 SDValue FirstInput = N->getOperand(0);
12976 if (N->getOperand(1).getOpcode() != ISD::SINT_TO_FP &&
12977 N->getOperand(1).getOpcode() != ISD::UINT_TO_FP)
12979 if (FirstInput.getOpcode() != N->getOperand(1).getOpcode())
12983 SDValue Ext2 = N->getOperand(1).getOperand(0);
13007 auto NodeType = (N->getOperand(1).getOpcode() == ISD::SINT_TO_FP) ?
13147 Base = Intrin->getOperand(2);
13216 Base = Intrin->getOperand(3);
13223 SDValue Src = N->getOperand(SrcOpnd);
13257 unsigned Opcode = N->getOperand(1).getOpcode();
13262 SDValue Val = N->getOperand(1).getOperand(0);
13263 EVT Op1VT = N->getOperand(1).getValueType();
13296 SDValue Ops[] = { N->getOperand(0), Val, N->getOperand(2),
13296 SDValue Ops[] = { N->getOperand(0), Val, N->getOperand(2),
13354 SDValue StoreOps[] = {LSBase->getChain(), SVN->getOperand(0),
13381 if (isNullConstant(N->getOperand(0))) // 0 << V -> 0.
13382 return N->getOperand(0);
13385 if (isNullConstant(N->getOperand(0))) // 0 >>u V -> 0.
13386 return N->getOperand(0);
13389 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(0))) {
13392 return N->getOperand(0);
13411 if (ISD::isNormalLoad(N->getOperand(0).getNode())) {
13412 LSBaseSDNode* LSBase = cast<LSBaseSDNode>(N->getOperand(0));
13418 EVT Op1VT = N->getOperand(1).getValueType();
13419 unsigned Opcode = N->getOperand(1).getOpcode();
13428 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N->getOperand(1));
13436 N->getOperand(1).getNode()->hasOneUse() &&
13446 SDValue BSwapOp = N->getOperand(1).getOperand(0);
13463 N->getOperand(0), BSwapOp, N->getOperand(2), DAG.getValueType(mVT)
13463 N->getOperand(0), BSwapOp, N->getOperand(2), DAG.getValueType(mVT)
13474 isa<ConstantSDNode>(N->getOperand(1)) && Op1VT == MVT::i32) {
13484 DAG.UpdateNodeOperands(N, N->getOperand(0), Const64, N->getOperand(2),
13484 DAG.UpdateNodeOperands(N, N->getOperand(0), Const64, N->getOperand(2),
13485 N->getOperand(3));
13554 !isa<ConstantSDNode>(RightShift->getOperand(1)) ||
13768 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
13774 N->getOperand(1)->getOpcode() == ISD::ADD) {
13775 SDValue Add = N->getOperand(1);
13780 if (DAG.MaskedValueIsZero(Add->getOperand(1),
13783 SDNode *BasePtr = Add->getOperand(0).getNode();
13788 cast<ConstantSDNode>(UI->getOperand(0))->getZExtValue() == IID) {
13798 if (isa<ConstantSDNode>(Add->getOperand(1))) {
13799 SDNode *BasePtr = Add->getOperand(0).getNode();
13803 isa<ConstantSDNode>(UI->getOperand(1)) &&
13804 (cast<ConstantSDNode>(Add->getOperand(1))->getZExtValue() -
13805 cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) %
13811 cast<ConstantSDNode>(VI->getOperand(0))->getZExtValue() == IID) {
13826 SDValue V1 = N->getOperand(1);
13827 SDValue V2 = N->getOperand(2);
13859 switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) {
13872 switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) {
13883 if (ISD::isNON_EXTLoad(N->getOperand(0).getNode()) &&
13884 N->getOperand(0).hasOneUse() &&
13888 SDValue Load = N->getOperand(0);
13924 if (!N->getOperand(0).hasOneUse() &&
13925 !N->getOperand(1).hasOneUse() &&
13926 !N->getOperand(2).hasOneUse()) {
13931 SDNode *LHSN = N->getOperand(0).getNode();
13935 UI->getOperand(1) == N->getOperand(1) &&
13935 UI->getOperand(1) == N->getOperand(1) &&
13936 UI->getOperand(2) == N->getOperand(2) &&
13936 UI->getOperand(2) == N->getOperand(2) &&
13937 UI->getOperand(0) == N->getOperand(0)) {
13937 UI->getOperand(0) == N->getOperand(0)) {
13956 if (User->getOperand(i) == SDValue(VCMPoNode, 1)) {
13970 SDValue Cond = N->getOperand(1);
13971 SDValue Target = N->getOperand(2);
13984 N->getOperand(0), Target);
13993 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
13994 SDValue LHS = N->getOperand(2), RHS = N->getOperand(3);
13994 SDValue LHS = N->getOperand(2), RHS = N->getOperand(3);
14024 N->getOperand(0), N->getOperand(4));
14024 N->getOperand(0), N->getOperand(4));
14040 return N->getOperand(0);
14043 N->getOperand(0), N->getOperand(4));
14043 N->getOperand(0), N->getOperand(4));
14075 return DAG.getNode(PPCISD::COND_BRANCH, dl, MVT::Other, N->getOperand(0),
14078 N->getOperand(4), CompNode.getValue(1));
14106 SDValue N0 = N->getOperand(0);
15102 SDValue N0 = N->getOperand(0);
15103 SDValue N1 = N->getOperand(1);
15125 if (ConstantSDNode *Mask = isConstOrConstSplat(N1->getOperand(1)))
15127 return DAG.getNode(TargetOpcode, SDLoc(N), VT, N0, N1->getOperand(0));
15136 SDValue N0 = N->getOperand(0);
15137 ConstantSDNode *CN1 = dyn_cast<ConstantSDNode>(N->getOperand(1));
15158 return DCI.DAG.getNode(PPCISD::EXTSWSLI, DL, MVT::i64, N0->getOperand(0),
15185 SDValue LHS = N->getOperand(0);
15186 SDValue RHS = N->getOperand(1);
15289 SDValue Op0 = N->getOperand(0);
15325 ConstantSDNode *ConstOpOrElement = isConstOrConstSplat(N->getOperand(1));
15373 SDValue Op0 = N->getOperand(0);
15375 DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
15390 SDValue Op0 = N->getOperand(0);
15392 DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
15481 if (N->getOperand(0).getOpcode() == ISD::SUB) {
15484 unsigned SubOpcd0 = N->getOperand(0)->getOperand(0).getOpcode();
15484 unsigned SubOpcd0 = N->getOperand(0)->getOperand(0).getOpcode();
15485 unsigned SubOpcd1 = N->getOperand(0)->getOperand(1).getOpcode();
15485 unsigned SubOpcd1 = N->getOperand(0)->getOperand(1).getOpcode();
15490 return DAG.getNode(PPCISD::VABSD, dl, N->getOperand(0).getValueType(),
15491 N->getOperand(0)->getOperand(0),
15491 N->getOperand(0)->getOperand(0),
15492 N->getOperand(0)->getOperand(1),
15492 N->getOperand(0)->getOperand(1),
15497 if (N->getOperand(0).getValueType() == MVT::v4i32 &&
15498 N->getOperand(0).hasOneUse()) {
15499 return DAG.getNode(PPCISD::VABSD, dl, N->getOperand(0).getValueType(),
15500 N->getOperand(0)->getOperand(0),
15500 N->getOperand(0)->getOperand(0),
15501 N->getOperand(0)->getOperand(1),
15501 N->getOperand(0)->getOperand(1),
15522 SDValue Cond = N->getOperand(0);
15523 SDValue TrueOpnd = N->getOperand(1);
15524 SDValue FalseOpnd = N->getOperand(2);
15525 EVT VT = N->getOperand(1).getValueType();
15564 return DAG.getNode(PPCISD::VABSD, dl, N->getOperand(1).getValueType(),
lib/Target/RISCV/RISCVISelDAGToDAG.cpp 91 Node->getOperand(1).getOpcode() == ISD::Constant) {
92 Mask = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
139 SDValue Op0 = Node->getOperand(0);
140 SDValue Op1 = Node->getOperand(1);
165 Node->getOperand(0)));
245 if (!isa<ConstantSDNode>(N->getOperand(OffsetOpIdx)) ||
249 SDValue Base = N->getOperand(BaseOpIdx);
277 N->getOperand(2));
279 CurDAG->UpdateNodeOperands(N, N->getOperand(0), Base.getOperand(0),
280 ImmOperand, N->getOperand(3));
lib/Target/RISCV/RISCVISelLowering.cpp 841 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(0));
842 SDValue NewOp1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1));
852 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(0));
853 SDValue NewOp1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1));
873 DAG.getNode(RISCVISD::READ_CYCLE_WIDE, DL, VTs, N->getOperand(0));
885 if (N->getOperand(1).getOpcode() == ISD::Constant)
894 if (N->getOperand(1).getOpcode() == ISD::Constant)
903 if (N->getOperand(0).getOpcode() == ISD::Constant ||
904 N->getOperand(1).getOpcode() == ISD::Constant)
912 SDValue Op0 = N->getOperand(0);
931 SDValue Op0 = N->getOperand(0);
976 SDValue LHS = N->getOperand(0);
977 SDValue RHS = N->getOperand(1);
980 if ((SimplifyDemandedBits(N->getOperand(0), LHSMask, DCI)) ||
981 (SimplifyDemandedBits(N->getOperand(1), RHSMask, DCI)))
987 SDValue Op0 = N->getOperand(0);
1029 SDValue N0 = N->getOperand(0);
1033 auto *C1 = dyn_cast<ConstantSDNode>(N0->getOperand(1));
1034 auto *C2 = dyn_cast<ConstantSDNode>(N->getOperand(1));
lib/Target/Sparc/SparcISelDAGToDAG.cpp 171 SDValue Glue = N->getGluedNode() ? N->getOperand(NumOps-1)
177 SDValue op = N->getOperand(i);
183 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(i))) {
195 SDValue op = N->getOperand(++i);
222 SDValue V0 = N->getOperand(i+1);
223 SDValue V1 = N->getOperand(i+2);
347 SDValue DivLHS = N->getOperand(0);
348 SDValue DivRHS = N->getOperand(1);
lib/Target/Sparc/SparcISelLowering.cpp 2523 SDValue InChain = Node->getOperand(0);
2524 SDValue VAListPtr = Node->getOperand(1);
2526 const Value *SV = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
3078 SDValue Src = N->getOperand(0);
3349 if (N->getOperand(0).getValueType() != MVT::f128
3363 SDValue Lo = DAG.getCopyFromReg(N->getOperand(0), dl, SP::ASR23, MVT::i32);
3368 Results.push_back(N->getOperand(0));
3375 || N->getOperand(0).getValueType() != MVT::i64)
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp 1059 RxSBGOperands(Opcode, N->getOperand(0)),
1060 RxSBGOperands(Opcode, N->getOperand(1))
1078 SDValue Op0 = N->getOperand(I ^ 1);
1173 SDValue ElemV = N->getOperand(2);
1183 auto *Load = dyn_cast<LoadSDNode>(N->getOperand(1));
1197 N->getOperand(0), Base, Disp, Index,
1256 SDValue Load = StoredVal->getOperand(0);
1331 SDValue StoredVal = StoreNode->getOperand(1);
1470 if (Node->getOperand(1).getOpcode() != ISD::Constant)
1476 if (Node->getOperand(1).getOpcode() != ISD::Constant)
1485 Node->getOperand(0).getOpcode() != ISD::Constant)
1486 if (auto *Op1 = dyn_cast<ConstantSDNode>(Node->getOperand(1))) {
1491 unsigned ChildOpcode = Node->getOperand(0).getOpcode();
1499 auto Op0 = Node->getOperand(0);
1500 if (auto *Op0Op1 = dyn_cast<ConstantSDNode>(Op0->getOperand(1)))
1506 splitLargeImmediate(Opcode, Node, Node->getOperand(0),
1514 if (Node->getOperand(1).getOpcode() != ISD::Constant)
1540 SDValue Op0 = Node->getOperand(0);
1541 SDValue Op1 = Node->getOperand(1);
1551 SDValue CCValid = Node->getOperand(2);
1552 SDValue CCMask = Node->getOperand(3);
1560 SDValue Op4 = Node->getOperand(4);
1715 cast<RegisterSDNode>(CCUser->getOperand(1))->getReg() == SystemZ::CC) {
1730 return !N->isPredecessorOf(CCUser->getOperand(0).getNode());
1824 auto *TrueOp = dyn_cast<ConstantSDNode>(Node->getOperand(0));
1825 auto *FalseOp = dyn_cast<ConstantSDNode>(Node->getOperand(1));
1833 auto *CCValidOp = dyn_cast<ConstantSDNode>(Node->getOperand(2));
1834 auto *CCMaskOp = dyn_cast<ConstantSDNode>(Node->getOperand(3));
1841 SDValue CCReg = Node->getOperand(4);
lib/Target/SystemZ/SystemZISelLowering.cpp 2149 ((N->getOperand(0) == C.Op0 && N->getOperand(1) == C.Op1) ||
2149 ((N->getOperand(0) == C.Op0 && N->getOperand(1) == C.Op1) ||
2150 (N->getOperand(0) == C.Op1 && N->getOperand(1) == C.Op0))) {
2150 (N->getOperand(0) == C.Op1 && N->getOperand(1) == C.Op0))) {
2196 cast<VTSDNode>(N->getOperand(1))->getVT() == MVT::i32) {
3439 SDValue LHS = N->getOperand(0);
3440 SDValue RHS = N->getOperand(1);
3503 SDValue LHS = N->getOperand(0);
3504 SDValue RHS = N->getOperand(1);
3779 SDValue ChainIn = Node->getOperand(0);
3780 SDValue Addr = Node->getOperand(1);
3781 SDValue CmpVal = Node->getOperand(2);
3782 SDValue SwapVal = Node->getOperand(3);
4533 SDValue Op = BVN->getOperand(I);
4547 ResidueOps.push_back(BVN->getOperand(I));
4906 SDValue VSNOp0 = VSN->getOperand(0);
5074 SDValue Ops[] = { N->getOperand(0), N->getOperand(1) };
5074 SDValue Ops[] = { N->getOperand(0), N->getOperand(1) };
5085 SDValue Ops[] = { N->getOperand(0),
5086 lowerI128ToGR128(DAG, N->getOperand(2)),
5087 N->getOperand(1) };
5103 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
5103 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
5104 lowerI128ToGR128(DAG, N->getOperand(2)),
5105 lowerI128ToGR128(DAG, N->getOperand(3)) };
5411 SDValue N0 = N->getOperand(0);
5440 SDValue N0 = N->getOperand(0);
5442 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
5461 SDValue N0 = N->getOperand(0);
5489 SDValue Op0 = N->getOperand(0);
5490 SDValue Op1 = N->getOperand(1);
5496 if (Op1 == N->getOperand(0))
5588 auto &Op1 = N->getOperand(1);
5617 N->getOperand(0), BSwapOp, N->getOperand(2)
5617 N->getOperand(0), BSwapOp, N->getOperand(2)
5633 N->getOperand(0), Op1.getOperand(0), N->getOperand(2)
5633 N->getOperand(0), Op1.getOperand(0), N->getOperand(2)
5649 if (ISD::isNON_EXTLoad(N->getOperand(0).getNode()) &&
5650 N->getOperand(0).hasOneUse() &&
5655 SDValue Load = N->getOperand(0);
5692 SDValue Op = N->getOperand(0);
5705 Op.getOperand(0), N->getOperand(1));
5716 if (auto *IndexN = dyn_cast<ConstantSDNode>(N->getOperand(1))) {
5717 SDValue Op0 = N->getOperand(0);
5729 if (N->getOperand(0) == N->getOperand(1))
5729 if (N->getOperand(0) == N->getOperand(1))
5731 N->getOperand(0));
5748 SDValue Op0 = N->getOperand(0);
5760 U->getOperand(0) == Vec &&
5761 U->getOperand(1).getOpcode() == ISD::Constant &&
5762 cast<ConstantSDNode>(U->getOperand(1))->getZExtValue() == 1) {
5799 SDValue Op0 = N->getOperand(0);
5811 U->getOperand(0) == Vec &&
5812 U->getOperand(1).getOpcode() == ISD::Constant &&
5813 cast<ConstantSDNode>(U->getOperand(1))->getZExtValue() == 2) {
5841 if (ISD::isNON_EXTLoad(N->getOperand(0).getNode()) &&
5842 N->getOperand(0).hasOneUse() &&
5844 SDValue Load = N->getOperand(0);
5878 SDValue Op = N->getOperand(0);
5960 auto *CompareLHS = ICmp->getOperand(0).getNode();
5961 auto *CompareRHS = dyn_cast<ConstantSDNode>(ICmp->getOperand(1));
5975 auto *TrueVal = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(0));
5978 auto *FalseVal = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(1));
5987 auto *NewCCValid = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(2));
5988 auto *NewCCMask = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(3));
5997 CCReg = CompareLHS->getOperand(4);
6003 auto *SRACount = dyn_cast<ConstantSDNode>(CompareLHS->getOperand(1));
6006 auto *SHL = CompareLHS->getOperand(0).getNode();
6009 auto *SHLCount = dyn_cast<ConstantSDNode>(SHL->getOperand(1));
6012 auto *IPM = SHL->getOperand(0).getNode();
6035 CCReg = IPM->getOperand(0);
6047 auto *CCValid = dyn_cast<ConstantSDNode>(N->getOperand(1));
6048 auto *CCMask = dyn_cast<ConstantSDNode>(N->getOperand(2));
6054 SDValue Chain = N->getOperand(0);
6055 SDValue CCReg = N->getOperand(4);
6062 N->getOperand(3), CCReg);
6071 auto *CCValid = dyn_cast<ConstantSDNode>(N->getOperand(2));
6072 auto *CCMask = dyn_cast<ConstantSDNode>(N->getOperand(3));
6078 SDValue CCReg = N->getOperand(4);
6082 N->getOperand(0), N->getOperand(1),
6082 N->getOperand(0), N->getOperand(1),
6094 auto *CCValid = dyn_cast<ConstantSDNode>(N->getOperand(1));
6095 auto *CCMask = dyn_cast<ConstantSDNode>(N->getOperand(2));
6101 SDValue Select = N->getOperand(0);
6105 auto *SelectCCValid = dyn_cast<ConstantSDNode>(Select->getOperand(2));
6106 auto *SelectCCMask = dyn_cast<ConstantSDNode>(Select->getOperand(3));
6112 auto *TrueVal = dyn_cast<ConstantSDNode>(Select->getOperand(0));
6113 auto *FalseVal = dyn_cast<ConstantSDNode>(Select->getOperand(1));
6128 return Select->getOperand(4);
6143 DAG.isConstantIntBuildVectorOrConstantInt(N->getOperand(1)))
6150 return N->getOperand(0);
lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp 96 cast<ConstantSDNode>(Node->getOperand(2).getNode())->getZExtValue();
106 Node->getOperand(0) // inchain
117 Node->getOperand(0) // inchain
169 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
195 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
204 Node->getOperand(0));
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 555 MVT MemT = cast<LoadSDNode>(ExtVal->getOperand(0))->getSimpleValueType(0);
1321 const SDValue &SwizzleSrc = Lane->getOperand(0);
1322 const SDValue &IndexExt = Lane->getOperand(1);
1325 const SDValue &Index = IndexExt->getOperand(0);
1328 const SDValue &SwizzleIndices = Index->getOperand(0);
1331 Index->getOperand(1)->getOpcode() != ISD::Constant ||
1365 const SDValue &Lane = Op->getOperand(I);
1439 const SDValue &Lane = Op->getOperand(I);
lib/Target/X86/X86ISelDAGToDAG.cpp 356 User->getOperand(1).getNode() == N) {
385 SDValue OtherOp = User->getOperand(0);
387 OtherOp = User->getOperand(1);
393 OtherOp->getOperand(1).getNode())))
426 MVT VecVT = N->getOperand(0).getSimpleValueType();
442 const APInt &Val = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
447 APInt Mask = Val | CurDAG->computeKnownBits(N->getOperand(0)).Zero;
544 EVT OpVT = N->getOperand(0).getValueType();
565 return isLegalMaskCompare(N->getOperand(0).getNode(), Subtarget) ||
566 isLegalMaskCompare(N->getOperand(1).getNode(), Subtarget);
601 SDValue Op1 = U->getOperand(1);
664 if (U->getOperand(0).getOpcode() == ISD::SHL &&
665 isOneConstant(U->getOperand(0).getOperand(0)))
668 if (U->getOperand(1).getOpcode() == ISD::SHL &&
669 isOneConstant(U->getOperand(1).getOperand(0)))
673 SDValue U0 = U->getOperand(0);
674 SDValue U1 = U->getOperand(1);
697 if (isa<ConstantSDNode>(U->getOperand(1)))
707 isNullConstant(Root->getOperand(2)) &&
708 (Root->getOperand(0).isUndef() ||
709 ISD::isBuildVectorAllZeros(Root->getOperand(0).getNode())))
798 N->getOperand(0), N->getOperand(1));
798 N->getOperand(0), N->getOperand(1));
821 N->getOperand(0));
844 N->getOperand(0), N->getOperand(1));
844 N->getOperand(0), N->getOperand(1));
856 N->getOperand(0).getScalarValueSizeInBits() == 1)
864 N->getOperand(0));
889 X86ISD::VRNDSCALE, dl, N->getValueType(0), N->getOperand(0),
910 N->getOperand(0));
912 N->getOperand(1));
970 SDValue Chain = N->getOperand(0);
971 SDValue Load = N->getOperand(1);
992 MVT SrcVT = N->getOperand(0).getSimpleValueType();
1031 SDValue Store = CurDAG->getTruncStore(CurDAG->getEntryNode(), dl, N->getOperand(0),
1050 MVT SrcVT = N->getOperand(1).getSimpleValueType();
1090 SDValue Store = CurDAG->getTruncStore(N->getOperand(0), dl, N->getOperand(1),
1090 SDValue Store = CurDAG->getTruncStore(N->getOperand(0), dl, N->getOperand(1),
1125 SDValue N0 = N->getOperand(0);
1178 N->getOperand(0) == N->getOperand(1) &&
1178 N->getOperand(0) == N->getOperand(1) &&
1179 N->isOnlyUserOf(N->getOperand(0).getNode()) &&
1180 N->getOperand(0).isMachineOpcode()) {
1181 SDValue And = N->getOperand(0);
1225 N->getOperand(0) == N->getOperand(1) &&
1225 N->getOperand(0) == N->getOperand(1) &&
1226 N->isOnlyUserOf(N->getOperand(0).getNode()) &&
1227 N->getOperand(0).isMachineOpcode() &&
1229 SDValue And = N->getOperand(0);
1262 SDValue Move = N->getOperand(1);
1302 CurDAG->UpdateNodeOperands(N, N->getOperand(0), In, N->getOperand(2));
1302 CurDAG->UpdateNodeOperands(N, N->getOperand(0), In, N->getOperand(2));
1373 SDValue Address = N->getOperand(1);
1617 int64_t Mask = cast<ConstantSDNode>(N->getOperand(1))->getSExtValue();
2624 N = N->getOperand(0).getNode();
2628 auto *GA = dyn_cast<GlobalAddressSDNode>(N->getOperand(0));
2668 cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)
2704 cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)
2763 if (cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)
2822 SDValue Load = StoredVal->getOperand(LoadOpNo);
2941 SDValue StoredVal = StoreNode->getOperand(1);
3118 SDValue Operand = StoredVal->getOperand(1-LoadOpNo);
3231 if (!isAllOnesConstant(Mask->getOperand(1)))
3234 SDValue M0 = peekThroughOneUseTruncation(Mask->getOperand(0));
3237 if (!isOneConstant(M0->getOperand(0)))
3239 NBits = M0->getOperand(1);
3257 if (!isAllOnes(Mask->getOperand(1)))
3260 SDValue M0 = peekThroughOneUseTruncation(Mask->getOperand(0));
3264 if (!isAllOnes(M0->getOperand(0)))
3266 NBits = M0->getOperand(1);
3316 SDValue N0 = Node->getOperand(0);
3320 SDValue N1 = Node->getOperand(1);
3321 SDValue N01 = N0->getOperand(1);
3328 X = N0->getOperand(0);
3338 X = Node->getOperand(0);
3339 SDValue Mask = Node->getOperand(1);
3455 SDValue N0 = Node->getOperand(0);
3456 SDValue N1 = Node->getOperand(1);
3483 ConstantSDNode *ShiftCst = dyn_cast<ConstantSDNode>(N0->getOperand(1));
3544 SDValue Input = N0->getOperand(0);
3574 SDValue N0 = Node->getOperand(0);
3575 SDValue N1 = Node->getOperand(1);
3576 SDValue Imm = Node->getOperand(2);
3607 SDValue N0 = Node->getOperand(0);
3608 SDValue N2 = Node->getOperand(2);
3609 SDValue Imm = Node->getOperand(4);
3645 SDValue OrigShiftAmt = N->getOperand(1);
3651 ShiftAmt = ShiftAmt->getOperand(0);
3658 SDValue Add0 = ShiftAmt->getOperand(0);
3659 SDValue Add1 = ShiftAmt->getOperand(1);
3702 SDNode *UpdatedNode = CurDAG->UpdateNodeOperands(N, N->getOperand(0),
3729 SDValue Shift = N->getOperand(0);
3730 SDValue N1 = N->getOperand(1);
3813 if (CurDAG->MaskedValueIsZero(N->getOperand(0), NeededMask))
3848 SDValue X = Node->getOperand(0);
3849 SDValue OneVec = Node->getOperand(1);
3895 auto *And1C = dyn_cast<ConstantSDNode>(And->getOperand(1));
3915 SDValue And0 = And->getOperand(0);
4315 SDValue N0 = N->getOperand(0);
4316 SDValue N1 = N->getOperand(1);
4369 bool Use64BitPtr = Node->getOperand(2).getValueType() == MVT::i64;
4393 SDValue Chain = CurDAG->getCopyToReg(Node->getOperand(0), dl, PtrReg,
4394 Node->getOperand(2), SDValue());
4400 Chain = CurDAG->getCopyToReg(Chain, dl, X86::ECX, Node->getOperand(3),
4403 Chain = CurDAG->getCopyToReg(Chain, dl, X86::EDX, Node->getOperand(4),
4427 const SDValue &Target = Node->getOperand(1);
4431 Node->getOperand(0), ZextTarget);
4447 ReplaceUses(SDValue(Node, 0), Node->getOperand(0));
4455 if (Node->getOperand(0).getValueType().getVectorElementType() == MVT::i1)
4460 X86ISD::BLENDV, SDLoc(Node), Node->getValueType(0), Node->getOperand(0),
4461 Node->getOperand(1), Node->getOperand(2));
4461 Node->getOperand(1), Node->getOperand(2));
4481 SDValue N0 = Node->getOperand(0);
4482 SDValue N1 = Node->getOperand(1);
4530 SDValue N0 = Node->getOperand(0);
4531 SDValue N1 = Node->getOperand(1);
4627 SDValue N0 = Node->getOperand(0);
4628 SDValue N1 = Node->getOperand(1);
4705 SDValue N0 = Node->getOperand(0);
4706 SDValue N1 = Node->getOperand(1);
4796 SDValue N0 = Node->getOperand(0);
4797 SDValue N1 = Node->getOperand(1);
4972 SDValue N0 = Node->getOperand(0);
4973 SDValue N1 = Node->getOperand(1);
5152 Node->getOperand(1),
5155 Node->getOperand(3), InFlag).getValue(1);
5215 Node->getOperand(0),
lib/Target/X86/X86ISelLowering.cpp 2678 if (Copy->getOperand(Copy->getNumOperands()-1).getValueType() == MVT::Glue)
2680 TCChain = Copy->getOperand(0);
2694 UI->getOperand(UI->getNumOperands()-1).getValueType() != MVT::Glue)
5116 N->getOperand(0).getOpcode() == ISD::SRL) ||
5118 N->getOperand(0).getOpcode() == ISD::SHL)) &&
5126 return N->getOperand(1) == N->getOperand(0).getOperand(1);
5126 return N->getOperand(1) == N->getOperand(0).getOperand(1);
5579 isa<ConstantSDNode>(N->getOperand(2))) {
5580 SDValue Src = N->getOperand(0);
5581 SDValue Sub = N->getOperand(1);
5933 Ptr = Ptr->getOperand(0);
6148 Ptr = Ptr->getOperand(0);
6430 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6431 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6432 ImmN = N->getOperand(N->getNumOperands() - 1);
6434 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6434 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6437 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6438 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6439 ImmN = N->getOperand(N->getNumOperands() - 1);
6442 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6442 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6445 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6446 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6447 ImmN = N->getOperand(N->getNumOperands() - 1);
6449 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6449 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6452 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6453 if (isa<ConstantSDNode>(N->getOperand(1)) &&
6454 isa<ConstantSDNode>(N->getOperand(2))) {
6462 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6463 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6464 if (isa<ConstantSDNode>(N->getOperand(2)) &&
6465 isa<ConstantSDNode>(N->getOperand(3))) {
6469 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6469 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6473 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6474 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6476 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6476 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6479 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6480 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6482 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6482 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6485 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6486 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6488 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6488 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6491 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6492 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6494 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6494 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6498 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6499 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6500 ImmN = N->getOperand(N->getNumOperands() - 1);
6503 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6503 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6504 Ops.push_back(N->getOperand(1));
6505 Ops.push_back(N->getOperand(0));
6509 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6510 ImmN = N->getOperand(N->getNumOperands() - 1);
6517 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6518 ImmN = N->getOperand(N->getNumOperands() - 1);
6525 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6526 ImmN = N->getOperand(N->getNumOperands() - 1);
6532 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6533 ImmN = N->getOperand(N->getNumOperands() - 1);
6539 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6540 ImmN = N->getOperand(N->getNumOperands() - 1);
6546 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6551 SDValue N0 = N->getOperand(0);
6570 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6572 SDValue MaskNode = N->getOperand(1);
6582 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6583 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6585 SDValue MaskNode = N->getOperand(1);
6593 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6594 ImmN = N->getOperand(N->getNumOperands() - 1);
6600 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6601 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6605 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6606 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6607 ImmN = N->getOperand(N->getNumOperands() - 1);
6610 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6610 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6613 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6614 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6615 ImmN = N->getOperand(N->getNumOperands() - 1);
6618 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6618 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6621 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6626 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6631 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6636 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6637 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6638 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6638 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6639 SDValue MaskNode = N->getOperand(2);
6640 SDValue CtrlNode = N->getOperand(3);
6653 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6654 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6655 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6655 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1);
6656 SDValue MaskNode = N->getOperand(2);
6664 assert(N->getOperand(1).getValueType() == VT && "Unexpected value type");
6667 Ops.push_back(N->getOperand(1));
6668 SDValue MaskNode = N->getOperand(0);
6677 assert(N->getOperand(0).getValueType() == VT && "Unexpected value type");
6678 assert(N->getOperand(2).getValueType() == VT && "Unexpected value type");
6679 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(2);
6679 IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(2);
6681 Ops.push_back(N->getOperand(0));
6682 Ops.push_back(N->getOperand(2));
6683 SDValue MaskNode = N->getOperand(1);
6714 Ops.push_back(N->getOperand(0));
6716 Ops.push_back(N->getOperand(1));
7337 SDValue NewV = (Elt < (int)NumElems) ? SV->getOperand(0)
7338 : SV->getOperand(1);
7369 isa<ConstantSDNode>(N->getOperand(2))) {
7370 SDValue Vec = N->getOperand(0);
7371 SDValue Sub = N->getOperand(1);
7383 isa<ConstantSDNode>(N->getOperand(1))) {
7384 SDValue Src = N->getOperand(0);
7598 Elt = Op->getOperand(EltIdx);
7629 SDValue Current = Op->getOperand(i);
7630 SDValue SrcVector = Current->getOperand(0);
8097 if (Opc == X86ISD::VPERMV && U->getOperand(0).getNode() == N)
8099 if (Opc == X86ISD::VPERMV3 && U->getOperand(1).getNode() == N)
8118 SDValue ExtValue = Op->getOperand(0);
8123 if (Op->getOperand(i) == ExtValue) {
8127 if (!(Op->getOperand(i).isUndef() || isNullConstant(Op->getOperand(i))))
8127 if (!(Op->getOperand(i).isUndef() || isNullConstant(Op->getOperand(i))))
8135 if (Op->getOperand(i) != ExtValue)
8137 } else if (!(isNullConstant(Op->getOperand(i)) ||
8138 Op->getOperand(i).isUndef()))
8396 SDValue ShuffleVec = SVOp->getOperand(0);
8613 SDValue Op = N->getOperand(i + BaseIdx);
8771 SDValue Op = BV->getOperand(i);
8959 SDValue Op = BV->getOperand(i * NumEltsIn128Bits + j);
9048 if (BV->getOperand(i).isUndef())
9098 if (BV->getOperand(i)->isUndef())
9102 if (BV->getOperand(i)->isUndef())
9195 unsigned Opcode = Op->getOperand(0).getOpcode();
9197 if (Opcode != Op->getOperand(i).getOpcode())
9556 SDValue ExtractedIndex = Op->getOperand(1);
10270 MaskBV->getOperand(Mask[i] % Size) !=
10271 ExpectedBV->getOperand(ExpectedMask[i] % Size))
10316 MaskBV->getOperand(Mask[i] % Size) ==
10317 ExpectedBV->getOperand(ExpectedMask[i] % Size))
12601 SDValue BaseAddr = Ld->getOperand(1);
14551 LoOps.push_back(BV->getOperand(i));
14552 HiOps.push_back(BV->getOperand(i + OrigSplitNumElements));
18703 SDValue V = Op->getOperand(0);
19113 SDValue In = Op->getOperand(0);
20111 return DAG.getNode(X86ISD::SUB, dl, VTs, Op->getOperand(0),
20112 Op->getOperand(1)).getValue(1);
20334 SDValue N0 = N->getOperand(0);
20554 auto *Elt = dyn_cast<ConstantSDNode>(BV->getOperand(i));
21522 SDValue In = Op->getOperand(0);
21577 SDValue In = Op->getOperand(0);
21594 SDValue In = Op->getOperand(0);
21706 SDValue In = Op->getOperand(0);
22081 SDValue FalseBB = User->getOperand(1);
22083 DAG.UpdateNodeOperands(User, User->getOperand(0), Dest);
22122 SDValue FalseBB = User->getOperand(1);
22124 DAG.UpdateNodeOperands(User, User->getOperand(0), Dest);
22470 SDValue CurrentOp = SrcOp->getOperand(i);
22482 SDValue CurrentOp = SrcOp->getOperand(i);
22494 SDValue CurrentOp = SrcOp->getOperand(i);
23605 Op->getOperand(1), Op->getOperand(2));
23605 Op->getOperand(1), Op->getOperand(2));
23802 SDValue Chain = N->getOperand(0);
23807 Chain = DAG.getCopyToReg(Chain, DL, SrcReg, N->getOperand(2), Glue);
23987 SDValue Chain = Op->getOperand(0);
24006 DAG.getNode(Opcode, dl, VTs, Chain, Op->getOperand(2),
24007 Op->getOperand(3), Op->getOperand(4));
24007 Op->getOperand(3), Op->getOperand(4));
25407 EVT ArgVT = Op->getOperand(i).getValueType();
25412 InChain = DAG.getStore(InChain, dl, Op->getOperand(i), StackPtr,
25715 SDValue Op = Amt->getOperand(i);
25840 SDValue A = Amt->getOperand(i);
27130 {N->getOperand(0), N->getOperand(1), N->getOperand(2)},
27130 {N->getOperand(0), N->getOperand(1), N->getOperand(2)},
27130 {N->getOperand(0), N->getOperand(1), N->getOperand(2)},
27138 SDValue Chain = N->getOperand(0);
27139 SDValue LHS = N->getOperand(1);
27140 SDValue RHS = N->getOperand(2);
27223 Node->getOperand(2));
27244 Node->getOperand(0),
27245 Node->getOperand(1), Node->getOperand(2),
27245 Node->getOperand(1), Node->getOperand(2),
27622 Ops.push_back(Op->getOperand(Op->getNumOperands() - 1));
27643 Ops.push_back(Op->getOperand(Op->getNumOperands() - 1));
27836 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, N->getOperand(0));
27855 SDValue Op0 = DAG.getNode(ISD::ANY_EXTEND, dl, MulVT, N->getOperand(0));
27856 SDValue Op1 = DAG.getNode(ISD::ANY_EXTEND, dl, MulVT, N->getOperand(1));
27873 EVT InVT = N->getOperand(0).getValueType();
27888 Ops[0] = N->getOperand(0);
27890 Ops[0] = N->getOperand(1);
27905 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(0),
27907 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(0),
27931 N->getOperand(0), UNDEF);
27933 N->getOperand(1), UNDEF);
27949 if (ISD::isConstantSplatVector(N->getOperand(1).getNode(), SplatVal)) {
27952 Ops0[0] = N->getOperand(0);
27979 SDValue In = N->getOperand(0);
28047 SDValue In = N->getOperand(0);
28120 SDValue Src = N->getOperand(0);
28209 SDValue Src = N->getOperand(0);
28220 SDValue Src = N->getOperand(0);
28240 if (!isTypeLegal(N->getOperand(0).getValueType()))
28242 SDValue V = DAG.getNode(X86ISD::VFPROUND, dl, MVT::v4f32, N->getOperand(0));
28285 cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2),
28287 cpInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2),
28289 cpInL = DAG.getCopyToReg(N->getOperand(0), dl,
28296 swapInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3),
28298 swapInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3),
28329 SDValue Ops[] = {/*Chain*/ RBXSave.getValue(1), N->getOperand(1), swapInL,
28339 SDValue Ops[] = {swapInL.getValue(0), N->getOperand(1),
28439 EVT SrcVT = N->getOperand(0).getValueType();
28471 SDValue Res = DAG.getNode(X86ISD::MOVQ2DQ, dl, WideVT, N->getOperand(0));
31807 return N->getOperand(0);
33851 SDValue V1 = N->getOperand(0);
33852 SDValue V2 = N->getOperand(1);
33868 LHS = V1->getOperand(0); RHS = V1->getOperand(1);
33868 LHS = V1->getOperand(0); RHS = V1->getOperand(1);
33869 if ((V2->getOperand(0) != LHS || V2->getOperand(1) != RHS) &&
33869 if ((V2->getOperand(0) != LHS || V2->getOperand(1) != RHS) &&
33870 (V2->getOperand(0) != RHS || V2->getOperand(1) != LHS))
33870 (V2->getOperand(0) != RHS || V2->getOperand(1) != LHS))
33874 LHS = V2->getOperand(0); RHS = V2->getOperand(1);
33874 LHS = V2->getOperand(0); RHS = V2->getOperand(1);
33875 if ((V1->getOperand(0) != LHS || V1->getOperand(1) != RHS) &&
33875 if ((V1->getOperand(0) != LHS || V1->getOperand(1) != RHS) &&
33876 (V1->getOperand(0) != RHS || V1->getOperand(1) != LHS))
33876 (V1->getOperand(0) != RHS || V1->getOperand(1) != LHS))
33910 SDValue Op0 = N->getOperand(0);
33911 SDValue Op1 = N->getOperand(1);
33991 SDValue N0 = N->getOperand(0);
33992 SDValue N1 = N->getOperand(1);
34020 if (Opcode != ISD::VECTOR_SHUFFLE || !N->getOperand(1).isUndef())
34027 SDValue SrcOp = N->getOperand(0);
34035 SDValue HOp = N->getOperand(0);
34131 return getShuffleHalfVectors(SDLoc(Shuf), Shuf->getOperand(0),
34132 Shuf->getOperand(1), HalfMask, HalfIdx1,
34195 N->getOperand(0).getOpcode() == ISD::BITCAST &&
34196 (N->getOperand(0).getOperand(0).getValueType() == MVT::v4f32 ||
34197 N->getOperand(0).getOperand(0).getValueType() == MVT::v4i32)) {
34198 SDValue In = N->getOperand(0).getOperand(0);
34211 return N->getOperand(0); // return the bitcast
34221 N->getOperand(0).getOpcode() == ISD::INSERT_SUBVECTOR &&
34222 N->getOperand(0).hasOneUse() &&
34223 N->getOperand(0).getOperand(0).isUndef() &&
34224 isNullConstant(N->getOperand(0).getOperand(2))) {
34225 SDValue In = N->getOperand(0).getOperand(1);
34229 Movl, N->getOperand(0).getOperand(2));
34234 if (N->getOpcode() == X86ISD::VZEXT_MOVL && N->getOperand(0).hasOneUse() &&
34235 ISD::isNormalLoad(N->getOperand(0).getNode())) {
34236 LoadSDNode *LN = cast<LoadSDNode>(N->getOperand(0));
34293 Use->getOperand(0) != Amt;
35069 SDValue InVec = N->getOperand(0);
35070 SDValue EltNo = N->getOperand(1);
35344 SDValue Op = N->getOperand(0);
35438 Ops.push_back(CreateMMXElement(BV->getOperand(i)));
35461 SDValue N0 = N->getOperand(0);
35696 SDValue AbsOp1 = Abs->getOperand(0);
35959 EVT VT = Extract->getOperand(0).getValueType();
36030 Extract->getOperand(1));
36042 SDValue Src = N->getOperand(0);
36043 SDValue Idx = N->getOperand(1);
36169 SDValue Vec = ExtElt->getOperand(0);
36170 SDValue Index = ExtElt->getOperand(1);
36279 SDValue Index = ExtElt->getOperand(1);
36384 SDValue InputVector = N->getOperand(0);
36385 SDValue EltIdx = N->getOperand(1);
36483 isa<ConstantSDNode>(Use->getOperand(1)) &&
36520 SDValue Cond = N->getOperand(0);
36521 SDValue LHS = N->getOperand(1);
36522 SDValue RHS = N->getOperand(2);
36642 SDValue Cond = N->getOperand(0);
36643 SDValue TVal = N->getOperand(1);
36644 SDValue FVal = N->getOperand(2);
36660 SDValue Cond = N->getOperand(0);
36661 SDValue LHS = N->getOperand(1);
36662 SDValue RHS = N->getOperand(2);
36730 SDValue Cond = N->getOperand(0);
36796 Cond, U->getOperand(1), U->getOperand(2));
36796 Cond, U->getOperand(1), U->getOperand(2));
36809 SDValue Cond = N->getOperand(0);
36810 SDValue LHS = N->getOperand(1);
36811 SDValue RHS = N->getOperand(2);
37109 Other->getOperand(0) == Cond.getOperand(0)) {
37110 SDValue OpLHS = Other->getOperand(0), OpRHS = Other->getOperand(1);
37110 SDValue OpLHS = Other->getOperand(0), OpRHS = Other->getOperand(1);
37111 SDValue CondRHS = Cond->getOperand(1);
37167 SDValue CondLHS = Cond->getOperand(0);
37168 SDValue CondRHS = Cond->getOperand(1);
37476 if (!isNullConstant(Cond->getOperand(1)))
37479 Cond = Cond->getOperand(0);
37493 SetCC0 = Cond->getOperand(0);
37494 SetCC1 = Cond->getOperand(1);
37501 SetCC0->getOperand(1) != SetCC1->getOperand(1))
37501 SetCC0->getOperand(1) != SetCC1->getOperand(1))
37506 Flags = SetCC0->getOperand(1);
37582 SDValue FalseOp = N->getOperand(0);
37583 SDValue TrueOp = N->getOperand(1);
37585 SDValue Cond = N->getOperand(3);
37801 EVT VT = N->getOperand(0).getValueType();
37809 SDValue Opd = N->getOperand(i);
37882 SDValue N0 = N->getOperand(0);
37883 SDValue N1 = N->getOperand(1);
37884 EVT VT = N->getOperand(0).getValueType();
37934 SDValue Result = DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0),
37939 N->getOperand(0));
37944 SDValue Result = DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0),
37949 N->getOperand(0));
37967 return DAG.getNode(ISD::ADD, DL, VT, N->getOperand(0),
37992 return DAG.getNode(ISD::ADD, DL, VT, N->getOperand(0),
38005 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
38007 SDValue Shift2 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
38038 SDValue N0 = N->getOperand(0);
38039 SDValue N1 = N->getOperand(1);
38079 SDValue N0 = N->getOperand(0);
38080 SDValue N1 = N->getOperand(1);
38136 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1));
38148 SDValue NewMul = DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0),
38186 NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
38189 NewMul = DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0),
38214 ISD::ADD, DL, VT, N->getOperand(0),
38215 DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
38224 NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
38229 NewMul = DAG.getNode(ISD::SUB, DL, VT, N->getOperand(0), NewMul);
38231 NewMul = DAG.getNode(ISD::SUB, DL, VT, NewMul, N->getOperand(0));
38234 NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
38237 NewMul = DAG.getNode(ISD::ADD, DL, VT, NewMul, N->getOperand(0));
38238 NewMul = DAG.getNode(ISD::ADD, DL, VT, NewMul, N->getOperand(0));
38241 NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
38244 NewMul = DAG.getNode(ISD::SUB, DL, VT, NewMul, N->getOperand(0));
38245 NewMul = DAG.getNode(ISD::SUB, DL, VT, NewMul, N->getOperand(0));
38253 SDValue N0 = N->getOperand(0);
38254 SDValue N1 = N->getOperand(1);
38312 SDValue N0 = N->getOperand(0);
38313 SDValue N1 = N->getOperand(1);
38366 SDValue N0 = N->getOperand(0);
38367 SDValue N1 = N->getOperand(1);
38421 SDValue N0 = N->getOperand(0);
38422 SDValue N1 = N->getOperand(1);
38520 SDValue N0 = N->getOperand(0);
38521 SDValue N1 = N->getOperand(1);
38555 SDValue N0 = N->getOperand(0);
38556 SDValue N1 = N->getOperand(1);
38657 SDValue N0 = N->getOperand(0);
38658 SDValue N1 = N->getOperand(1);
38667 SDValue CMP00 = CMP0->getOperand(0);
38668 SDValue CMP01 = CMP0->getOperand(1);
38760 SDValue N0 = N->getOperand(0);
38761 SDValue N1 = N->getOperand(1);
38792 SDValue Narrow = N->getOperand(0);
38800 SDValue N0 = Narrow->getOperand(0);
38801 SDValue N1 = Narrow->getOperand(1);
38852 SDValue N0 = N->getOperand(0);
38853 SDValue N1 = N->getOperand(1);
38887 SDValue Op0 = peekThroughBitcasts(N->getOperand(0));
38888 SDValue Op1 = peekThroughBitcasts(N->getOperand(1));
38970 SDValue N = Node->getOperand(i);
39014 SDValue Inp = (i == 0) ? Node->getOperand(1) : Node->getOperand(0);
39014 SDValue Inp = (i == 0) ? Node->getOperand(1) : Node->getOperand(0);
39052 SDValue N0 = N->getOperand(0);
39053 SDValue N1 = N->getOperand(1);
39118 if (!isa<ConstantSDNode>(N->getOperand(1)))
39124 if (N->getOperand(0).getOpcode() != ISD::BITCAST ||
39125 !N->getOperand(0).hasOneUse() ||
39126 !N->getOperand(0).getOperand(0).hasOneUse())
39130 SDValue Src = N->getOperand(0).getOperand(0);
39178 DAG.getBitcast(MVT::v4f32, N->getOperand(0)),
39179 DAG.getBitcast(MVT::v4f32, N->getOperand(1))));
39184 !isa<ConstantSDNode>(N->getOperand(1))) {
39186 if (DAG.MaskedValueIsZero(N->getOperand(1), HiMask) ||
39187 DAG.MaskedValueIsZero(N->getOperand(0), HiMask)) {
39189 SDValue LHS = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, N->getOperand(0));
39190 SDValue RHS = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, N->getOperand(1));
39248 N->getOperand(0).getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
39249 isa<ConstantSDNode>(N->getOperand(0).getOperand(1))) {
39250 SDValue BitMask = N->getOperand(1);
39251 SDValue SrcVec = N->getOperand(0).getOperand(0);
39258 N->getOperand(0)->isOnlyUserOf(SrcVec.getNode()) &&
39265 unsigned Idx = N->getOperand(0).getConstantOperandVal(1);
39281 N->getOperand(0).getOperand(1));
39297 SDValue N0 = peekThroughBitcasts(N->getOperand(0));
39298 SDValue N1 = peekThroughBitcasts(N->getOperand(1));
39329 SDValue X = N->getOperand(0);
39341 SDValue N0 = N->getOperand(0);
39342 SDValue N1 = N->getOperand(1);
39398 return N->getOpcode() == ISD::SUB && N->getOperand(1) == V &&
39399 ISD::isBuildVectorAllZeros(N->getOperand(0).getNode());
39495 SDValue Clz = DAG.getNode(ISD::CTLZ, dl, VT, Cmp->getOperand(0));
39525 !isORCandidate(N->getOperand(0)))
39532 N->getOperand(1).getOpcode() == X86ISD::CMP &&
39533 isNullConstant(N->getOperand(1).getOperand(1)) &&
39534 N->getOperand(1).getValueType().bitsGE(MVT::i32);
39537 SDNode *OR = N->getOperand(0).getNode();
39538 SDValue LHS = OR->getOperand(0);
39539 SDValue RHS = OR->getOperand(1);
39547 LHS = OR->getOperand(0);
39548 RHS = OR->getOperand(1);
39573 LHS = OR->getOperand(0);
39574 RHS = OR->getOperand(1);
39593 SDValue N0 = N->getOperand(0);
39594 SDValue N1 = N->getOperand(1);
39777 SDValue N0 = N->getOperand(0);
39778 SDValue N1 = N->getOperand(1);
39846 SDValue Shift = N->getOperand(0);
39847 SDValue Ones = N->getOperand(1);
40282 const SDValue &Op = BV->getOperand(i);
40368 bool LoadFirstElt = !isNullConstant(MaskBV->getOperand(0));
40369 bool LoadLastElt = !isNullConstant(MaskBV->getOperand(NumElts - 1));
40733 St->getOperand(1).getOpcode() == ISD::EXTRACT_VECTOR_ELT) {
40734 SDValue OldExtract = St->getOperand(1);
40916 SDValue LHS = N->getOperand(0);
40917 SDValue RHS = N->getOperand(1);
40940 SDValue Src = N->getOperand(0);
41034 SDValue In = N->getOperand(0);
41048 SDValue In = N->getOperand(0);
41067 SDValue In = N->getOperand(0);
41118 SDValue In = N->getOperand(0);
41357 SDValue Src = N->getOperand(0);
41397 SDValue In = N->getOperand(0);
41419 return N->getOperand(0);
41436 if (!SVOp->getOperand(1).isUndef())
41438 if (SDValue NegOp0 = isFNEG(DAG, SVOp->getOperand(0).getNode(), Depth + 1))
41699 SDValue Op0 = DAG.getBitcast(IntVT, N->getOperand(0));
41700 SDValue Op1 = DAG.getBitcast(IntVT, N->getOperand(1));
41719 SDValue LHS = N->getOperand(0);
41720 auto *RHSC = dyn_cast<ConstantSDNode>(N->getOperand(1));
41727 return getSETCC(NewCC, LHS->getOperand(1), DL, DAG);
41738 DAG.getBitcast(MVT::v4f32, N->getOperand(0)),
41739 DAG.getBitcast(MVT::v4f32, N->getOperand(1))));
41763 SDValue Op0 = N->getOperand(0);
41764 SDValue Op1 = N->getOperand(1);
41812 SDValue N0 = N->getOperand(0);
41813 SDValue N1 = N->getOperand(1);
41845 if (SDValue V = getNullFPConstForNullVal(N->getOperand(0), DAG, Subtarget))
41849 if (SDValue V = getNullFPConstForNullVal(N->getOperand(1), DAG, Subtarget))
41862 if (isNullFPScalarOrVectorConst(N->getOperand(0)))
41863 return N->getOperand(1);
41866 if (SDValue V = getNullFPConstForNullVal(N->getOperand(1), DAG, Subtarget))
41878 if (isNullFPScalarOrVectorConst(N->getOperand(0)))
41879 return N->getOperand(1);
41882 if (isNullFPScalarOrVectorConst(N->getOperand(1)))
41883 return N->getOperand(0);
41909 N->getOperand(0), N->getOperand(1));
41909 N->getOperand(0), N->getOperand(1));
41925 SDValue Op0 = N->getOperand(0);
41926 SDValue Op1 = N->getOperand(1);
41989 SDValue In = N->getOperand(0);
41994 LoadSDNode *LN = cast<LoadSDNode>(N->getOperand(0));
42024 SDValue In = N->getOperand(0);
42029 LoadSDNode *LN = cast<LoadSDNode>(N->getOperand(0));
42061 if (ISD::isBuildVectorAllZeros(N->getOperand(0).getNode()))
42062 return N->getOperand(1);
42065 if (ISD::isBuildVectorAllZeros(N->getOperand(1).getNode()))
42069 if (SDValue Not = IsNOT(N->getOperand(0), DAG))
42071 N->getOperand(1));
42085 SDValue N0 = N->getOperand(0);
42086 SDValue N1 = N->getOperand(1);
42103 SDValue N0 = N->getOperand(0);
42104 SDValue N1 = N->getOperand(1);
42167 SDValue N0 = N->getOperand(0);
42168 SDValue N1 = N->getOperand(1);
42212 SDValue Add = Ext->getOperand(0);
42274 SDValue CMovN = Extend->getOperand(0);
42333 SDValue N0 = N->getOperand(0);
42411 SDValue N0 = N->getOperand(0);
42453 SDValue N0 = N->getOperand(0);
42505 SDValue A = N->getOperand(0);
42506 SDValue B = N->getOperand(1);
42507 SDValue C = N->getOperand(2);
42546 return DAG.getNode(NewOpcode, dl, VT, A, B, C, N->getOperand(3));
42560 SDValue N2 = N->getOperand(2);
42568 return DAG.getNode(NewOpcode, dl, VT, N->getOperand(0), N->getOperand(1),
42568 return DAG.getNode(NewOpcode, dl, VT, N->getOperand(0), N->getOperand(1),
42569 NegN2, N->getOperand(3));
42570 return DAG.getNode(NewOpcode, dl, VT, N->getOperand(0), N->getOperand(1),
42570 return DAG.getNode(NewOpcode, dl, VT, N->getOperand(0), N->getOperand(1),
42582 SDValue N0 = N->getOperand(0);
42651 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
42655 SDValue X = SetCC->getOperand(0);
42656 SDValue Y = SetCC->getOperand(1);
42817 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
42818 SDValue LHS = N->getOperand(0);
42819 SDValue RHS = N->getOperand(1);
42883 N->getOperand(2));
42899 SDValue Src = N->getOperand(0);
43073 SDValue EFLAGS = N->getOperand(1);
43086 SDValue EFLAGS = N->getOperand(3);
43094 return DAG.getNode(X86ISD::BRCOND, DL, N->getVTList(), N->getOperand(0),
43095 N->getOperand(1), Cond, Flags);
43115 if (!VT.isVector() || N->getOperand(0)->getOpcode() != ISD::AND ||
43116 N->getOperand(0)->getOperand(0)->getOpcode() != ISD::SETCC ||
43116 N->getOperand(0)->getOperand(0)->getOpcode() != ISD::SETCC ||
43117 VT.getSizeInBits() != N->getOperand(0).getValueSizeInBits())
43124 if (auto *BV = dyn_cast<BuildVectorSDNode>(N->getOperand(0).getOperand(1))) {
43138 N->getOperand(0)->getOperand(0), MaskConst);
43138 N->getOperand(0)->getOperand(0), MaskConst);
43153 SDValue Trunc = N->getOperand(0);
43183 SDValue Op0 = N->getOperand(0);
43218 SDValue Op0 = N->getOperand(0);
43357 if (!isNullConstant(N->getOperand(1)))
43365 SDValue Op = N->getOperand(0);
43449 SDValue LHS = N->getOperand(0);
43450 SDValue RHS = N->getOperand(1);
43478 if (SDValue Flags = combineCarryThroughADD(N->getOperand(2), DAG)) {
43482 N->getOperand(0), N->getOperand(1),
43482 N->getOperand(0), N->getOperand(1),
43488 SDValue Op0 = N->getOperand(0);
43489 SDValue Op1 = N->getOperand(1);
43493 Op0.getOperand(1), N->getOperand(2));
43504 if (X86::isZeroNode(N->getOperand(0)) &&
43505 X86::isZeroNode(N->getOperand(1)) &&
43516 N->getOperand(2)),
43521 if (SDValue Flags = combineCarryThroughADD(N->getOperand(2), DAG)) {
43525 N->getOperand(0), N->getOperand(1),
43525 N->getOperand(0), N->getOperand(1),
43537 SDValue X = N->getOperand(0);
43538 SDValue Y = N->getOperand(1);
43583 SDValue EFLAGS = Y->getOperand(1);
43610 SDValue EFLAGS = Y->getOperand(1);
43703 SDValue Op0 = N->getOperand(0);
43704 SDValue Op1 = N->getOperand(1);
43732 SDValue N0 = DAG.getNode(ISD::TRUNCATE, DL, ReducedVT, MulOp->getOperand(0));
43733 SDValue N1 = DAG.getNode(ISD::TRUNCATE, DL, ReducedVT, MulOp->getOperand(1));
43782 SDValue AbsOp = N->getOperand(0);
43783 SDValue OtherOp = N->getOperand(1);
43868 SDValue Op0L = Op0->getOperand(i), Op1L = Op1->getOperand(i),
43868 SDValue Op0L = Op0->getOperand(i), Op1L = Op1->getOperand(i),
43869 Op0H = Op0->getOperand(i + 1), Op1H = Op1->getOperand(i + 1);
43869 Op0H = Op0->getOperand(i + 1), Op1H = Op1->getOperand(i + 1);
43876 auto *Const0L = dyn_cast<ConstantSDNode>(Op0L->getOperand(1));
43877 auto *Const1L = dyn_cast<ConstantSDNode>(Op1L->getOperand(1));
43878 auto *Const0H = dyn_cast<ConstantSDNode>(Op0H->getOperand(1));
43879 auto *Const1H = dyn_cast<ConstantSDNode>(Op1H->getOperand(1));
43901 Mul = Op0L->getOperand(0);
43907 if (Mul != Op0L->getOperand(0) || Mul != Op1L->getOperand(0) ||
43907 if (Mul != Op0L->getOperand(0) || Mul != Op1L->getOperand(0) ||
43908 Mul != Op0H->getOperand(0) || Mul != Op1H->getOperand(0))
43908 Mul != Op0H->getOperand(0) || Mul != Op1H->getOperand(0))
44070 SDValue Op0 = N->getOperand(0);
44071 SDValue Op1 = N->getOperand(1);
44120 SDValue Op0 = N->getOperand(0);
44121 SDValue Op1 = N->getOperand(1);
44208 SDValue Op0 = N->getOperand(0);
44209 SDValue Op1 = N->getOperand(1);
44255 if (N->getOperand(0) == N->getOperand(1)) {
44255 if (N->getOperand(0) == N->getOperand(1)) {
44383 EVT SrcVT = N->getOperand(0).getValueType();
44411 SDValue Vec = N->getOperand(0);
44412 SDValue SubVec = N->getOperand(1);
44450 Ins.getOperand(1), N->getOperand(2));
44527 SDValue Sel = peekThroughBitcasts(Ext->getOperand(0));
44544 MVT WideVT = Ext->getOperand(0).getSimpleValueType();
44551 unsigned ExtIdx = cast<ConstantSDNode>(Ext->getOperand(1))->getZExtValue();
44595 SDValue InVec = N->getOperand(0);
44608 SDValue NotOp = V->getOperand(0);
44616 DAG.getBitcast(InVecVT, Concat), N->getOperand(1));
44626 unsigned IdxVal = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
44751 SDValue Src = N->getOperand(0);
44789 SDValue LHS = N->getOperand(0);
44790 SDValue RHS = N->getOperand(1);
44842 SDValue In = N->getOperand(0);
lib/Target/X86/X86ISelLowering.h 1526 const SDValue &getValue() const { return getOperand(1); }
1527 const SDValue &getBasePtr() const { return getOperand(2); }
1545 const SDValue &getValue() const { return getOperand(1); }
1546 const SDValue &getBasePtr() const { return getOperand(2); }
1547 const SDValue &getMask() const { return getOperand(3); }
1615 const SDValue &getBasePtr() const { return getOperand(3); }
1616 const SDValue &getIndex() const { return getOperand(4); }
1617 const SDValue &getMask() const { return getOperand(2); }
1618 const SDValue &getScale() const { return getOperand(5); }
1633 const SDValue &getPassThru() const { return getOperand(1); }
1647 const SDValue &getValue() const { return getOperand(1); }
lib/Target/X86/X86InstrInfo.cpp 5621 SDValue Op = N->getOperand(i);
5629 SDValue Chain = N->getOperand(NumOps-1);
5921 return Load1->getOperand(I) == Load2->getOperand(I);
5921 return Load1->getOperand(I) == Load2->getOperand(I);
5934 auto Disp1 = dyn_cast<ConstantSDNode>(Load1->getOperand(X86::AddrDisp));
5935 auto Disp2 = dyn_cast<ConstantSDNode>(Load2->getOperand(X86::AddrDisp));
lib/Target/XCore/XCoreISelDAGToDAG.cpp 162 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
162 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
163 N->getOperand(2) };
169 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
169 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
170 N->getOperand(2) };
176 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
176 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
177 N->getOperand(2), N->getOperand(3) };
177 N->getOperand(2), N->getOperand(3) };
183 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
183 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
184 N->getOperand(2), N->getOperand(3) };
184 N->getOperand(2), N->getOperand(3) };
190 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
190 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
191 N->getOperand(2), N->getOperand(3) };
191 N->getOperand(2), N->getOperand(3) };
197 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
197 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
197 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
225 if (Chain->getOperand(i) == Old) {
229 Ops.push_back(Chain->getOperand(i));
240 SDValue Chain = N->getOperand(0);
241 SDValue Addr = N->getOperand(1);
244 unsigned IntNo = cast<ConstantSDNode>(Addr->getOperand(1))->getZExtValue();
247 SDValue nextAddr = Addr->getOperand(2);
254 SDValue CheckEventChainIn = Addr->getOperand(0);
273 nextAddr->getOperand(0)->getOpcode() == ISD::TargetBlockAddress) {
275 nextAddr->getOperand(0), Glue);
lib/Target/XCore/XCoreISelLowering.cpp 429 isWordAligned(BasePtr->getOperand(0), DAG)) {
430 SDValue NewBasePtr = BasePtr->getOperand(0);
431 Offset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue();
636 if (N->getOperand(0).getOpcode() == ISD::MUL) {
637 Mul = N->getOperand(0);
638 Other = N->getOperand(1);
639 } else if (N->getOperand(1).getOpcode() == ISD::MUL) {
640 Mul = N->getOperand(1);
641 Other = N->getOperand(0);
706 N->getOperand(0),
709 N->getOperand(0),
712 N->getOperand(1),
715 N->getOperand(1),
740 SDValue InChain = Node->getOperand(0);
741 SDValue VAListPtr = Node->getOperand(1);
743 const Value *SV = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
1596 switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) {
1600 SDValue OutVal = N->getOperand(3);
1616 SDValue Time = N->getOperand(3);
1634 SDValue N0 = N->getOperand(0);
1635 SDValue N1 = N->getOperand(1);
1636 SDValue N2 = N->getOperand(2);
1670 SDValue N0 = N->getOperand(0);
1671 SDValue N1 = N->getOperand(1);
1672 SDValue N2 = N->getOperand(2);
1707 SDValue N0 = N->getOperand(0);
1708 SDValue N1 = N->getOperand(1);
1709 SDValue N2 = N->getOperand(2);
1710 SDValue N3 = N->getOperand(3);