|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Derived Classes
include/llvm/CodeGen/SelectionDAGNodes.h 1253 class HandleSDNode : public SDNode {
1277 class AddrSpaceCastSDNode : public SDNode {
1295 class MemSDNode : public SDNode {
1515 class ShuffleVectorSDNode : public SDNode {
1573 class ConstantSDNode : public SDNode {
1614 class ConstantFPSDNode : public SDNode {
1722 class GlobalAddressSDNode : public SDNode {
1748 class FrameIndexSDNode : public SDNode {
1769 class LifetimeSDNode : public SDNode {
1799 class JumpTableSDNode : public SDNode {
1820 class ConstantPoolSDNode : public SDNode {
1883 class TargetIndexSDNode : public SDNode {
1904 class BasicBlockSDNode : public SDNode {
1925 class BuildVectorSDNode : public SDNode {
2014 class SrcValueSDNode : public SDNode {
2032 class MDNodeSDNode : public SDNode {
2049 class RegisterSDNode : public SDNode {
2065 class RegisterMaskSDNode : public SDNode {
2083 class BlockAddressSDNode : public SDNode {
2106 class LabelSDNode : public SDNode {
2125 class ExternalSymbolSDNode : public SDNode {
2146 class MCSymbolSDNode : public SDNode {
2162 class CondCodeSDNode : public SDNode {
2181 class VTSDNode : public SDNode {
2465 class MachineSDNode : public SDNode {
Declarations
include/llvm/CodeGen/Analysis.h 34 class SDNode;
include/llvm/CodeGen/ScheduleDAG.h 40 class SDNode;
include/llvm/CodeGen/SelectionDAGNodes.h 65 class SDNode;
include/llvm/CodeGen/TargetInstrInfo.h 55 class SDNode;
lib/CodeGen/SelectionDAG/SDNodeDbgValue.h 24 class SDNode;
lib/Target/Mips/MipsCCState.h 17 class SDNode;
References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
114596 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
114627 SDNode *N = Node;
114635 SDNode *N = Node;
114662 SDNode *N = Node;
114670 SDNode *N = Node;
114725 SDNode *N = Node;
114734 SDNode *N = Node;
114761 SDNode *N = Node;
114770 SDNode *N = Node;
114797 SDNode *N = Node;
114805 SDNode *N = Node;
114814 SDNode *N = Node;
114829 SDNode *N = Node;
114896 SDNode *N = Node;
114904 SDNode *N = Node;
114913 SDNode *N = Node;
114921 SDNode *N = Node;
114949 SDNode *N = Node;
114960 SDNode *N = Node;
114971 SDNode *N = Node;
114996 SDNode *N = Node;
115007 SDNode *N = Node;
115028 SDNode *N = Node;
115039 SDNode *N = Node;
115050 SDNode *N = Node;
115061 SDNode *N = Node;
115104 SDNode *N = Node;
115159 SDNode *N = Node;
115214 SDNode *N = Node;
115269 SDNode *N = Node;
115324 SDNode *N = Node;
115379 SDNode *N = Node;
115423 SDNode *N = Node;
115432 SDNode *N = Node;
115440 SDNode *N = Node;
115450 SDNode *N = Node;
115459 SDNode *N = Node;
115467 SDNode *N = Node;
115483 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
115483 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
115485 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
78627 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
78661 SDNode *N = Node;
78685 SDNode *N = Node;
78707 SDNode *N = Node;
78713 SDNode *N = Node;
78730 SDNode *N = Node;
78739 SDNode *N = Node;
78747 SDNode *N = Node;
78754 SDNode *N = Node;
78765 SDNode *N = Node;
78778 SDNode *N = Node;
78789 SDNode *N = Node;
78800 SDNode *N = Node;
78812 SDNode *N = Node;
78821 SDNode *N = Node;
78832 SDNode *N = Node;
78843 SDNode *N = Node;
78856 SDNode *N = Node;
78869 SDNode *N = Node;
78883 SDNode *N = Node;
78897 SDNode *N = Node;
78908 SDNode *N = Node;
78922 SDNode *N = Node;
78937 SDNode *N = Node;
78951 SDNode *N = Node;
78966 SDNode *N = Node;
78980 SDNode *N = Node;
78994 SDNode *N = Node;
79005 SDNode *N = Node;
79016 SDNode *N = Node;
79029 SDNode *N = Node;
79040 SDNode *N = Node;
79048 SDNode *N = Node;
79057 SDNode *N = Node;
79069 SDNode *N = Node;
79080 SDNode *N = Node;
79090 SDNode *N = Node;
79105 SDNode *N = Node;
79113 SDNode *N = Node;
79124 SDNode *N = Node;
79142 SDNode *N = Node;
79152 SDNode *N = Node;
79161 SDNode *N = Node;
79171 SDNode *N = Node;
79183 SDNode *N = Node;
79204 SDNode *N = Node;
79216 SDNode *N = Node;
79237 SDNode *N = Node;
79277 SDNode *N = Node;
79317 SDNode *N = Node;
79342 SDNode *N = Node;
79367 SDNode *N = Node;
79390 SDNode *N = Node;
79413 SDNode *N = Node;
79455 SDNode *N = Node;
79461 SDNode *N = Node;
79467 SDNode *N = Node;
79478 SDNode *N = Node;
79489 SDNode *N = Node;
79503 SDNode *N = Node;
79506 for (SDNode *Use : N->uses()) {
79540 SDNode *N = Node;
79553 SDNode *N = Node;
79578 SDNode *N = Node;
79592 SDNode *N = Node;
79609 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicateWithOperands(SDNode *Node, unsigned PredNo, const SmallVectorImpl<SDValue> &Operands) const
79625 SDNode *N = Node;
79661 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
79661 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
79663 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
79792 SDNode *N = V.getNode();
gen/lib/Target/AMDGPU/R600GenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
12292 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
12304 SDNode *N = Node;
12330 SDNode *N = Node;
12338 SDNode *N = Node;
12349 SDNode *N = Node;
12359 SDNode *N = Node;
12369 SDNode *N = Node;
12376 SDNode *N = Node;
12384 SDNode *N = Node;
12394 SDNode *N = Node;
12407 SDNode *N = Node;
12419 SDNode *N = Node;
12430 SDNode *N = Node;
12439 SDNode *N = Node;
12451 SDNode *N = Node;
12460 SDNode *N = Node;
12471 SDNode *N = Node;
12479 SDNode *N = Node;
12490 SDNode *N = Node;
12501 SDNode *N = Node;
12509 SDNode *N = Node;
12529 SDNode *N = Node;
12549 SDNode *N = Node;
12560 SDNode *N = Node;
12568 SDNode *N = Node;
12582 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
12582 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
12584 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/ARC/ARCGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
1085 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
1094 SDNode *N = Node;
1102 SDNode *N = Node;
1110 SDNode *N = Node;
1121 SDNode *N = Node;
1132 SDNode *N = Node;
1140 SDNode *N = Node;
1148 SDNode *N = Node;
1156 SDNode *N = Node;
1164 SDNode *N = Node;
1172 SDNode *N = Node;
1181 SDNode *N = Node;
1218 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
1218 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
1220 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/ARM/ARMGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
53993 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
54068 SDNode *N = Node;
54089 SDNode *N = Node;
54113 SDNode *N = Node;
54181 SDNode *N = Node;
54192 SDNode *N = Node;
54208 SDNode *N = Node;
54273 SDNode *N = Node;
54281 SDNode *N = Node;
54296 SDNode *N = Node;
54313 SDNode *N = Node;
54322 SDNode *N = Node;
54331 SDNode *N = Node;
54347 SDNode *N = Node;
54356 SDNode *N = Node;
54366 SDNode *N = Node;
54375 SDNode *N = Node;
54384 SDNode *N = Node;
54392 SDNode *N = Node;
54400 SDNode *N = Node;
54410 SDNode *N = Node;
54418 SDNode *N = Node;
54426 SDNode *N = Node;
54436 SDNode *N = Node;
54446 SDNode *N = Node;
54473 SDNode *N = Node;
54481 SDNode *N = Node;
54489 SDNode *N = Node;
54497 SDNode *N = Node;
54506 SDNode *N = Node;
54514 SDNode *N = Node;
54522 SDNode *N = Node;
54530 SDNode *N = Node;
54538 SDNode *N = Node;
54546 SDNode *N = Node;
54556 SDNode *N = Node;
54566 SDNode *N = Node;
54576 SDNode *N = Node;
54584 SDNode *N = Node;
54592 SDNode *N = Node;
54603 SDNode *N = Node;
54613 SDNode *N = Node;
54623 SDNode *N = Node;
54633 SDNode *N = Node;
54651 SDNode *N = Node;
54670 SDNode *N = Node;
54678 SDNode *N = Node;
54689 SDNode *N = Node;
54697 SDNode *N = Node;
54755 SDNode *N = Node;
54787 SDNode *N = Node;
54796 SDNode *N = Node;
54807 SDNode *N = Node;
54816 SDNode *N = Node;
54825 SDNode *N = Node;
54835 SDNode *N = Node;
54868 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
54868 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
54870 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/AVR/AVRGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
1569 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
1587 SDNode *N = Node;
1595 SDNode *N = Node;
1611 SDNode *N = Node;
1620 SDNode *N = Node;
1645 SDNode *N = Node;
1654 SDNode *N = Node;
1693 SDNode *N = Node;
1707 SDNode *N = Node;
1723 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
1723 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
1725 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/BPF/BPFGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
1914 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
1930 SDNode *N = Node;
1938 SDNode *N = Node;
1949 SDNode *N = Node;
1959 SDNode *N = Node;
1969 SDNode *N = Node;
1977 SDNode *N = Node;
1985 SDNode *N = Node;
1993 SDNode *N = Node;
2001 SDNode *N = Node;
2009 SDNode *N = Node;
2017 SDNode *N = Node;
2103 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
2103 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
2105 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc 48 void SelectCode(SDNode *N);
51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
72261 bool CheckNodePredicate(SDNode *Node, unsigned PredNo) const override;
72264 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
72280 SDNode *N = Node;
72288 SDNode *N = Node;
72296 SDNode *N = Node;
72310 SDNode *N = Node;
72325 SDNode *N = Node;
72334 SDNode *N = Node;
72342 SDNode *N = Node;
72350 SDNode *N = Node;
72370 SDNode *N = Node;
72385 SDNode *N = Node;
72394 SDNode *N = Node;
72479 SDNode *N = Node;
72502 SDNode *N = Node;
72513 SDNode *N = Node;
72523 SDNode *N = Node;
72566 SDNode *N = Node;
72574 SDNode *N = Node;
72584 SDNode *N = Node;
72593 SDNode *N = Node;
72612 SDNode *N = Node;
72645 SDNode *N = Node;
72720 SDNode *N = Node;
72801 SDNode *N = Node;
72811 SDNode *N = Node;
72821 SDNode *N = Node;
72831 SDNode *N = Node;
72839 SDNode *N = Node;
72847 SDNode *N = Node;
72895 bool CheckComplexPattern(SDNode *Root, SDNode *Parent,
72895 bool CheckComplexPattern(SDNode *Root, SDNode *Parent,
72897 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result) override;
72900 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
72900 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
72902 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/Lanai/LanaiGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
1336 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
1345 SDNode *N = Node;
1353 SDNode *N = Node;
1361 SDNode *N = Node;
1369 SDNode *N = Node;
1380 SDNode *N = Node;
1392 SDNode *N = Node;
1400 SDNode *N = Node;
1408 SDNode *N = Node;
1416 SDNode *N = Node;
1424 SDNode *N = Node;
1432 SDNode *N = Node;
1511 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
1511 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
1513 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/MSP430/MSP430GenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
4780 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
4789 SDNode *N = Node;
4797 SDNode *N = Node;
4805 SDNode *N = Node;
4813 SDNode *N = Node;
4833 SDNode *N = Node;
4842 SDNode *N = Node;
4850 SDNode *N = Node;
4858 SDNode *N = Node;
4866 SDNode *N = Node;
4884 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
4884 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
4886 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/Mips/MipsGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
29974 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
29983 SDNode *N = Node;
29991 SDNode *N = Node;
29999 SDNode *N = Node;
30020 SDNode *N = Node;
30041 SDNode *N = Node;
30062 SDNode *N = Node;
30070 SDNode *N = Node;
30078 SDNode *N = Node;
30086 SDNode *N = Node;
30094 SDNode *N = Node;
30102 SDNode *N = Node;
30110 SDNode *N = Node;
30208 SDNode *N = Node;
30277 SDNode *N = Node;
30304 SDNode *N = Node;
30308 SDNode *BV = N->getOperand(0).getNode();
30317 SDNode *N = Node;
30321 SDNode *BV = N->getOperand(0).getNode();
30395 SDNode *N = Node;
30478 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
30478 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
30480 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
71543 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
71784 SDNode *N = Node;
71988 SDNode *N = Node;
72192 SDNode *N = Node;
72266 SDNode *N = Node;
72284 SDNode *N = Node;
72318 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
72318 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
72320 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/PowerPC/PPCGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
44087 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
44096 SDNode *N = Node;
44105 SDNode *N = Node;
44130 SDNode *N = Node;
44156 SDNode *N = Node;
44165 SDNode *N = Node;
44174 SDNode *N = Node;
44183 SDNode *N = Node;
44192 SDNode *N = Node;
44219 SDNode *N = Node;
44228 SDNode *N = Node;
44236 SDNode *N = Node;
44245 SDNode *N = Node;
44306 SDNode *N = Node;
44331 SDNode *N = Node;
44339 SDNode *N = Node;
44347 SDNode *N = Node;
44355 SDNode *N = Node;
44364 SDNode *N = Node;
44372 SDNode *N = Node;
44381 SDNode *N = Node;
44390 SDNode *N = Node;
44398 SDNode *N = Node;
44406 SDNode *N = Node;
44427 SDNode *N = Node;
44448 SDNode *N = Node;
44456 SDNode *N = Node;
44482 SDNode *N = Node;
44490 SDNode *N = Node;
44498 SDNode *N = Node;
44506 SDNode *N = Node;
44514 SDNode *N = Node;
44522 SDNode *N = Node;
44530 SDNode *N = Node;
44538 SDNode *N = Node;
44546 SDNode *N = Node;
44554 SDNode *N = Node;
44562 SDNode *N = Node;
44570 SDNode *N = Node;
44578 SDNode *N = Node;
44586 SDNode *N = Node;
44594 SDNode *N = Node;
44602 SDNode *N = Node;
44610 SDNode *N = Node;
44618 SDNode *N = Node;
44626 SDNode *N = Node;
44634 SDNode *N = Node;
44642 SDNode *N = Node;
44650 SDNode *N = Node;
44658 SDNode *N = Node;
44666 SDNode *N = Node;
44674 SDNode *N = Node;
44682 SDNode *N = Node;
44690 SDNode *N = Node;
44698 SDNode *N = Node;
44706 SDNode *N = Node;
44714 SDNode *N = Node;
44722 SDNode *N = Node;
44730 SDNode *N = Node;
44738 SDNode *N = Node;
44746 SDNode *N = Node;
44754 SDNode *N = Node;
44762 SDNode *N = Node;
44770 SDNode *N = Node;
44778 SDNode *N = Node;
44786 SDNode *N = Node;
44794 SDNode *N = Node;
44802 SDNode *N = Node;
44810 SDNode *N = Node;
44826 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
44826 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
44828 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
44955 SDNode *N = V.getNode();
44961 SDNode *N = V.getNode();
44967 SDNode *N = V.getNode();
44973 SDNode *N = V.getNode();
44979 SDNode *N = V.getNode();
44985 SDNode *N = V.getNode();
44991 SDNode *N = V.getNode();
44997 SDNode *N = V.getNode();
45003 SDNode *N = V.getNode();
gen/lib/Target/RISCV/RISCVGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
13795 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
13805 SDNode *N = Node;
13818 SDNode *N = Node;
13826 SDNode *N = Node;
13834 SDNode *N = Node;
13847 SDNode *N = Node;
13855 SDNode *N = Node;
13868 SDNode *N = Node;
13876 SDNode *N = Node;
13884 SDNode *N = Node;
13909 SDNode *N = Node;
13917 SDNode *N = Node;
13925 SDNode *N = Node;
13933 SDNode *N = Node;
13954 SDNode *N = Node;
14018 SDNode *N = Node;
14049 SDNode *N = Node;
14080 SDNode *N = Node;
14111 SDNode *N = Node;
14142 SDNode *N = Node;
14158 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
14158 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
14160 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/Sparc/SparcGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
3417 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
3426 SDNode *N = Node;
3434 SDNode *N = Node;
3442 SDNode *N = Node;
3455 SDNode *N = Node;
3468 SDNode *N = Node;
3483 SDNode *N = Node;
3497 SDNode *N = Node;
3505 SDNode *N = Node;
3513 SDNode *N = Node;
3521 SDNode *N = Node;
3529 SDNode *N = Node;
3538 SDNode *N = Node;
3548 SDNode *N = Node;
3601 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
3601 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
3603 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
29810 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
29819 SDNode *N = Node;
29827 SDNode *N = Node;
29837 SDNode *N = Node;
29847 SDNode *N = Node;
29866 SDNode *N = Node;
29874 SDNode *N = Node;
29882 SDNode *N = Node;
29892 SDNode *N = Node;
29903 SDNode *N = Node;
29911 SDNode *N = Node;
29919 SDNode *N = Node;
29927 SDNode *N = Node;
29935 SDNode *N = Node;
29943 SDNode *N = Node;
29953 SDNode *N = Node;
29972 SDNode *N = Node;
29982 SDNode *N = Node;
29990 SDNode *N = Node;
30005 SDNode *N = Node;
30037 SDNode *N = Node;
30055 SDNode *N = Node;
30064 SDNode *N = Node;
30115 SDNode *N = Node;
30125 SDNode *N = Node;
30252 SDNode *N = Node;
30261 SDNode *N = Node;
30270 SDNode *N = Node;
30298 SDNode *N = Node;
30307 SDNode *N = Node;
30316 SDNode *N = Node;
30376 SDNode *N = Node;
30384 SDNode *N = Node;
30392 SDNode *N = Node;
30410 SDNode *N = Node;
30434 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
30434 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
30436 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
21145 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
21154 SDNode *N = Node;
21172 SDNode *N = Node;
21192 SDNode *N = Node;
21200 SDNode *N = Node;
21235 SDNode *N = Node;
21251 SDNode *N = Node;
21259 SDNode *N = Node;
21267 SDNode *N = Node;
21275 SDNode *N = Node;
21283 SDNode *N = Node;
21291 SDNode *N = Node;
21301 SDNode *N = Node;
21311 SDNode *N = Node;
21321 SDNode *N = Node;
21329 SDNode *N = Node;
21337 SDNode *N = Node;
21345 SDNode *N = Node;
gen/lib/Target/X86/X86GenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
253562 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
253571 SDNode *N = Node;
253579 SDNode *N = Node;
253587 SDNode *N = Node;
253595 SDNode *N = Node;
253604 SDNode *N = Node;
253612 SDNode *N = Node;
253623 SDNode *N = Node;
253631 SDNode *N = Node;
253645 SDNode *N = Node;
253659 SDNode *N = Node;
253667 SDNode *N = Node;
253675 SDNode *N = Node;
253683 SDNode *N = Node;
253712 SDNode *N = Node;
253720 SDNode *N = Node;
253738 SDNode *N = Node;
253747 SDNode *N = Node;
253756 SDNode *N = Node;
253764 SDNode *N = Node;
253773 SDNode *N = Node;
253782 SDNode *N = Node;
253790 SDNode *N = Node;
253799 SDNode *N = Node;
253807 SDNode *N = Node;
253815 SDNode *N = Node;
253823 SDNode *N = Node;
253832 SDNode *N = Node;
253844 SDNode *N = Node;
253852 SDNode *N = Node;
253860 SDNode *N = Node;
253868 SDNode *N = Node;
253876 SDNode *N = Node;
253890 SDNode *N = Node;
253904 SDNode *N = Node;
253917 SDNode *N = Node;
253928 SDNode *N = Node;
253941 SDNode *N = Node;
253973 SDNode *N = Node;
253993 SDNode *N = Node;
254026 SDNode *N = Node;
254035 SDNode *N = Node;
254044 SDNode *N = Node;
254054 SDNode *N = Node;
254063 SDNode *N = Node;
254074 SDNode *N = Node;
254083 SDNode *N = Node;
254091 SDNode *N = Node;
254100 SDNode *N = Node;
254108 SDNode *N = Node;
254116 SDNode *N = Node;
254132 SDNode *N = Node;
254153 SDNode *N = Node;
254162 SDNode *N = Node;
254173 SDNode *N = Node;
254182 SDNode *N = Node;
254191 SDNode *N = Node;
254200 SDNode *N = Node;
254208 SDNode *N = Node;
254217 SDNode *N = Node;
254225 SDNode *N = Node;
254233 SDNode *N = Node;
254249 SDNode *N = Node;
254258 SDNode *N = Node;
254266 SDNode *N = Node;
254276 SDNode *N = Node;
254285 SDNode *N = Node;
254294 SDNode *N = Node;
254302 SDNode *N = Node;
254310 SDNode *N = Node;
254318 SDNode *N = Node;
254326 SDNode *N = Node;
254334 SDNode *N = Node;
254342 SDNode *N = Node;
254350 SDNode *N = Node;
254358 SDNode *N = Node;
254366 SDNode *N = Node;
254374 SDNode *N = Node;
254382 SDNode *N = Node;
254390 SDNode *N = Node;
254398 SDNode *N = Node;
254406 SDNode *N = Node;
254434 SDNode *N = Node;
254472 SDNode *N = Node;
254480 SDNode *N = Node;
254493 SDNode *N = Node;
254501 SDNode *N = Node;
254510 SDNode *N = Node;
254522 SDNode *N = Node;
254531 SDNode *N = Node;
254541 SDNode *N = Node;
254550 SDNode *N = Node;
254559 SDNode *N = Node;
254568 SDNode *N = Node;
254577 SDNode *N = Node;
254586 SDNode *N = Node;
254595 SDNode *N = Node;
254604 SDNode *N = Node;
254613 SDNode *N = Node;
254622 SDNode *N = Node;
254631 SDNode *N = Node;
254640 SDNode *N = Node;
254649 SDNode *N = Node;
254666 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
254666 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
254668 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
254731 SDNode *N = V.getNode();
254737 SDNode *N = V.getNode();
254785 SDNode *N = V.getNode();
254793 SDNode *N = V.getNode();
254837 SDNode *N = V.getNode();
254843 SDNode *N = V.getNode();
gen/lib/Target/XCore/XCoreGenDAGISel.inc 51 void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
2264 bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const
2307 SDNode *N = Node;
2315 SDNode *N = Node;
2325 SDNode *N = Node;
2333 SDNode *N = Node;
2341 SDNode *N = Node;
2349 SDNode *N = Node;
2359 SDNode *N = Node;
2367 SDNode *N = Node;
2375 SDNode *N = Node;
2383 SDNode *N = Node;
2445 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
2445 bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
2447 SmallVectorImpl<std::pair<SDValue, SDNode*>> &Result)
include/llvm/ADT/ArrayRef.h 108 const ArrayRef<U *> &A,
110 std::is_convertible<U *const *, T const *>::value>::type * = nullptr)
include/llvm/ADT/DenseMapInfo.h 39 static inline T* getEmptyKey() {
41 Val <<= PointerLikeTypeTraits<T*>::NumLowBitsAvailable;
45 static inline T* getTombstoneKey() {
47 Val <<= PointerLikeTypeTraits<T*>::NumLowBitsAvailable;
51 static unsigned getHashValue(const T *PtrVal) {
56 static bool isEqual(const T *LHS, const T *RHS) { return LHS == RHS; }
56 static bool isEqual(const T *LHS, const T *RHS) { return LHS == RHS; }
include/llvm/ADT/FoldingSet.h 221 static void Profile(const T &X, FoldingSetNodeID &ID) {
224 static void Profile(T &X, FoldingSetNodeID &ID) {
232 static inline bool Equals(T &X, const FoldingSetNodeID &ID, unsigned IDHash,
240 static inline unsigned ComputeHash(T &X, FoldingSetNodeID &TempID);
250 : public DefaultFoldingSetTrait<T> {};
369 FoldingSetTrait<T>::Profile(X, TempID);
375 FoldingSetTrait<T>::Profile(X, TempID);
410 using iterator = FoldingSetIterator<T>;
415 using const_iterator = FoldingSetIterator<const T>;
420 using bucket_iterator = FoldingSetBucketIterator<T>;
432 bool RemoveNode(T *N) { return FoldingSetBase::RemoveNode(N); }
437 T *GetOrInsertNode(T *N) {
437 T *GetOrInsertNode(T *N) {
444 T *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos) {
451 void InsertNode(T *N, void *InsertPos) {
457 void InsertNode(T *N) {
473 template <class T> class FoldingSet final : public FoldingSetImpl<T> {
474 using Super = FoldingSetImpl<T>;
480 T *TN = static_cast<T *>(N);
481 FoldingSetTrait<T>::Profile(*TN, ID);
488 T *TN = static_cast<T *>(N);
489 return FoldingSetTrait<T>::Equals(*TN, ID, IDHash, TempID);
495 T *TN = static_cast<T *>(N);
496 return FoldingSetTrait<T>::ComputeHash(*TN, TempID);
include/llvm/ADT/SmallSet.h 249 class SmallSet<PointeeType*, N> : public SmallPtrSet<PointeeType*, N> {};
include/llvm/ADT/ilist.h 65 void addNodeToList(NodeTy *) {}
66 void removeNodeFromList(NodeTy *) {}
82 struct ilist_node_traits : ilist_alloc_traits<NodeTy>,
83 ilist_callback_traits<NodeTy> {};
89 struct ilist_traits : public ilist_node_traits<NodeTy> {};
96 template <class T> T &make();
106 static Yes &test(U *I, decltype(I->getNext(&make<NodeT>())) * = 0);
136 static Yes &test(U *I, decltype(I->createNode(make<NodeT>())) * = 0);
144 static const bool value = HasGetNext<TraitsT, NodeT>::value ||
146 HasCreateNode<TraitsT, NodeT>::value;
389 : public iplist_impl<simple_ilist<T, Options...>, ilist_traits<T>> {
389 : public iplist_impl<simple_ilist<T, Options...>, ilist_traits<T>> {
include/llvm/ADT/ilist_node.h 150 typename ilist_detail::compute_node_options<T, Options...>::type> {
include/llvm/ADT/ilist_node_options.h 108 typedef T value_type;
109 typedef T *pointer;
110 typedef T &reference;
111 typedef const T *const_pointer;
112 typedef const T &const_reference;
122 typedef node_options<T, extract_sentinel_tracking<Options...>::value,
include/llvm/ADT/simple_ilist.h 79 : ilist_detail::compute_node_options<T, Options...>::type::list_base_type,
81 typename ilist_detail::compute_node_options<T, Options...>::type> {
85 typename ilist_detail::compute_node_options<T, Options...>::type;
include/llvm/CodeGen/ScheduleDAG.h 246 SDNode *Node = nullptr; ///< Representative node.
308 SUnit(SDNode *node, unsigned nodenum)
348 void setNode(SDNode *N) {
355 SDNode *getNode() const {
614 const MCInstrDesc *getNodeDesc(const SDNode *Node) const;
include/llvm/CodeGen/SelectionDAG.h 131 static void deleteNode(SDNode *) {
152 using DbgValMapType = DenseMap<const SDNode *, SmallVector<SDDbgValue *, 2>>;
160 void add(SDDbgValue *V, const SDNode *Node, bool isParameter) {
174 void erase(const SDNode *Node);
190 ArrayRef<SDDbgValue*> getSDDbgValues(const SDNode *Node) const {
239 SDNode EntryNode;
245 ilist<SDNode> AllNodes;
249 using NodeAllocatorType = RecyclingAllocator<BumpPtrAllocator, SDNode,
258 FoldingSet<SDNode> CSEMap;
278 DenseMap<const SDNode *, CallSiteDbgInfo> SDCallSiteDbgInfo;
306 virtual void NodeDeleted(SDNode *N, SDNode *E);
306 virtual void NodeDeleted(SDNode *N, SDNode *E);
309 virtual void NodeUpdated(SDNode *N);
312 virtual void NodeInserted(SDNode *N);
316 std::function<void(SDNode *, SDNode *)> Callback;
316 std::function<void(SDNode *, SDNode *)> Callback;
319 std::function<void(SDNode *, SDNode *)> Callback)
319 std::function<void(SDNode *, SDNode *)> Callback)
322 void NodeDeleted(SDNode *N, SDNode *E) override { Callback(N, E); }
322 void NodeDeleted(SDNode *N, SDNode *E) override { Callback(N, E); }
345 bool setSubgraphColorHelper(SDNode *N, const char *Color,
346 DenseSet<SDNode *> &visited,
350 SDNodeT *newSDNode(ArgTypes &&... Args) {
351 return new (NodeAllocator.template Allocate<SDNodeT>())
352 SDNodeT(std::forward<ArgTypes>(Args)...);
379 void createOperands(SDNode *Node, ArrayRef<SDValue> Vals);
381 void removeOperands(SDNode *Node) {
390 void CreateTopologicalOrder(std::vector<SDNode*>& Order);
432 std::map<const SDNode *, std::string> NodeGraphAttrs;
440 void setGraphAttrs(const SDNode *N, const char *Attrs);
444 const std::string getGraphAttrs(const SDNode *N) const;
447 void setGraphColor(const SDNode *N, const char *Color);
450 void setSubgraphColor(SDNode *N, const char *Color);
452 using allnodes_const_iterator = ilist<SDNode>::const_iterator;
457 using allnodes_iterator = ilist<SDNode>::iterator;
462 ilist<SDNode>::size_type allnodes_size() const {
540 bool LegalizeOp(SDNode *N, SmallSetVector<SDNode *, 16> &UpdatedNodes);
540 bool LegalizeOp(SDNode *N, SmallSetVector<SDNode *, 16> &UpdatedNodes);
560 void DeleteNode(SDNode *N);
1172 SDValue expandVAArg(SDNode *Node);
1175 SDValue expandVACopy(SDNode *Node);
1190 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op);
1190 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op);
1191 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
1191 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
1192 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1192 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1194 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1194 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1196 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1196 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1198 SDNode *UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops);
1198 SDNode *UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops);
1211 void updateDivergence(SDNode * N);
1217 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT);
1217 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT);
1218 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1);
1218 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1);
1219 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1219 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1221 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1221 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1223 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1223 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1225 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2);
1225 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2);
1226 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1226 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1228 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1228 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1230 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1230 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1232 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1232 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1234 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs,
1234 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs,
1239 SDNode *MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs,
1239 SDNode *MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs,
1245 SDNode *mutateStrictFPToFP(SDNode *Node);
1245 SDNode *mutateStrictFPToFP(SDNode *Node);
1289 SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTList, ArrayRef<SDValue> Ops,
1293 SDDbgValue *getDbgValue(DIVariable *Var, DIExpression *Expr, SDNode *N,
1324 void RemoveDeadNode(SDNode *N);
1328 void RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes);
1346 void ReplaceAllUsesWith(SDNode *From, SDNode *To);
1346 void ReplaceAllUsesWith(SDNode *From, SDNode *To);
1347 void ReplaceAllUsesWith(SDNode *From, const SDValue *To);
1394 void AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter);
1400 ArrayRef<SDDbgValue*> GetDbgValues(const SDNode* SD) const {
1428 void salvageDebugInfo(SDNode &N);
1442 const SDNode *N2);
1445 SDNode *N1, SDNode *N2);
1445 SDNode *N1, SDNode *N2);
1616 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
1626 SDValue UnrollVectorOp(SDNode *N, unsigned ResNE = 0);
1630 std::pair<SDValue, SDValue> UnrollVectorOverflowOp(SDNode *N,
1662 std::pair<SDValue, SDValue> SplitVectorOperand(const SDNode *N, unsigned OpNo)
1679 SDNode *isConstantIntBuildVectorOrConstantInt(SDValue N);
1682 SDNode *isConstantFPBuildVectorOrConstantFP(SDValue N);
1691 void addCallSiteInfo(const SDNode *CallNode, CallSiteInfoImpl &&CallInfo) {
1702 void addHeapAllocSite(const SDNode *Node, MDNode *MD) {
1707 MDNode *getHeapAllocSite(const SDNode *Node) {
1715 void InsertNode(SDNode *N);
1716 bool RemoveNodeFromCSEMaps(SDNode *N);
1717 void AddModifiedNodeToCSEMaps(SDNode *N);
1718 SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op, void *&InsertPos);
1718 SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op, void *&InsertPos);
1719 SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2,
1719 SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2,
1721 SDNode *FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
1721 SDNode *FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
1723 SDNode *UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &loc);
1723 SDNode *UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &loc);
1725 void DeleteNodeNotInCSEMaps(SDNode *N);
1726 void DeallocateNode(SDNode *N);
1734 SDNode *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos);
1739 SDNode *FindNodeOrInsertPos(const FoldingSetNodeID &ID, const SDLoc &DL,
1748 std::vector<SDNode*> ValueTypeNodes;
1749 std::map<EVT, SDNode*, EVT::compareRawBits> ExtendedValueTypeNodes;
1750 StringMap<SDNode*> ExternalSymbols;
1752 std::map<std::pair<std::string, unsigned>, SDNode *> TargetExternalSymbols;
1753 DenseMap<MCSymbol *, SDNode *> MCSymbols;
1756 template <> struct GraphTraits<SelectionDAG*> : public GraphTraits<SDNode*> {
1789 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
include/llvm/CodeGen/SelectionDAGAddressAnalysis.h 80 static bool computeAliasing(const SDNode *Op0,
82 const SDNode *Op1,
87 static BaseIndexOffset match(const SDNode *N, const SelectionDAG &DAG);
include/llvm/CodeGen/SelectionDAGISel.h 90 virtual void Select(SDNode *N) = 0;
105 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
105 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
111 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
111 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
115 static void InvalidateNodeId(SDNode *N);
116 static int getUninvalidatedNodeId(SDNode *N);
118 static void EnforceNodeIdInvariant(SDNode *N);
226 void ReplaceUses(SDNode *F, SDNode *T) {
226 void ReplaceUses(SDNode *F, SDNode *T) {
232 void ReplaceNode(SDNode *F, SDNode *T) {
232 void ReplaceNode(SDNode *F, SDNode *T) {
272 virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const {
282 SDNode *N, unsigned PredNo,
287 virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N,
287 virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N,
289 SmallVectorImpl<std::pair<SDValue, SDNode*> > &Result) {
297 void SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
306 bool isOrEquivalentToAdd(const SDNode *N) const;
311 void Select_INLINEASM(SDNode *N, bool Branch);
312 void Select_READ_REGISTER(SDNode *Op);
313 void Select_WRITE_REGISTER(SDNode *Op);
314 void Select_UNDEF(SDNode *N);
315 void CannotYetSelect(SDNode *N);
319 SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
319 SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
322 SDNode *MutateStrictFPToFP(SDNode *Node, unsigned NewOpc);
322 SDNode *MutateStrictFPToFP(SDNode *Node, unsigned NewOpc);
358 void UpdateChains(SDNode *NodeToMatch, SDValue InputChain,
359 SmallVectorImpl<SDNode *> &ChainNodesMatched,
include/llvm/CodeGen/SelectionDAGNodes.h 70 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr,
88 bool isConstantSplatVector(const SDNode *N, APInt &SplatValue);
92 bool isBuildVectorAllOnes(const SDNode *N);
96 bool isBuildVectorAllZeros(const SDNode *N);
100 bool isBuildVectorOfConstantSDNodes(const SDNode *N);
104 bool isBuildVectorOfConstantFPSDNodes(const SDNode *N);
108 bool allOperandsUndef(const SDNode *N);
126 SDNode *Node = nullptr; // The node defining the value we are using.
131 SDValue(SDNode *node, unsigned resno);
137 SDNode *getNode() const { return Node; }
140 void setNode(SDNode *N) { Node = N; }
142 inline SDNode *operator->() const { return Node; }
162 bool isOperandOf(const SDNode *N) const;
239 using SimpleType = SDNode *;
246 using SimpleType = /*const*/ SDNode *;
262 SDNode *User = nullptr;
281 SDNode *getUser() { return User; }
287 SDNode *getNode() const { return Val.getNode(); }
314 void setUser(SDNode *p) { User = p; }
324 inline void setNode(SDNode *N);
342 using SimpleType = SDNode *;
494 class SDNode : public FoldingSetNode, public ilist_node<SDNode> {
813 SDNode *operator*() const {
818 SDNode *operator->() const { return operator*(); }
852 bool isOnlyUserOf(const SDNode *N) const;
855 bool isOperandOf(const SDNode *N) const;
860 bool isPredecessorOf(const SDNode *N) const {
868 bool hasPredecessor(const SDNode *N) const;
879 static bool hasPredecessorHelper(const SDNode *N,
880 SmallPtrSetImpl<const SDNode *> &Visited,
881 SmallVectorImpl<const SDNode *> &Worklist,
884 SmallVector<const SDNode *, 8> DeferredNodes;
906 const SDNode *M = Worklist.pop_back_val();
914 SDNode *Op = OpV.getNode();
935 static bool areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N);
935 static bool areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N);
942 return std::numeric_limits<decltype(SDNode::NumOperands)>::max();
986 SDNode *getGluedNode() const {
995 SDNode *getGluedUser() const {
1134 SDLoc(const SDNode *N) : DL(N->getDebugLoc()), IROrder(N->getIROrder()) {}
1148 inline SDValue::SDValue(SDNode *node, unsigned resno)
1243 inline void SDUse::setNode(SDNode *N) {
1253 class HandleSDNode : public SDNode {
1277 class AddrSpaceCastSDNode : public SDNode {
1289 static bool classof(const SDNode *N) {
1295 class MemSDNode : public SDNode {
1401 static bool classof(const SDNode *N) {
1463 static bool classof(const SDNode *N) {
1498 static bool classof(const SDNode *N) {
1515 class ShuffleVectorSDNode : public SDNode {
1568 static bool classof(const SDNode *N) {
1573 class ConstantSDNode : public SDNode {
1600 static bool classof(const SDNode *N) {
1614 class ConstantFPSDNode : public SDNode {
1655 static bool classof(const SDNode *N) {
1722 class GlobalAddressSDNode : public SDNode {
1740 static bool classof(const SDNode *N) {
1748 class FrameIndexSDNode : public SDNode {
1761 static bool classof(const SDNode *N) {
1769 class LifetimeSDNode : public SDNode {
1793 static bool classof(const SDNode *N) {
1799 class JumpTableSDNode : public SDNode {
1814 static bool classof(const SDNode *N) {
1820 class ConstantPoolSDNode : public SDNode {
1876 static bool classof(const SDNode *N) {
1883 class TargetIndexSDNode : public SDNode {
1899 static bool classof(const SDNode *N) {
1904 class BasicBlockSDNode : public SDNode {
1919 static bool classof(const SDNode *N) {
1925 class BuildVectorSDNode : public SDNode {
2005 static bool classof(const SDNode *N) {
2014 class SrcValueSDNode : public SDNode {
2027 static bool classof(const SDNode *N) {
2032 class MDNodeSDNode : public SDNode {
2044 static bool classof(const SDNode *N) {
2049 class RegisterSDNode : public SDNode {
2060 static bool classof(const SDNode *N) {
2065 class RegisterMaskSDNode : public SDNode {
2078 static bool classof(const SDNode *N) {
2083 class BlockAddressSDNode : public SDNode {
2100 static bool classof(const SDNode *N) {
2106 class LabelSDNode : public SDNode {
2119 static bool classof(const SDNode *N) {
2125 class ExternalSymbolSDNode : public SDNode {
2140 static bool classof(const SDNode *N) {
2146 class MCSymbolSDNode : public SDNode {
2157 static bool classof(const SDNode *N) {
2162 class CondCodeSDNode : public SDNode {
2174 static bool classof(const SDNode *N) {
2181 class VTSDNode : public SDNode {
2193 static bool classof(const SDNode *N) {
2225 static bool classof(const SDNode *N) {
2254 static bool classof(const SDNode *N) {
2285 static bool classof(const SDNode *N) {
2310 static bool classof(const SDNode *N) {
2337 static bool classof(const SDNode *N) {
2372 static bool classof(const SDNode *N) {
2414 static bool classof(const SDNode *N) {
2434 static bool classof(const SDNode *N) {
2453 static bool classof(const SDNode *N) {
2465 class MachineSDNode : public SDNode {
2517 static bool classof(const SDNode *N) {
2523 SDNode, ptrdiff_t> {
2524 const SDNode *Node;
2527 SDNodeIterator(const SDNode *N, unsigned Op) : Node(N), Operand(Op) {}
2553 static SDNodeIterator begin(const SDNode *N) { return SDNodeIterator(N, 0); }
2554 static SDNodeIterator end (const SDNode *N) {
2559 const SDNode *getNode() const { return Node; }
2563 using NodeRef = SDNode *;
2566 static NodeRef getEntryNode(SDNode *N) { return N; }
2591 inline bool isNormalLoad(const SDNode *N) {
2598 inline bool isNON_EXTLoad(const SDNode *N) {
2604 inline bool isEXTLoad(const SDNode *N) {
2610 inline bool isSEXTLoad(const SDNode *N) {
2616 inline bool isZEXTLoad(const SDNode *N) {
2622 inline bool isUNINDEXEDLoad(const SDNode *N) {
2629 inline bool isNormalStore(const SDNode *N) {
2636 inline bool isNON_TRUNCStore(const SDNode *N) {
2641 inline bool isTRUNCStore(const SDNode *N) {
2646 inline bool isUNINDEXEDStore(const SDNode *N) {
include/llvm/CodeGen/TargetInstrInfo.h 1083 virtual bool canCopyGluedNodeDuringSchedule(SDNode *N) const { return false; }
1173 virtual bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
1174 SmallVectorImpl<SDNode *> &NewNodes) const {
1194 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
1194 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
1208 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
1208 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
1425 SDNode *DefNode, unsigned DefIdx,
1426 SDNode *UseNode, unsigned UseIdx) const;
1451 SDNode *Node) const;
include/llvm/CodeGen/TargetLowering.h 564 virtual bool shouldFoldConstantShiftPairToMask(const SDNode *N,
691 virtual Sched::Preference getSchedulingPreference(SDNode *) const {
733 virtual bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const {
1373 virtual bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
2956 virtual bool isSDNodeSourceOfDivergence(const SDNode *N,
2962 virtual bool isSDNodeAlwaysUniform(const SDNode * N) const {
2969 virtual bool getPreIndexedAddressParts(SDNode * /*N*/, SDValue &/*Base*/,
2979 virtual bool getPostIndexedAddressParts(SDNode * /*N*/, SDNode * /*Op*/,
2979 virtual bool getPostIndexedAddressParts(SDNode * /*N*/, SDNode * /*Op*/,
3020 bool isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
3272 void AddToWorklist(SDNode *N);
3273 SDValue CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo = true);
3274 SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true);
3275 SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo = true);
3277 bool recursivelyDeleteUnusedNodes(SDNode *N);
3284 bool isConstTrueVal(const SDNode *N) const;
3288 bool isConstFalseVal(const SDNode *N) const;
3305 isGAPlusOffset(SDNode *N, const GlobalValue* &GA, int64_t &Offset) const;
3320 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
3330 virtual bool isDesirableToCommuteWithShift(const SDNode *N,
3679 virtual bool isUsedByReturnOnly(SDNode *, SDValue &/*Chain*/) const {
3791 virtual void LowerOperationWrapper(SDNode *N,
3811 virtual void ReplaceNodeResults(SDNode * /*N*/,
3971 SDValue BuildSDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
3972 SmallVectorImpl<SDNode *> &Created) const;
3973 SDValue BuildUDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
3974 SmallVectorImpl<SDNode *> &Created) const;
3980 virtual SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor,
3982 SmallVectorImpl<SDNode *> &Created) const;
4060 bool expandMUL(SDNode *N, SDValue &Lo, SDValue &Hi, EVT HiLoVT,
4069 bool expandFunnelShift(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
4075 bool expandROT(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
4081 bool expandFP_TO_SINT(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
4087 bool expandFP_TO_UINT(SDNode *N, SDValue &Result, SDValue &Chain, SelectionDAG &DAG) const;
4093 bool expandUINT_TO_FP(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
4096 SDValue expandFMINNUM_FMAXNUM(SDNode *N, SelectionDAG &DAG) const;
4103 bool expandCTPOP(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
4110 bool expandCTLZ(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
4117 bool expandCTTZ(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
4125 bool expandABS(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
4166 SDValue expandAddSubSat(SDNode *Node, SelectionDAG &DAG) const;
4170 SDValue expandFixedPointMul(SDNode *Node, SelectionDAG &DAG) const;
4174 void expandUADDSUBO(SDNode *Node, SDValue &Result, SDValue &Overflow,
4179 void expandSADDSUBO(SDNode *Node, SDValue &Result, SDValue &Overflow,
4184 bool expandMULO(SDNode *Node, SDValue &Result, SDValue &Overflow,
4189 SDValue expandVecReduce(SDNode *Node, SelectionDAG &DAG) const;
4211 SDNode *Node) const;
4260 SmallVectorImpl<SDNode *> &Created) const;
4268 SmallVectorImpl<SDNode *> &Created) const;
include/llvm/Support/Casting.h 34 using SimpleType = From; // The real type this represents...
37 static SimpleType &getSimplifiedValue(From &Val) { return Val; }
41 using NonConstSimpleType = typename simplify_type<From>::SimpleType;
47 static RetType getSimplifiedValue(const From& Val) {
57 static inline bool doit(const From &Val) {
76 static inline bool doit(const From &Val) {
77 return isa_impl<To, From>::doit(Val);
90 static inline bool doit(const From *Val) {
92 return isa_impl<To, From>::doit(*Val);
104 static inline bool doit(const From *Val) {
106 return isa_impl<To, From>::doit(*Val);
141 template <class X, class Y> LLVM_NODISCARD inline bool isa(const Y &Val) {
142 return isa_impl_wrap<X, const Y,
143 typename simplify_type<const Y>::SimpleType>::doit(Val);
263 inline typename cast_retty<X, Y *>::ret_type cast(Y *Val) {
263 inline typename cast_retty<X, Y *>::ret_type cast(Y *Val) {
265 return cast_convert_val<X, Y*,
266 typename simplify_type<Y*>::SimpleType>::doit(Val);
342 LLVM_NODISCARD inline typename cast_retty<X, Y *>::ret_type dyn_cast(Y *Val) {
342 LLVM_NODISCARD inline typename cast_retty<X, Y *>::ret_type dyn_cast(Y *Val) {
366 LLVM_NODISCARD inline typename cast_retty<X, Y *>::ret_type
367 dyn_cast_or_null(Y *Val) {
include/llvm/Support/PointerLikeTypeTraits.h 56 static inline void *getAsVoidPointer(T *P) { return P; }
57 static inline T *getFromVoidPointer(void *P) { return static_cast<T *>(P); }
59 enum { NumLowBitsAvailable = detail::ConstantLog2<alignof(T)>::value };
91 typedef PointerLikeTypeTraits<T *> NonConst;
93 static inline const void *getAsVoidPointer(const T *P) {
96 static inline const T *getFromVoidPointer(const void *P) {
include/llvm/Support/Recycler.h 83 SubClass *Allocate(AllocatorType &Allocator) {
84 static_assert(alignof(SubClass) <= Align,
86 static_assert(sizeof(SubClass) <= Size,
93 T *Allocate(AllocatorType &Allocator) {
93 T *Allocate(AllocatorType &Allocator) {
98 void Deallocate(AllocatorType & /*Allocator*/, SubClass* Element) {
include/llvm/Support/RecyclingAllocator.h 30 Recycler<T, Size, Align> Base;
43 SubClass *Allocate() { return Base.template Allocate<SubClass>(Allocator); }
43 SubClass *Allocate() { return Base.template Allocate<SubClass>(Allocator); }
45 T *Allocate() { return Base.Allocate(Allocator); }
51 void Deallocate(SubClass* E) { return Base.Deallocate(Allocator, E); }
include/llvm/Support/type_traits.h 55 struct add_const_past_pointer { using type = const T; };
lib/CodeGen/ScheduleDAG.cpp 70 const MCInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const {
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 145 SmallVector<SDNode *, 64> Worklist;
152 DenseMap<SDNode *, unsigned> WorklistMap;
156 SmallSetVector<SDNode *, 32> PruningList;
162 SmallPtrSet<SDNode *, 32> CombinedNodes;
170 DenseMap<SDNode *, std::pair<SDNode *, unsigned>> StoreRootCountMap;
170 DenseMap<SDNode *, std::pair<SDNode *, unsigned>> StoreRootCountMap;
177 void AddUsersToWorklist(SDNode *N) {
178 for (SDNode *Node : N->uses())
188 auto *N = PruningList.pop_back_val();
194 SDNode *getNextWorklistEntry() {
197 SDNode *N = nullptr;
214 SDValue visit(SDNode *N);
230 void ConsiderForPruning(SDNode *N) {
237 void AddToWorklist(SDNode *N) {
253 void removeFromWorklist(SDNode *N) {
267 void deleteAndRecombine(SDNode *N);
268 bool recursivelyDeleteUnusedNodes(SDNode *N);
271 SDValue CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
275 SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true) {
280 SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1,
321 bool CombineToPreIndexedLoadStore(SDNode *N);
322 bool CombineToPostIndexedLoadStore(SDNode *N);
324 bool SliceUpLoad(SDNode *N);
339 SDValue scalarizeExtractedVectorLoad(SDNode *EVE, EVT InVecVT,
342 void ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad);
342 void ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad);
354 SDValue combine(SDNode *N);
363 SDValue visitTokenFactor(SDNode *N);
364 SDValue visitMERGE_VALUES(SDNode *N);
365 SDValue visitADD(SDNode *N);
366 SDValue visitADDLike(SDNode *N);
367 SDValue visitADDLikeCommutative(SDValue N0, SDValue N1, SDNode *LocReference);
368 SDValue visitSUB(SDNode *N);
369 SDValue visitADDSAT(SDNode *N);
370 SDValue visitSUBSAT(SDNode *N);
371 SDValue visitADDC(SDNode *N);
372 SDValue visitADDO(SDNode *N);
373 SDValue visitUADDOLike(SDValue N0, SDValue N1, SDNode *N);
374 SDValue visitSUBC(SDNode *N);
375 SDValue visitSUBO(SDNode *N);
376 SDValue visitADDE(SDNode *N);
377 SDValue visitADDCARRY(SDNode *N);
378 SDValue visitADDCARRYLike(SDValue N0, SDValue N1, SDValue CarryIn, SDNode *N);
379 SDValue visitSUBE(SDNode *N);
380 SDValue visitSUBCARRY(SDNode *N);
381 SDValue visitMUL(SDNode *N);
382 SDValue visitMULFIX(SDNode *N);
383 SDValue useDivRem(SDNode *N);
384 SDValue visitSDIV(SDNode *N);
385 SDValue visitSDIVLike(SDValue N0, SDValue N1, SDNode *N);
386 SDValue visitUDIV(SDNode *N);
387 SDValue visitUDIVLike(SDValue N0, SDValue N1, SDNode *N);
388 SDValue visitREM(SDNode *N);
389 SDValue visitMULHU(SDNode *N);
390 SDValue visitMULHS(SDNode *N);
391 SDValue visitSMUL_LOHI(SDNode *N);
392 SDValue visitUMUL_LOHI(SDNode *N);
393 SDValue visitMULO(SDNode *N);
394 SDValue visitIMINMAX(SDNode *N);
395 SDValue visitAND(SDNode *N);
396 SDValue visitANDLike(SDValue N0, SDValue N1, SDNode *N);
397 SDValue visitOR(SDNode *N);
398 SDValue visitORLike(SDValue N0, SDValue N1, SDNode *N);
399 SDValue visitXOR(SDNode *N);
400 SDValue SimplifyVBinOp(SDNode *N);
401 SDValue visitSHL(SDNode *N);
402 SDValue visitSRA(SDNode *N);
403 SDValue visitSRL(SDNode *N);
404 SDValue visitFunnelShift(SDNode *N);
405 SDValue visitRotate(SDNode *N);
406 SDValue visitABS(SDNode *N);
407 SDValue visitBSWAP(SDNode *N);
408 SDValue visitBITREVERSE(SDNode *N);
409 SDValue visitCTLZ(SDNode *N);
410 SDValue visitCTLZ_ZERO_UNDEF(SDNode *N);
411 SDValue visitCTTZ(SDNode *N);
412 SDValue visitCTTZ_ZERO_UNDEF(SDNode *N);
413 SDValue visitCTPOP(SDNode *N);
414 SDValue visitSELECT(SDNode *N);
415 SDValue visitVSELECT(SDNode *N);
416 SDValue visitSELECT_CC(SDNode *N);
417 SDValue visitSETCC(SDNode *N);
418 SDValue visitSETCCCARRY(SDNode *N);
419 SDValue visitSIGN_EXTEND(SDNode *N);
420 SDValue visitZERO_EXTEND(SDNode *N);
421 SDValue visitANY_EXTEND(SDNode *N);
422 SDValue visitAssertExt(SDNode *N);
423 SDValue visitSIGN_EXTEND_INREG(SDNode *N);
424 SDValue visitSIGN_EXTEND_VECTOR_INREG(SDNode *N);
425 SDValue visitZERO_EXTEND_VECTOR_INREG(SDNode *N);
426 SDValue visitTRUNCATE(SDNode *N);
427 SDValue visitBITCAST(SDNode *N);
428 SDValue visitBUILD_PAIR(SDNode *N);
429 SDValue visitFADD(SDNode *N);
430 SDValue visitFSUB(SDNode *N);
431 SDValue visitFMUL(SDNode *N);
432 SDValue visitFMA(SDNode *N);
433 SDValue visitFDIV(SDNode *N);
434 SDValue visitFREM(SDNode *N);
435 SDValue visitFSQRT(SDNode *N);
436 SDValue visitFCOPYSIGN(SDNode *N);
437 SDValue visitFPOW(SDNode *N);
438 SDValue visitSINT_TO_FP(SDNode *N);
439 SDValue visitUINT_TO_FP(SDNode *N);
440 SDValue visitFP_TO_SINT(SDNode *N);
441 SDValue visitFP_TO_UINT(SDNode *N);
442 SDValue visitFP_ROUND(SDNode *N);
443 SDValue visitFP_EXTEND(SDNode *N);
444 SDValue visitFNEG(SDNode *N);
445 SDValue visitFABS(SDNode *N);
446 SDValue visitFCEIL(SDNode *N);
447 SDValue visitFTRUNC(SDNode *N);
448 SDValue visitFFLOOR(SDNode *N);
449 SDValue visitFMINNUM(SDNode *N);
450 SDValue visitFMAXNUM(SDNode *N);
451 SDValue visitFMINIMUM(SDNode *N);
452 SDValue visitFMAXIMUM(SDNode *N);
453 SDValue visitBRCOND(SDNode *N);
454 SDValue visitBR_CC(SDNode *N);
455 SDValue visitLOAD(SDNode *N);
460 SDValue visitSTORE(SDNode *N);
461 SDValue visitLIFETIME_END(SDNode *N);
462 SDValue visitINSERT_VECTOR_ELT(SDNode *N);
463 SDValue visitEXTRACT_VECTOR_ELT(SDNode *N);
464 SDValue visitBUILD_VECTOR(SDNode *N);
465 SDValue visitCONCAT_VECTORS(SDNode *N);
466 SDValue visitEXTRACT_SUBVECTOR(SDNode *N);
467 SDValue visitVECTOR_SHUFFLE(SDNode *N);
468 SDValue visitSCALAR_TO_VECTOR(SDNode *N);
469 SDValue visitINSERT_SUBVECTOR(SDNode *N);
470 SDValue visitMLOAD(SDNode *N);
471 SDValue visitMSTORE(SDNode *N);
472 SDValue visitMGATHER(SDNode *N);
473 SDValue visitMSCATTER(SDNode *N);
474 SDValue visitFP_TO_FP16(SDNode *N);
475 SDValue visitFP16_TO_FP(SDNode *N);
476 SDValue visitVECREDUCE(SDNode *N);
478 SDValue visitFADDForFMACombine(SDNode *N);
479 SDValue visitFSUBForFMACombine(SDNode *N);
480 SDValue visitFMULForFMADistributiveCombine(SDNode *N);
482 SDValue XformToShuffleWithZero(SDNode *N);
491 SDValue visitShiftByConstant(SDNode *N);
493 SDValue foldSelectOfConstants(SDNode *N);
494 SDValue foldVSelectOfConstants(SDNode *N);
495 SDValue foldBinOpIntoSelect(SDNode *BO);
496 bool SimplifySelectOps(SDNode *SELECT, SDValue LHS, SDValue RHS);
497 SDValue hoistLogicOpWithSameOpcodeHands(SDNode *N);
509 SDValue unfoldMaskedMerge(SDNode *N);
510 SDValue unfoldExtremeBitClearingToShifts(SDNode *N);
520 SDValue SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp,
522 SDValue CombineConsecutiveLoads(SDNode *N, EVT VT);
523 SDValue CombineExtLoad(SDNode *N);
524 SDValue CombineZExtLogicopShiftLoad(SDNode *N);
525 SDValue combineRepeatedFPDivisors(SDNode *N);
526 SDValue combineInsertEltToShuffle(SDNode *N, unsigned InsIndex);
527 SDValue ConstantFoldBITCASTofBUILD_VECTOR(SDNode *, EVT);
528 SDValue BuildSDIV(SDNode *N);
529 SDValue BuildSDIVPow2(SDNode *N);
530 SDValue BuildUDIV(SDNode *N);
540 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
542 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
548 SDValue MatchLoadCombine(SDNode *N);
550 SDValue ReduceLoadWidth(SDNode *N);
551 SDValue ReduceLoadOpStoreWidth(SDNode *N);
553 SDValue TransformFPLoadStorePair(SDNode *N);
554 SDValue convertBuildVecZextToZext(SDNode *N);
555 SDValue reduceBuildVecExtToExtBuildVec(SDNode *N);
556 SDValue reduceBuildVecToShuffle(SDNode *N);
557 SDValue createBuildVecShuffle(const SDLoc &DL, SDNode *N,
561 SDValue matchVSelectOpSizesWithSetCC(SDNode *Cast);
565 void GatherAllAliases(SDNode *N, SDValue OriginalChain,
569 bool isAlias(SDNode *Op0, SDNode *Op1) const;
569 bool isAlias(SDNode *Op0, SDNode *Op1) const;
573 SDValue FindBetterChain(SDNode *N, SDValue Chain);
604 bool isMulAddWithConstProfitable(SDNode *MulNode,
620 bool SearchForAndLoads(SDNode *N, SmallVectorImpl<LoadSDNode*> &Loads,
621 SmallPtrSetImpl<SDNode*> &NodesWithConsts,
622 ConstantSDNode *Mask, SDNode *&NodeToMask);
625 bool BackwardsPropagateMask(SDNode *N, SelectionDAG &DAG);
648 SDNode *&Root);
657 SDNode *RootNode);
671 SDValue distributeTruncateThroughAnd(SDNode *N);
708 void ExtendSetCCUses(const SmallVectorImpl<SDNode *> &SetCCs,
722 void NodeDeleted(SDNode *N, SDNode *E) override {
722 void NodeDeleted(SDNode *N, SDNode *E) override {
736 void NodeInserted(SDNode *N) override { DC.ConsiderForPruning(N); }
745 void TargetLowering::DAGCombinerInfo::AddToWorklist(SDNode *N) {
750 CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo) {
755 CombineTo(SDNode *N, SDValue Res, bool AddTo) {
760 CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo) {
765 recursivelyDeleteUnusedNodes(SDNode *N) {
778 void DAGCombiner::deleteAndRecombine(SDNode *N) {
843 static SDNode *isConstantFPBuildVectorOrConstantFP(SDValue N) {
911 for (SDNode *Node : N0->uses()) {
949 if (SDNode *C1 = DAG.isConstantIntBuildVectorOrConstantInt(N0.getOperand(1))) {
950 if (SDNode *C2 = DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
989 SDValue DAGCombiner::CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
1086 void DAGCombiner::ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad) {
1086 void DAGCombiner::ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad) {
1337 SDNode *N = Op.getNode();
1365 bool DAGCombiner::recursivelyDeleteUnusedNodes(SDNode *N) {
1369 SmallSetVector<SDNode *, 16> Nodes;
1402 for (SDNode &Node : DAG.allnodes())
1411 while (SDNode *N = getNextWorklistEntry()) {
1423 SmallSetVector<SDNode *, 16> UpdatedNodes;
1426 for (SDNode *LN : UpdatedNodes) {
1488 SDValue DAGCombiner::visit(SDNode *N) {
1622 SDValue DAGCombiner::combine(SDNode *N) {
1680 SDNode *CSENode = DAG.getNodeIfExists(N->getOpcode(), N->getVTList(), Ops,
1692 static SDValue getInputChainForNode(SDNode *N) {
1705 SDValue DAGCombiner::visitTokenFactor(SDNode *N) {
1725 SmallVector<SDNode *, 8> TFs; // List of token factors to visit.
1727 SmallPtrSet<SDNode*, 16> SeenOps;
1748 SDNode *TF = TFs[i];
1790 SmallVector<std::pair<SDNode *, unsigned>, 8> Worklist;
1792 SmallPtrSet<SDNode *, 16> SeenChains;
1890 SDValue DAGCombiner::visitMERGE_VALUES(SDNode *N) {
1916 SDValue DAGCombiner::foldBinOpIntoSelect(SDNode *BO) {
1994 static SDValue foldAddSubBoolOfMaskedVal(SDNode *N, SelectionDAG &DAG) {
2035 static SDValue foldAddSubOfSignBit(SDNode *N, SelectionDAG &DAG) {
2074 SDValue DAGCombiner::visitADDLike(SDNode *N) {
2292 SDValue DAGCombiner::visitADD(SDNode *N) {
2315 SDValue DAGCombiner::visitADDSAT(SDNode *N) {
2419 SDNode *LocReference) {
2497 SDValue DAGCombiner::visitADDC(SDNode *N) {
2587 SDValue DAGCombiner::visitADDO(SDNode *N) {
2634 SDValue DAGCombiner::visitUADDOLike(SDValue N0, SDValue N1, SDNode *N) {
2658 SDValue DAGCombiner::visitADDE(SDNode *N) {
2677 SDValue DAGCombiner::visitADDCARRY(SDNode *N) {
2740 SDNode *N) {
2804 SDNode *N) {
2853 SDValue DAGCombiner::visitSUB(SDNode *N) {
3162 SDValue DAGCombiner::visitSUBSAT(SDNode *N) {
3199 SDValue DAGCombiner::visitSUBC(SDNode *N) {
3227 SDValue DAGCombiner::visitSUBO(SDNode *N) {
3266 SDValue DAGCombiner::visitSUBE(SDNode *N) {
3278 SDValue DAGCombiner::visitSUBCARRY(SDNode *N) {
3295 SDValue DAGCombiner::visitMULFIX(SDNode *N) {
3317 SDValue DAGCombiner::visitMUL(SDNode *N) {
3488 static bool isDivRemLibcallAvailable(SDNode *Node, bool isSigned,
3507 SDValue DAGCombiner::useDivRem(SDNode *Node) {
3544 for (SDNode::use_iterator UI = Op0.getNode()->use_begin(),
3546 SDNode *User = *UI;
3577 static SDValue simplifyDivRem(SDNode *N, SelectionDAG &DAG) {
3623 SDValue DAGCombiner::visitSDIV(SDNode *N) {
3664 if (SDNode *RemNode = DAG.getNodeIfExists(ISD::SREM, N->getVTList(),
3686 SDValue DAGCombiner::visitSDIVLike(SDValue N0, SDValue N1, SDNode *N) {
3767 SDValue DAGCombiner::visitUDIV(SDNode *N) {
3802 if (SDNode *RemNode = DAG.getNodeIfExists(ISD::UREM, N->getVTList(),
3824 SDValue DAGCombiner::visitUDIVLike(SDValue N0, SDValue N1, SDNode *N) {
3868 SDValue DAGCombiner::visitREM(SDNode *N) {
3932 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(),
3950 SDValue DAGCombiner::visitMULHS(SDNode *N) {
3997 SDValue DAGCombiner::visitMULHU(SDNode *N) {
4056 SDValue DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp,
4102 SDValue DAGCombiner::visitSMUL_LOHI(SDNode *N) {
4133 SDValue DAGCombiner::visitUMUL_LOHI(SDNode *N) {
4176 SDValue DAGCombiner::visitMULO(SDNode *N) {
4204 SDValue DAGCombiner::visitIMINMAX(SDNode *N) {
4249 SDValue DAGCombiner::hoistLogicOpWithSameOpcodeHands(SDNode *N) {
4562 SDValue DAGCombiner::visitANDLike(SDValue N0, SDValue N1, SDNode *N) {
4770 bool DAGCombiner::SearchForAndLoads(SDNode *N,
4772 SmallPtrSetImpl<SDNode*> &NodesWithConsts,
4774 SDNode *&NodeToMask) {
4859 bool DAGCombiner::BackwardsPropagateMask(SDNode *N, SelectionDAG &DAG) {
4872 SmallPtrSet<SDNode*, 2> NodesWithConsts;
4873 SDNode *FixupNode = nullptr;
4894 for (auto *LogicN : NodesWithConsts) {
4932 SDValue DAGCombiner::unfoldExtremeBitClearingToShifts(SDNode *N) {
4984 static SDValue combineShiftAnd1ToBitTest(SDNode *And, SelectionDAG &DAG) {
5034 SDValue DAGCombiner::visitAND(SDNode *N) {
5325 SDValue DAGCombiner::MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
5443 static bool isBSwapHWordElement(SDValue N, MutableArrayRef<SDNode *> Parts) {
5528 static bool isBSwapHWordPair(SDValue N, MutableArrayRef<SDNode *> Parts) {
5550 SDValue DAGCombiner::MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1) {
5564 SDNode *Parts[4] = {};
5604 SDValue DAGCombiner::visitORLike(SDValue N0, SDValue N1, SDNode *N) {
5657 SelectionDAG &DAG, SDValue N0, SDValue N1, SDNode *N) {
5672 SDValue DAGCombiner::visitOR(SDNode *N) {
6648 SDValue DAGCombiner::MatchLoadCombine(SDNode *N) {
6787 SDValue DAGCombiner::unfoldMaskedMerge(SDNode *N) {
6856 SDValue DAGCombiner::visitXOR(SDNode *N) {
7061 static SDValue combineShiftOfShiftedLogic(SDNode *Shift, SelectionDAG &DAG) {
7129 SDValue DAGCombiner::visitShiftByConstant(SDNode *N) {
7200 SDValue DAGCombiner::distributeTruncateThroughAnd(SDNode *N) {
7223 SDValue DAGCombiner::visitRotate(SDNode *N) {
7261 SDNode *C1 = DAG.isConstantIntBuildVectorOrConstantInt(N1);
7262 SDNode *C2 = DAG.isConstantIntBuildVectorOrConstantInt(N0.getOperand(1));
7281 SDValue DAGCombiner::visitSHL(SDNode *N) {
7531 SDValue DAGCombiner::visitSRA(SDNode *N) {
7722 SDValue DAGCombiner::visitSRL(SDNode *N) {
7922 SDNode *Use = *N->use_begin();
7936 SDValue DAGCombiner::visitFunnelShift(SDNode *N) {
8011 SDValue DAGCombiner::visitABS(SDNode *N) {
8027 SDValue DAGCombiner::visitBSWAP(SDNode *N) {
8040 SDValue DAGCombiner::visitBITREVERSE(SDNode *N) {
8053 SDValue DAGCombiner::visitCTLZ(SDNode *N) {
8070 SDValue DAGCombiner::visitCTLZ_ZERO_UNDEF(SDNode *N) {
8080 SDValue DAGCombiner::visitCTTZ(SDNode *N) {
8097 SDValue DAGCombiner::visitCTTZ_ZERO_UNDEF(SDNode *N) {
8107 SDValue DAGCombiner::visitCTPOP(SDNode *N) {
8180 static SDValue foldSelectOfConstantsUsingSra(SDNode *N, SelectionDAG &DAG) {
8215 SDValue DAGCombiner::foldSelectOfConstants(SDNode *N) {
8323 SDValue DAGCombiner::visitSELECT(SDNode *N) {
8512 static SDValue ConvertSelectToConcatVector(SDNode *N, SelectionDAG &DAG) {
8565 SDValue DAGCombiner::visitMSCATTER(SDNode *N) {
8578 SDValue DAGCombiner::visitMSTORE(SDNode *N) {
8591 SDValue DAGCombiner::visitMGATHER(SDNode *N) {
8603 SDValue DAGCombiner::visitMLOAD(SDNode *N) {
8617 SDValue DAGCombiner::foldVSelectOfConstants(SDNode *N) {
8678 SDValue DAGCombiner::visitVSELECT(SDNode *N) {
8793 SDValue DAGCombiner::visitSELECT_CC(SDNode *N) {
8837 SDValue DAGCombiner::visitSETCC(SDNode *N) {
8867 SDValue DAGCombiner::visitSETCCCARRY(SDNode *N) {
8886 static SDValue tryToFoldExtendOfConstant(SDNode *N, const TargetLowering &TLI,
8973 static bool ExtendUsesToFormExtLoad(EVT VT, SDNode *N, SDValue N0,
8975 SmallVectorImpl<SDNode *> &ExtendNodes,
8979 for (SDNode::use_iterator UI = N0.getNode()->use_begin(),
8982 SDNode *User = *UI;
9017 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
9033 void DAGCombiner::ExtendSetCCUses(const SmallVectorImpl<SDNode *> &SetCCs,
9038 for (SDNode *SetCC : SetCCs) {
9055 SDValue DAGCombiner::CombineExtLoad(SDNode *N) {
9092 SmallVector<SDNode *, 4> SetCCs;
9156 SDValue DAGCombiner::CombineZExtLogicopShiftLoad(SDNode *N) {
9196 SmallVector<SDNode*, 4> SetCCs;
9236 SDValue DAGCombiner::matchVSelectOpSizesWithSetCC(SDNode *Cast) {
9281 bool LegalOperations, SDNode *N,
9283 SDNode *N0Node = N0.getNode();
9312 bool LegalOperations, SDNode *N, SDValue N0,
9323 SmallVector<SDNode *, 4> SetCCs;
9352 SDNode *N, SDValue N0,
9379 static SDValue foldExtendedSignBitTest(SDNode *N, SelectionDAG &DAG,
9410 SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
9427 SDNode *oye = N0.getOperand(0).getNode();
9505 SmallVector<SDNode*, 4> SetCCs;
9679 static SDValue widenCtPop(SDNode *Extend, SelectionDAG &DAG) {
9699 SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
9734 SDNode *oye = N0.getOperand(0).getNode();
9819 SmallVector<SDNode*, 4> SetCCs;
9955 SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) {
9974 SDNode *oye = N0.getOperand(0).getNode();
10012 SmallVector<SDNode*, 4> SetCCs;
10104 SDValue DAGCombiner::visitAssertExt(SDNode *N) {
10165 SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) {
10257 SDNode *Mask = *(SRL->use_begin());
10371 SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
10505 SDValue DAGCombiner::visitSIGN_EXTEND_VECTOR_INREG(SDNode *N) {
10521 SDValue DAGCombiner::visitZERO_EXTEND_VECTOR_INREG(SDNode *N) {
10537 SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
10850 static SDNode *getBuildPairElt(SDNode *N, unsigned i) {
10850 static SDNode *getBuildPairElt(SDNode *N, unsigned i) {
10859 SDValue DAGCombiner::CombineConsecutiveLoads(SDNode *N, EVT VT) {
10897 static SDValue foldBitcastedFPLogic(SDNode *N, SelectionDAG &DAG,
10950 SDValue DAGCombiner::visitBITCAST(SDNode *N) {
11198 SDValue DAGCombiner::visitBUILD_PAIR(SDNode *N) {
11206 ConstantFoldBITCASTofBUILD_VECTOR(SDNode *BV, EVT DstEltVT) {
11247 SDNode *Tmp = ConstantFoldBITCASTofBUILD_VECTOR(BV, TmpVT).getNode();
11318 static bool isContractable(SDNode *N) {
11324 SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) {
11536 SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) {
11827 SDValue DAGCombiner::visitFMULForFMADistributiveCombine(SDNode *N) {
11919 SDValue DAGCombiner::visitFADD(SDNode *N) {
12098 SDValue DAGCombiner::visitFSUB(SDNode *N) {
12190 SDValue DAGCombiner::visitFMUL(SDNode *N) {
12324 SDValue DAGCombiner::visitFMA(SDNode *N) {
12446 SDValue DAGCombiner::combineRepeatedFPDivisors(SDNode *N) {
12478 SetVector<SDNode *> Users;
12479 for (auto *U : N1->uses()) {
12498 for (auto *U : Users) {
12513 SDValue DAGCombiner::visitFDIV(SDNode *N) {
12617 SDValue DAGCombiner::visitFREM(SDNode *N) {
12634 SDValue DAGCombiner::visitFSQRT(SDNode *N) {
12650 static inline bool CanCombineFCOPYSIGN_EXTEND_ROUND(SDNode *N) {
12665 SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
12712 SDValue DAGCombiner::visitFPOW(SDNode *N) {
12788 static SDValue foldFPToIntToFP(SDNode *N, SelectionDAG &DAG,
12823 SDValue DAGCombiner::visitSINT_TO_FP(SDNode *N) {
12884 SDValue DAGCombiner::visitUINT_TO_FP(SDNode *N) {
12931 static SDValue FoldIntToFPToInt(SDNode *N, SelectionDAG &DAG) {
12972 SDValue DAGCombiner::visitFP_TO_SINT(SDNode *N) {
12987 SDValue DAGCombiner::visitFP_TO_UINT(SDNode *N) {
13002 SDValue DAGCombiner::visitFP_ROUND(SDNode *N) {
13058 SDValue DAGCombiner::visitFP_EXTEND(SDNode *N) {
13111 SDValue DAGCombiner::visitFCEIL(SDNode *N) {
13122 SDValue DAGCombiner::visitFTRUNC(SDNode *N) {
13146 SDValue DAGCombiner::visitFFLOOR(SDNode *N) {
13158 SDValue DAGCombiner::visitFNEG(SDNode *N) {
13215 static SDValue visitFMinMax(SelectionDAG &DAG, SDNode *N,
13237 SDValue DAGCombiner::visitFMINNUM(SDNode *N) {
13241 SDValue DAGCombiner::visitFMAXNUM(SDNode *N) {
13245 SDValue DAGCombiner::visitFMINIMUM(SDNode *N) {
13249 SDValue DAGCombiner::visitFMAXIMUM(SDNode *N) {
13253 SDValue DAGCombiner::visitFABS(SDNode *N) {
13296 SDValue DAGCombiner::visitBRCOND(SDNode *N) {
13396 SDNode *TheXor = N.getNode();
13423 SDValue DAGCombiner::visitBR_CC(SDNode *N) {
13451 static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
13451 static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
13501 bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) {
13582 SmallPtrSet<const SDNode *, 32> Visited;
13583 SmallVector<const SDNode *, 16> Worklist;
13589 SmallVector<SDNode *, 16> OtherUses;
13591 for (SDNode::use_iterator UI = BasePtr.getNode()->use_begin(),
13600 if (SDNode::hasPredecessorHelper(Use.getUser(), Visited, Worklist))
13630 for (SDNode *Use : Ptr.getNode()->uses()) {
13633 if (SDNode::hasPredecessorHelper(Use, Visited, Worklist))
13732 bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) {
13763 for (SDNode *Op : Ptr.getNode()->uses()) {
13788 for (SDNode *Use : BasePtr.getNode()->uses()) {
13796 for (SDNode *UseUse : Use->uses()) {
13812 SmallPtrSet<const SDNode *, 32> Visited;
13813 SmallVector<const SDNode *, 8> Worklist;
13818 if (!SDNode::hasPredecessorHelper(N, Visited, Worklist) &&
13819 !SDNode::hasPredecessorHelper(Op, Visited, Worklist)) {
14029 SDValue DAGCombiner::visitLOAD(SDNode *N) {
14250 SDNode *Inst;
14262 LoadedSlice(SDNode *Inst = nullptr, LoadSDNode *Origin = nullptr,
14420 SDNode *Use = *Inst->use_begin();
14604 bool DAGCombiner::SliceUpLoad(SDNode *N) {
14622 for (SDNode::use_iterator UI = LD->use_begin(), UIEnd = LD->use_end();
14628 SDNode *User = *UI;
14838 SDValue DAGCombiner::ReduceLoadOpStoreWidth(SDNode *N) {
14963 SDValue DAGCombiner::TransformFPLoadStorePair(SDNode *N) {
15024 bool DAGCombiner::isMulAddWithConstProfitable(SDNode *MulNode,
15034 for (SDNode *Use : ConstNode->uses()) {
15039 SDNode *OtherOp;
15040 SDNode *MulVar = AddNode.getOperand(0).getNode();
15088 SmallPtrSet<const SDNode *, 8> Visited;
15264 SDNode *&RootNode) {
15423 SDNode *RootNode) {
15429 SmallPtrSet<const SDNode *, 32> Visited;
15430 SmallVector<const SDNode *, 8> Worklist;
15451 SDNode *N = StoreNodes[i].MemNode;
15468 if (SDNode::hasPredecessorHelper(StoreNodes[i].MemNode, Visited, Worklist,
15522 SDNode *RootNode;
16123 SDValue DAGCombiner::visitSTORE(SDNode *N) {
16277 SDNode *NewST1 = DAG.UpdateNodeOperands(
16336 SDValue DAGCombiner::visitLIFETIME_END(SDNode *N) {
16497 SDValue DAGCombiner::combineInsertEltToShuffle(SDNode *N, unsigned InsIndex) {
16590 SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {
16673 SDValue DAGCombiner::scalarizeExtractedVectorLoad(SDNode *EVE, EVT InVecVT,
16761 static SDValue scalarizeExtractedBinop(SDNode *ExtElt, SelectionDAG &DAG,
16794 SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
16942 for (SDNode *Use : VecOp->uses()) {
17054 SDValue DAGCombiner::reduceBuildVecExtToExtBuildVec(SDNode *N) {
17166 SDValue DAGCombiner::createBuildVecShuffle(const SDLoc &DL, SDNode *N,
17282 static SDValue reduceBuildVecToShuffleWithZero(SDNode *BV, SelectionDAG &DAG) {
17362 SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) {
17577 SDValue DAGCombiner::convertBuildVecZextToZext(SDNode *N) {
17624 SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
17705 static SDValue combineConcatVectorOfScalars(SDNode *N, SelectionDAG &DAG) {
17770 static SDValue combineConcatVectorOfExtracts(SDNode *N, SelectionDAG &DAG) {
17842 SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
18034 static SDValue narrowInsertExtractVectorBinOp(SDNode *Extract,
18070 static SDValue narrowExtractedVectorBinOp(SDNode *Extract, SelectionDAG &DAG) {
18189 static SDValue narrowExtractedVectorLoad(SDNode *Extract, SelectionDAG &DAG) {
18222 SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode *N) {
18410 static SDValue partitionShuffleOfConcats(SDNode *N, SelectionDAG &DAG) {
18844 SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
18921 SDNode *V = N0.getNode();
19191 SDValue DAGCombiner::visitSCALAR_TO_VECTOR(SDNode *N) {
19242 SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
19386 SDValue DAGCombiner::visitFP_TO_FP16(SDNode *N) {
19396 SDValue DAGCombiner::visitFP16_TO_FP(SDNode *N) {
19411 SDValue DAGCombiner::visitVECREDUCE(SDNode *N) {
19445 SDValue DAGCombiner::XformToShuffleWithZero(SDNode *N) {
19534 static SDValue scalarizeBinOpOfSplats(SDNode *N, SelectionDAG &DAG) {
19580 SDValue DAGCombiner::SimplifyVBinOp(SDNode *N) {
19716 bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS,
19806 SmallPtrSet<const SDNode *, 32> Visited;
19807 SmallVector<const SDNode *, 16> Worklist;
19816 if (SDNode::hasPredecessorHelper(LLD, Visited, Worklist) ||
19817 SDNode::hasPredecessorHelper(RLD, Visited, Worklist))
19827 SDNode *CondNode = TheSelect->getOperand(0).getNode();
19831 SDNode::hasPredecessorHelper(LLD, Visited, Worklist)) ||
19833 SDNode::hasPredecessorHelper(RLD, Visited, Worklist)))
19847 SDNode *CondLHS = TheSelect->getOperand(0).getNode();
19848 SDNode *CondRHS = TheSelect->getOperand(1).getNode();
19853 SDNode::hasPredecessorHelper(LLD, Visited, Worklist)) ||
19855 SDNode::hasPredecessorHelper(RLD, Visited, Worklist)))
20189 SDValue DAGCombiner::BuildSDIV(SDNode *N) {
20195 SmallVector<SDNode *, 8> Built;
20197 for (SDNode *N : Built)
20207 SDValue DAGCombiner::BuildSDIVPow2(SDNode *N) {
20216 SmallVector<SDNode *, 8> Built;
20218 for (SDNode *N : Built)
20230 SDValue DAGCombiner::BuildUDIV(SDNode *N) {
20236 SmallVector<SDNode *, 8> Built;
20238 for (SDNode *N : Built)
20475 bool DAGCombiner::isAlias(SDNode *Op0, SDNode *Op1) const {
20475 bool DAGCombiner::isAlias(SDNode *Op0, SDNode *Op1) const {
20604 void DAGCombiner::GatherAllAliases(SDNode *N, SDValue OriginalChain,
20607 SmallPtrSet<SDNode *, 16> Visited; // Visited node set.
20711 SDValue DAGCombiner::FindBetterChain(SDNode *N, SDValue OldChain) {
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 44 unsigned InstrEmitter::CountResults(SDNode *Node) {
60 static unsigned countOperands(SDNode *Node, unsigned NumExpUses,
86 EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, bool IsCloned,
111 for (SDNode *User : Node->uses()) {
189 void InstrEmitter::CreateVirtualRegisters(SDNode *Node,
227 for (SDNode *User : Node->uses()) {
475 void InstrEmitter::EmitSubregNode(SDNode *Node,
483 for (SDNode *User : Node->uses()) {
608 InstrEmitter::EmitCopyToRegClassNode(SDNode *Node,
628 void InstrEmitter::EmitRegSequence(SDNode *Node,
715 SDNode *Node = SD->getSDNode();
782 EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
945 for (SDNode *F = Node->getGluedUser(); F; F = F->getGluedUser()) {
980 EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
lib/CodeGen/SelectionDAG/InstrEmitter.h 40 void EmitCopyFromReg(SDNode *Node, unsigned ResNo,
45 void CreateVirtualRegisters(SDNode *Node,
85 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
92 void EmitCopyToRegClassNode(SDNode *Node,
97 void EmitRegSequence(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
103 static unsigned CountResults(SDNode *Node);
115 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
134 void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
136 void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 92 SmallPtrSetImpl<SDNode *> &LegalizedNodes;
95 SmallSetVector<SDNode *, 16> *UpdatedNodes;
105 SmallPtrSetImpl<SDNode *> &LegalizedNodes,
106 SmallSetVector<SDNode *, 16> *UpdatedNodes = nullptr)
111 void LegalizeOp(SDNode *Node);
116 void LegalizeLoadOps(SDNode *Node);
117 void LegalizeStoreOps(SDNode *Node);
139 SDValue ExpandLibCall(RTLIB::Libcall LC, SDNode *Node, bool isSigned);
142 SDNode *Node, bool isSigned);
143 SDValue ExpandFPLibCall(SDNode *Node, RTLIB::Libcall Call_F32,
147 SDValue ExpandIntLibCall(SDNode *Node, bool isSigned,
153 SDValue ExpandArgFPLibCall(SDNode *Node,
157 void ExpandDivRemLibCall(SDNode *Node, SmallVectorImpl<SDValue> &Results);
158 void ExpandSinCosLibCall(SDNode *Node, SmallVectorImpl<SDValue> &Results);
164 SDValue ExpandBUILD_VECTOR(SDNode *Node);
165 SDValue ExpandSPLAT_VECTOR(SDNode *Node);
166 SDValue ExpandSCALAR_TO_VECTOR(SDNode *Node);
167 void ExpandDYNAMIC_STACKALLOC(SDNode *Node,
173 SDValue ExpandFCOPYSIGN(SDNode *Node) const;
174 SDValue ExpandFABS(SDNode *Node) const;
187 SDValue ExpandVectorBuildThroughStack(SDNode* Node);
193 bool ExpandNode(SDNode *Node);
194 void ConvertNodeToLibcall(SDNode *Node);
195 void PromoteNode(SDNode *Node);
200 void ReplacedNode(SDNode *N) {
206 void ReplaceNode(SDNode *Old, SDNode *New) {
206 void ReplaceNode(SDNode *Old, SDNode *New) {
229 void ReplaceNode(SDNode *Old, const SDValue *New) {
482 void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
494 if (SDNode *OptStore = OptimizeFloatStore(ST).getNode()) {
663 void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
963 void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
1168 SDNode *NewNode = Node;
1291 SmallPtrSet<const SDNode *, 32> Visited;
1292 SmallVector<const SDNode *, 16> Worklist;
1296 for (SDNode::use_iterator UI = Vec.getNode()->use_begin(),
1298 SDNode *User = *UI;
1314 if (SDNode::hasPredecessorHelper(ST, Visited, Worklist) ||
1386 SDValue SelectionDAGLegalize::ExpandVectorBuildThroughStack(SDNode* Node) {
1502 SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode *Node) const {
1558 SDValue SelectionDAGLegalize::ExpandFABS(SDNode *Node) const {
1579 void SelectionDAGLegalize::ExpandDYNAMIC_STACKALLOC(SDNode* Node,
1784 SDValue SelectionDAGLegalize::ExpandSCALAR_TO_VECTOR(SDNode *Node) {
1803 ExpandBVWithShuffles(SDNode *Node, SelectionDAG &DAG,
1898 SDValue SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
2010 SDValue SelectionDAGLegalize::ExpandSPLAT_VECTOR(SDNode *Node) {
2022 SDValue SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode *Node,
2084 SDNode *Node,
2117 SDValue SelectionDAGLegalize::ExpandFPLibCall(SDNode* Node,
2138 SDValue SelectionDAGLegalize::ExpandIntLibCall(SDNode* Node, bool isSigned,
2158 SDValue SelectionDAGLegalize::ExpandArgFPLibCall(SDNode* Node,
2182 SelectionDAGLegalize::ExpandDivRemLibCall(SDNode *Node,
2247 static bool isSinCosLibcallAvailable(SDNode *Node, const TargetLowering &TLI) {
2261 static bool useSinCos(SDNode *Node) {
2266 for (SDNode::use_iterator UI = Op0.getNode()->use_begin(),
2268 SDNode *User = *UI;
2280 SelectionDAGLegalize::ExpandSinCosLibCall(SDNode *Node,
2653 bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
3749 void SelectionDAGLegalize::ConvertNodeToLibcall(SDNode *Node) {
4121 void SelectionDAGLegalize::PromoteNode(SDNode *Node) {
4589 SmallPtrSet<SDNode *, 16> LegalizedNodes;
4609 SDNode *N = &*NI;
4635 bool SelectionDAG::LegalizeOp(SDNode *N,
4636 SmallSetVector<SDNode *, 16> &UpdatedNodes) {
4637 SmallPtrSet<SDNode *, 16> LegalizedNodes;
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 48 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
115 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N) {
119 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
125 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
134 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N) {
158 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
165 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N) {
177 SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
194 SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
211 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
228 SDValue DAGTypeLegalizer::SoftenFloatRes_FCBRT(SDNode *N) {
243 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
258 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
306 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
321 SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
338 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
353 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
368 SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
383 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
398 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
413 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
428 SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) {
447 SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
464 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
479 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N) {
504 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
536 SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) {
553 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
570 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) {
587 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
605 SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
622 SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
637 SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) {
652 SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
667 SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
682 SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
699 SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
717 SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
751 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N) {
758 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N) {
766 SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
771 SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
789 SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
826 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
870 SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) {
876 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) {
895 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
914 SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
938 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
970 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
994 SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
1017 SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
1035 SDValue DAGTypeLegalizer::SoftenFloatOp_LROUND(SDNode *N) {
1052 SDValue DAGTypeLegalizer::SoftenFloatOp_LLROUND(SDNode *N) {
1069 SDValue DAGTypeLegalizer::SoftenFloatOp_LRINT(SDNode *N) {
1086 SDValue DAGTypeLegalizer::SoftenFloatOp_LLRINT(SDNode *N) {
1111 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
1179 void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo,
1194 void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
1208 void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
1218 void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo,
1228 void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo,
1238 void DAGTypeLegalizer::ExpandFloatRes_FCBRT(SDNode *N, SDValue &Lo,
1247 void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,
1257 void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
1269 void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
1279 void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo,
1294 void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N,
1304 void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N,
1314 void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N,
1324 void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N,
1334 void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N,
1344 void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N,
1354 void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo,
1369 void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo,
1384 void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N,
1396 void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo,
1404 void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo,
1413 void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N,
1423 void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
1433 void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
1443 void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N,
1453 void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N,
1465 void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N,
1475 void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N,
1485 void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo,
1500 void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N,
1510 void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo,
1542 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
1626 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
1708 SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1726 SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) {
1737 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1747 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1757 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1768 SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1786 SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1803 SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1827 SDValue DAGTypeLegalizer::ExpandFloatOp_LROUND(SDNode *N) {
1840 SDValue DAGTypeLegalizer::ExpandFloatOp_LLROUND(SDNode *N) {
1853 SDValue DAGTypeLegalizer::ExpandFloatOp_LRINT(SDNode *N) {
1866 SDValue DAGTypeLegalizer::ExpandFloatOp_LLRINT(SDNode *N) {
1894 bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) {
1932 SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
1950 SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) {
1959 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) {
1964 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) {
1979 SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
1990 SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) {
2003 SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) {
2024 void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
2110 SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
2121 SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {
2142 SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
2204 SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) {
2217 SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) {
2228 SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) {
2236 SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) {
2247 SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) {
2258 SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) {
2273 SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) {
2295 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) {
2305 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) {
2316 SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) {
2327 SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) {
2332 SDValue DAGTypeLegalizer::BitcastToInt_ATOMIC_SWAP(SDNode *N) {
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 37 void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) {
203 SDValue DAGTypeLegalizer::PromoteIntRes_MERGE_VALUES(SDNode *N,
209 SDValue DAGTypeLegalizer::PromoteIntRes_AssertSext(SDNode *N) {
216 SDValue DAGTypeLegalizer::PromoteIntRes_AssertZext(SDNode *N) {
282 SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
381 SDValue DAGTypeLegalizer::PromoteIntRes_BSWAP(SDNode *N) {
393 SDValue DAGTypeLegalizer::PromoteIntRes_BITREVERSE(SDNode *N) {
406 SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_PAIR(SDNode *N) {
415 SDValue DAGTypeLegalizer::PromoteIntRes_Constant(SDNode *N) {
429 SDValue DAGTypeLegalizer::PromoteIntRes_CTLZ(SDNode *N) {
443 SDValue DAGTypeLegalizer::PromoteIntRes_CTPOP(SDNode *N) {
449 SDValue DAGTypeLegalizer::PromoteIntRes_CTTZ(SDNode *N) {
465 SDValue DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N) {
490 SDValue DAGTypeLegalizer::PromoteIntRes_FP_TO_XINT(SDNode *N) {
532 SDValue DAGTypeLegalizer::PromoteIntRes_FP_TO_FP16(SDNode *N) {
539 SDValue DAGTypeLegalizer::PromoteIntRes_FLT_ROUNDS(SDNode *N) {
546 SDValue DAGTypeLegalizer::PromoteIntRes_INT_EXTEND(SDNode *N) {
622 SDValue DAGTypeLegalizer::PromoteIntRes_Overflow(SDNode *N) {
646 SDValue DAGTypeLegalizer::PromoteIntRes_ADDSUBSAT(SDNode *N) {
727 SDValue DAGTypeLegalizer::PromoteIntRes_MULFIX(SDNode *N) {
765 SDValue DAGTypeLegalizer::PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo) {
794 SDValue DAGTypeLegalizer::PromoteIntRes_SELECT(SDNode *N) {
801 SDValue DAGTypeLegalizer::PromoteIntRes_VSELECT(SDNode *N) {
810 SDValue DAGTypeLegalizer::PromoteIntRes_SELECT_CC(SDNode *N) {
818 SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) {
849 SDValue DAGTypeLegalizer::PromoteIntRes_SHL(SDNode *N) {
857 SDValue DAGTypeLegalizer::PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N) {
863 SDValue DAGTypeLegalizer::PromoteIntRes_SimpleIntBinOp(SDNode *N) {
873 SDValue DAGTypeLegalizer::PromoteIntRes_SExtIntBinOp(SDNode *N) {
881 SDValue DAGTypeLegalizer::PromoteIntRes_ZExtIntBinOp(SDNode *N) {
889 SDValue DAGTypeLegalizer::PromoteIntRes_SRA(SDNode *N) {
898 SDValue DAGTypeLegalizer::PromoteIntRes_SRL(SDNode *N) {
907 SDValue DAGTypeLegalizer::PromoteIntRes_TRUNCATE(SDNode *N) {
966 SDValue DAGTypeLegalizer::PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo) {
997 SDValue DAGTypeLegalizer::PromoteIntRes_ADDSUBCARRY(SDNode *N, unsigned ResNo) {
1026 SDValue DAGTypeLegalizer::PromoteIntRes_ABS(SDNode *N) {
1031 SDValue DAGTypeLegalizer::PromoteIntRes_XMULO(SDNode *N, unsigned ResNo) {
1084 SDValue DAGTypeLegalizer::PromoteIntRes_UNDEF(SDNode *N) {
1089 SDValue DAGTypeLegalizer::PromoteIntRes_VAARG(SDNode *N) {
1137 bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
1291 SDValue DAGTypeLegalizer::PromoteIntOp_ANY_EXTEND(SDNode *N) {
1302 SDValue DAGTypeLegalizer::PromoteIntOp_BITCAST(SDNode *N) {
1308 SDValue DAGTypeLegalizer::PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo) {
1322 SDValue DAGTypeLegalizer::PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo) {
1333 SDValue DAGTypeLegalizer::PromoteIntOp_BUILD_PAIR(SDNode *N) {
1347 SDValue DAGTypeLegalizer::PromoteIntOp_BUILD_VECTOR(SDNode *N) {
1370 SDValue DAGTypeLegalizer::PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N,
1395 SDValue DAGTypeLegalizer::PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N) {
1402 SDValue DAGTypeLegalizer::PromoteIntOp_SPLAT_VECTOR(SDNode *N) {
1409 SDValue DAGTypeLegalizer::PromoteIntOp_SELECT(SDNode *N, unsigned OpNo) {
1426 SDValue DAGTypeLegalizer::PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo) {
1438 SDValue DAGTypeLegalizer::PromoteIntOp_SETCC(SDNode *N, unsigned OpNo) {
1449 SDValue DAGTypeLegalizer::PromoteIntOp_Shift(SDNode *N) {
1454 SDValue DAGTypeLegalizer::PromoteIntOp_SIGN_EXTEND(SDNode *N) {
1462 SDValue DAGTypeLegalizer::PromoteIntOp_SINT_TO_FP(SDNode *N) {
1555 SDValue DAGTypeLegalizer::PromoteIntOp_TRUNCATE(SDNode *N) {
1560 SDValue DAGTypeLegalizer::PromoteIntOp_UINT_TO_FP(SDNode *N) {
1565 SDValue DAGTypeLegalizer::PromoteIntOp_ZERO_EXTEND(SDNode *N) {
1573 SDValue DAGTypeLegalizer::PromoteIntOp_ADDSUBCARRY(SDNode *N, unsigned OpNo) {
1586 SDValue DAGTypeLegalizer::PromoteIntOp_MULFIX(SDNode *N) {
1592 SDValue DAGTypeLegalizer::PromoteIntOp_FRAMERETURNADDR(SDNode *N) {
1598 SDValue DAGTypeLegalizer::PromoteIntOp_PREFETCH(SDNode *N, unsigned OpNo) {
1610 SDValue DAGTypeLegalizer::PromoteIntOp_FPOWI(SDNode *N) {
1615 SDValue DAGTypeLegalizer::PromoteIntOp_VECREDUCE(SDNode *N) {
1656 void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
1813 std::pair <SDValue, SDValue> DAGTypeLegalizer::ExpandAtomic(SDNode *Node) {
1824 void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, const APInt &Amt,
1914 ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) {
2001 ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) {
2092 void DAGTypeLegalizer::ExpandIntRes_MINMAX(SDNode *N,
2125 void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N,
2252 void DAGTypeLegalizer::ExpandIntRes_ADDSUBC(SDNode *N,
2278 void DAGTypeLegalizer::ExpandIntRes_ADDSUBE(SDNode *N,
2298 void DAGTypeLegalizer::ExpandIntRes_UADDSUBO(SDNode *N,
2356 void DAGTypeLegalizer::ExpandIntRes_ADDSUBCARRY(SDNode *N,
2376 void DAGTypeLegalizer::ExpandIntRes_ANY_EXTEND(SDNode *N,
2399 void DAGTypeLegalizer::ExpandIntRes_AssertSext(SDNode *N,
2421 void DAGTypeLegalizer::ExpandIntRes_AssertZext(SDNode *N,
2441 void DAGTypeLegalizer::ExpandIntRes_BITREVERSE(SDNode *N,
2449 void DAGTypeLegalizer::ExpandIntRes_BSWAP(SDNode *N,
2457 void DAGTypeLegalizer::ExpandIntRes_Constant(SDNode *N,
2471 void DAGTypeLegalizer::ExpandIntRes_ABS(SDNode *N, SDValue &Lo, SDValue &Hi) {
2490 void DAGTypeLegalizer::ExpandIntRes_CTLZ(SDNode *N,
2510 void DAGTypeLegalizer::ExpandIntRes_CTPOP(SDNode *N,
2521 void DAGTypeLegalizer::ExpandIntRes_CTTZ(SDNode *N,
2541 void DAGTypeLegalizer::ExpandIntRes_FLT_ROUNDS(SDNode *N, SDValue &Lo,
2554 void DAGTypeLegalizer::ExpandIntRes_FP_TO_SINT(SDNode *N, SDValue &Lo,
2571 void DAGTypeLegalizer::ExpandIntRes_FP_TO_UINT(SDNode *N, SDValue &Lo,
2587 void DAGTypeLegalizer::ExpandIntRes_LLROUND(SDNode *N, SDValue &Lo,
2615 void DAGTypeLegalizer::ExpandIntRes_LLRINT(SDNode *N, SDValue &Lo,
2757 void DAGTypeLegalizer::ExpandIntRes_Logical(SDNode *N,
2767 void DAGTypeLegalizer::ExpandIntRes_MUL(SDNode *N,
2848 void DAGTypeLegalizer::ExpandIntRes_READCYCLECOUNTER(SDNode *N, SDValue &Lo,
2859 void DAGTypeLegalizer::ExpandIntRes_ADDSUBSAT(SDNode *N, SDValue &Lo,
2870 void DAGTypeLegalizer::ExpandIntRes_MULFIX(SDNode *N, SDValue &Lo,
3083 void DAGTypeLegalizer::ExpandIntRes_SADDSUBO(SDNode *Node,
3125 void DAGTypeLegalizer::ExpandIntRes_SDIV(SDNode *N,
3153 void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
3259 void DAGTypeLegalizer::ExpandIntRes_SIGN_EXTEND(SDNode *N,
3291 ExpandIntRes_SIGN_EXTEND_INREG(SDNode *N, SDValue &Lo, SDValue &Hi) {
3316 void DAGTypeLegalizer::ExpandIntRes_SREM(SDNode *N,
3344 void DAGTypeLegalizer::ExpandIntRes_TRUNCATE(SDNode *N,
3356 void DAGTypeLegalizer::ExpandIntRes_XMULO(SDNode *N,
3474 void DAGTypeLegalizer::ExpandIntRes_UDIV(SDNode *N,
3501 void DAGTypeLegalizer::ExpandIntRes_UREM(SDNode *N,
3528 void DAGTypeLegalizer::ExpandIntRes_ZERO_EXTEND(SDNode *N,
3555 void DAGTypeLegalizer::ExpandIntRes_ATOMIC_LOAD(SDNode *N,
3570 void DAGTypeLegalizer::ExpandIntRes_VECREDUCE(SDNode *N,
3586 bool DAGTypeLegalizer::ExpandIntegerOperand(SDNode *N, unsigned OpNo) {
3790 SDValue DAGTypeLegalizer::ExpandIntOp_BR_CC(SDNode *N) {
3808 SDValue DAGTypeLegalizer::ExpandIntOp_SELECT_CC(SDNode *N) {
3826 SDValue DAGTypeLegalizer::ExpandIntOp_SETCC(SDNode *N) {
3843 SDValue DAGTypeLegalizer::ExpandIntOp_SETCCCARRY(SDNode *N) {
3861 SDValue DAGTypeLegalizer::ExpandIntOp_Shift(SDNode *N) {
3870 SDValue DAGTypeLegalizer::ExpandIntOp_RETURNADDR(SDNode *N) {
3879 SDValue DAGTypeLegalizer::ExpandIntOp_SINT_TO_FP(SDNode *N) {
3972 SDValue DAGTypeLegalizer::ExpandIntOp_TRUNCATE(SDNode *N) {
3979 SDValue DAGTypeLegalizer::ExpandIntOp_UINT_TO_FP(SDNode *N) {
4057 SDValue DAGTypeLegalizer::ExpandIntOp_ATOMIC_STORE(SDNode *N) {
4068 SDValue DAGTypeLegalizer::PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N) {
4104 SDValue DAGTypeLegalizer::PromoteIntRes_VECTOR_SHUFFLE(SDNode *N) {
4119 SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR(SDNode *N) {
4146 SDValue DAGTypeLegalizer::PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N) {
4163 SDValue DAGTypeLegalizer::PromoteIntRes_SPLAT_VECTOR(SDNode *N) {
4180 SDValue DAGTypeLegalizer::PromoteIntRes_CONCAT_VECTORS(SDNode *N) {
4216 SDValue DAGTypeLegalizer::PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N) {
4251 SDValue DAGTypeLegalizer::PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N) {
4267 SDValue DAGTypeLegalizer::PromoteIntRes_VECREDUCE(SDNode *N) {
4275 SDValue DAGTypeLegalizer::PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N) {
4289 SDValue DAGTypeLegalizer::PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N) {
4299 SDValue DAGTypeLegalizer::PromoteIntOp_CONCAT_VECTORS(SDNode *N) {
lib/CodeGen/SelectionDAG/LegalizeTypes.cpp 76 SmallVector<SDNode*, 16> NewNodes;
77 for (SDNode &Node : DAG.allnodes()) {
92 for (SDNode::use_iterator UI = Node.use_begin(), UE = Node.use_end();
179 SDNode *N = NewNodes[i];
180 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
205 for (SDNode &Node : DAG.allnodes()) {
220 SDNode *N = Worklist.back();
347 SDNode *M = AnalyzeNewNode(N);
378 for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end();
380 SDNode *User = *UI;
429 for (SDNode &Node : DAG.allnodes()) {
476 SDNode *DAGTypeLegalizer::AnalyzeNewNode(SDNode *N) {
476 SDNode *DAGTypeLegalizer::AnalyzeNewNode(SDNode *N) {
515 SDNode *M = DAG.UpdateNodeOperands(N, NewOps);
578 SmallSetVector<SDNode*, 16> &NodesToAnalyze;
581 SmallSetVector<SDNode*, 16> &nta)
585 void NodeDeleted(SDNode *N, SDNode *E) override {
585 void NodeDeleted(SDNode *N, SDNode *E) override {
606 void NodeUpdated(SDNode *N) override {
630 SmallSetVector<SDNode*, 16> NodesToAnalyze;
645 SDNode *N = NodesToAnalyze.back();
654 SDNode *M = AnalyzeNewNode(N);
877 bool DAGTypeLegalizer::CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult) {
915 bool DAGTypeLegalizer::CustomWidenLowerNode(SDNode *N, EVT VT) {
940 SDValue DAGTypeLegalizer::DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo) {
978 SDValue DAGTypeLegalizer::LibCallify(RTLIB::Libcall LC, SDNode *N,
1006 DAGTypeLegalizer::ExpandChainLibCall(RTLIB::Libcall LC, SDNode *Node,
lib/CodeGen/SelectionDAG/LegalizeTypes.h 81 bool IgnoreNodeResults(SDNode *N) const {
134 SmallVector<SDNode*, 128> Worklist;
174 void NoteDeletion(SDNode *Old, SDNode *New) {
174 void NoteDeletion(SDNode *Old, SDNode *New) {
199 SDNode *AnalyzeNewNode(SDNode *N);
199 SDNode *AnalyzeNewNode(SDNode *N);
209 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
210 bool CustomWidenLowerNode(SDNode *N, EVT VT);
215 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
218 SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned);
221 SDNode *Node, bool isSigned);
222 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
231 void AddToWorklist(SDNode *N) {
289 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
290 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
291 SDValue PromoteIntRes_AssertSext(SDNode *N);
292 SDValue PromoteIntRes_AssertZext(SDNode *N);
296 SDValue PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N);
297 SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N);
298 SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N);
299 SDValue PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N);
300 SDValue PromoteIntRes_SPLAT_VECTOR(SDNode *N);
301 SDValue PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N);
302 SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N);
303 SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N);
304 SDValue PromoteIntRes_BITCAST(SDNode *N);
305 SDValue PromoteIntRes_BSWAP(SDNode *N);
306 SDValue PromoteIntRes_BITREVERSE(SDNode *N);
307 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);
308 SDValue PromoteIntRes_Constant(SDNode *N);
309 SDValue PromoteIntRes_CTLZ(SDNode *N);
310 SDValue PromoteIntRes_CTPOP(SDNode *N);
311 SDValue PromoteIntRes_CTTZ(SDNode *N);
312 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
313 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
314 SDValue PromoteIntRes_FP_TO_FP16(SDNode *N);
315 SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
319 SDValue PromoteIntRes_Overflow(SDNode *N);
320 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
321 SDValue PromoteIntRes_SELECT(SDNode *N);
322 SDValue PromoteIntRes_VSELECT(SDNode *N);
323 SDValue PromoteIntRes_SELECT_CC(SDNode *N);
324 SDValue PromoteIntRes_SETCC(SDNode *N);
325 SDValue PromoteIntRes_SHL(SDNode *N);
326 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
327 SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N);
328 SDValue PromoteIntRes_SExtIntBinOp(SDNode *N);
329 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
330 SDValue PromoteIntRes_SRA(SDNode *N);
331 SDValue PromoteIntRes_SRL(SDNode *N);
332 SDValue PromoteIntRes_TRUNCATE(SDNode *N);
333 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
334 SDValue PromoteIntRes_ADDSUBCARRY(SDNode *N, unsigned ResNo);
335 SDValue PromoteIntRes_UNDEF(SDNode *N);
336 SDValue PromoteIntRes_VAARG(SDNode *N);
337 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
338 SDValue PromoteIntRes_ADDSUBSAT(SDNode *N);
339 SDValue PromoteIntRes_MULFIX(SDNode *N);
340 SDValue PromoteIntRes_FLT_ROUNDS(SDNode *N);
341 SDValue PromoteIntRes_VECREDUCE(SDNode *N);
342 SDValue PromoteIntRes_ABS(SDNode *N);
345 bool PromoteIntegerOperand(SDNode *N, unsigned OpNo);
346 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N);
348 SDValue PromoteIntOp_BITCAST(SDNode *N);
349 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N);
350 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo);
351 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo);
352 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N);
353 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
354 SDValue PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N);
355 SDValue PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N);
356 SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N);
357 SDValue PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N);
358 SDValue PromoteIntOp_SPLAT_VECTOR(SDNode *N);
359 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo);
360 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo);
361 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo);
362 SDValue PromoteIntOp_Shift(SDNode *N);
363 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N);
364 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N);
366 SDValue PromoteIntOp_TRUNCATE(SDNode *N);
367 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N);
368 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N);
373 SDValue PromoteIntOp_ADDSUBCARRY(SDNode *N, unsigned OpNo);
374 SDValue PromoteIntOp_FRAMERETURNADDR(SDNode *N);
375 SDValue PromoteIntOp_PREFETCH(SDNode *N, unsigned OpNo);
376 SDValue PromoteIntOp_MULFIX(SDNode *N);
377 SDValue PromoteIntOp_FPOWI(SDNode *N);
378 SDValue PromoteIntOp_VECREDUCE(SDNode *N);
396 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
397 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
398 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
399 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
400 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi);
401 void ExpandIntRes_ABS (SDNode *N, SDValue &Lo, SDValue &Hi);
402 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi);
403 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi);
404 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi);
406 void ExpandIntRes_READCYCLECOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi);
407 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
408 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi);
409 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi);
410 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
411 void ExpandIntRes_FLT_ROUNDS (SDNode *N, SDValue &Lo, SDValue &Hi);
412 void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi);
413 void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi);
414 void ExpandIntRes_LLROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
415 void ExpandIntRes_LLRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
417 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
418 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
419 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);
420 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);
421 void ExpandIntRes_ADDSUBCARRY (SDNode *N, SDValue &Lo, SDValue &Hi);
422 void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi);
423 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);
424 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);
425 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
426 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi);
427 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
428 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi);
429 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi);
431 void ExpandIntRes_MINMAX (SDNode *N, SDValue &Lo, SDValue &Hi);
433 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
434 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
435 void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
436 void ExpandIntRes_ADDSUBSAT (SDNode *N, SDValue &Lo, SDValue &Hi);
437 void ExpandIntRes_MULFIX (SDNode *N, SDValue &Lo, SDValue &Hi);
439 void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
440 void ExpandIntRes_VECREDUCE (SDNode *N, SDValue &Lo, SDValue &Hi);
442 void ExpandShiftByConstant(SDNode *N, const APInt &Amt,
444 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
445 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
448 bool ExpandIntegerOperand(SDNode *N, unsigned OpNo);
449 SDValue ExpandIntOp_BR_CC(SDNode *N);
450 SDValue ExpandIntOp_SELECT_CC(SDNode *N);
451 SDValue ExpandIntOp_SETCC(SDNode *N);
452 SDValue ExpandIntOp_SETCCCARRY(SDNode *N);
453 SDValue ExpandIntOp_Shift(SDNode *N);
454 SDValue ExpandIntOp_SINT_TO_FP(SDNode *N);
456 SDValue ExpandIntOp_TRUNCATE(SDNode *N);
457 SDValue ExpandIntOp_UINT_TO_FP(SDNode *N);
458 SDValue ExpandIntOp_RETURNADDR(SDNode *N);
459 SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N);
488 void SoftenFloatResult(SDNode *N, unsigned ResNo);
489 SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
490 SDValue SoftenFloatRes_BITCAST(SDNode *N);
491 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
492 SDValue SoftenFloatRes_ConstantFP(SDNode *N);
493 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
494 SDValue SoftenFloatRes_FABS(SDNode *N);
495 SDValue SoftenFloatRes_FMINNUM(SDNode *N);
496 SDValue SoftenFloatRes_FMAXNUM(SDNode *N);
497 SDValue SoftenFloatRes_FADD(SDNode *N);
498 SDValue SoftenFloatRes_FCBRT(SDNode *N);
499 SDValue SoftenFloatRes_FCEIL(SDNode *N);
500 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N);
501 SDValue SoftenFloatRes_FCOS(SDNode *N);
502 SDValue SoftenFloatRes_FDIV(SDNode *N);
503 SDValue SoftenFloatRes_FEXP(SDNode *N);
504 SDValue SoftenFloatRes_FEXP2(SDNode *N);
505 SDValue SoftenFloatRes_FFLOOR(SDNode *N);
506 SDValue SoftenFloatRes_FLOG(SDNode *N);
507 SDValue SoftenFloatRes_FLOG2(SDNode *N);
508 SDValue SoftenFloatRes_FLOG10(SDNode *N);
509 SDValue SoftenFloatRes_FMA(SDNode *N);
510 SDValue SoftenFloatRes_FMUL(SDNode *N);
511 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
512 SDValue SoftenFloatRes_FNEG(SDNode *N);
513 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
514 SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N);
515 SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
516 SDValue SoftenFloatRes_FPOW(SDNode *N);
517 SDValue SoftenFloatRes_FPOWI(SDNode *N);
518 SDValue SoftenFloatRes_FREM(SDNode *N);
519 SDValue SoftenFloatRes_FRINT(SDNode *N);
520 SDValue SoftenFloatRes_FROUND(SDNode *N);
521 SDValue SoftenFloatRes_FSIN(SDNode *N);
522 SDValue SoftenFloatRes_FSQRT(SDNode *N);
523 SDValue SoftenFloatRes_FSUB(SDNode *N);
524 SDValue SoftenFloatRes_FTRUNC(SDNode *N);
525 SDValue SoftenFloatRes_LOAD(SDNode *N);
526 SDValue SoftenFloatRes_SELECT(SDNode *N);
527 SDValue SoftenFloatRes_SELECT_CC(SDNode *N);
528 SDValue SoftenFloatRes_UNDEF(SDNode *N);
529 SDValue SoftenFloatRes_VAARG(SDNode *N);
530 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N);
533 bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
534 SDValue SoftenFloatOp_BITCAST(SDNode *N);
535 SDValue SoftenFloatOp_BR_CC(SDNode *N);
536 SDValue SoftenFloatOp_FP_EXTEND(SDNode *N);
537 SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
538 SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
539 SDValue SoftenFloatOp_LROUND(SDNode *N);
540 SDValue SoftenFloatOp_LLROUND(SDNode *N);
541 SDValue SoftenFloatOp_LRINT(SDNode *N);
542 SDValue SoftenFloatOp_LLRINT(SDNode *N);
543 SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
544 SDValue SoftenFloatOp_SETCC(SDNode *N);
545 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
561 void ExpandFloatResult(SDNode *N, unsigned ResNo);
562 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);
563 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi);
564 void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
565 void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
566 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi);
567 void ExpandFloatRes_FCBRT (SDNode *N, SDValue &Lo, SDValue &Hi);
568 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi);
569 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi);
570 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi);
571 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
572 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
573 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi);
574 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi);
575 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi);
576 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi);
577 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi);
578 void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi);
579 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi);
580 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi);
581 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi);
582 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
583 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
584 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
585 void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi);
586 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
587 void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
588 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi);
589 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi);
590 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
591 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi);
592 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
593 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi);
596 bool ExpandFloatOperand(SDNode *N, unsigned OpNo);
597 SDValue ExpandFloatOp_BR_CC(SDNode *N);
598 SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N);
599 SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
600 SDValue ExpandFloatOp_FP_TO_SINT(SDNode *N);
601 SDValue ExpandFloatOp_FP_TO_UINT(SDNode *N);
602 SDValue ExpandFloatOp_LROUND(SDNode *N);
603 SDValue ExpandFloatOp_LLROUND(SDNode *N);
604 SDValue ExpandFloatOp_LRINT(SDNode *N);
605 SDValue ExpandFloatOp_LLRINT(SDNode *N);
606 SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
607 SDValue ExpandFloatOp_SETCC(SDNode *N);
608 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
625 void PromoteFloatResult(SDNode *N, unsigned ResNo);
626 SDValue PromoteFloatRes_BITCAST(SDNode *N);
627 SDValue PromoteFloatRes_BinOp(SDNode *N);
628 SDValue PromoteFloatRes_ConstantFP(SDNode *N);
629 SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
630 SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
631 SDValue PromoteFloatRes_FMAD(SDNode *N);
632 SDValue PromoteFloatRes_FPOWI(SDNode *N);
633 SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
634 SDValue PromoteFloatRes_LOAD(SDNode *N);
635 SDValue PromoteFloatRes_SELECT(SDNode *N);
636 SDValue PromoteFloatRes_SELECT_CC(SDNode *N);
637 SDValue PromoteFloatRes_UnaryOp(SDNode *N);
638 SDValue PromoteFloatRes_UNDEF(SDNode *N);
639 SDValue BitcastToInt_ATOMIC_SWAP(SDNode *N);
640 SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N);
642 bool PromoteFloatOperand(SDNode *N, unsigned OpNo);
643 SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo);
644 SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
645 SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo);
646 SDValue PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo);
647 SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo);
648 SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo);
649 SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo);
667 void ScalarizeVectorResult(SDNode *N, unsigned ResNo);
668 SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
669 SDValue ScalarizeVecRes_BinOp(SDNode *N);
670 SDValue ScalarizeVecRes_TernaryOp(SDNode *N);
671 SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
672 SDValue ScalarizeVecRes_StrictFPOp(SDNode *N);
673 SDValue ScalarizeVecRes_OverflowOp(SDNode *N, unsigned ResNo);
674 SDValue ScalarizeVecRes_InregOp(SDNode *N);
675 SDValue ScalarizeVecRes_VecInregOp(SDNode *N);
677 SDValue ScalarizeVecRes_BITCAST(SDNode *N);
678 SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N);
679 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N);
680 SDValue ScalarizeVecRes_FP_ROUND(SDNode *N);
681 SDValue ScalarizeVecRes_STRICT_FP_ROUND(SDNode *N);
682 SDValue ScalarizeVecRes_FPOWI(SDNode *N);
683 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
685 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
686 SDValue ScalarizeVecRes_VSELECT(SDNode *N);
687 SDValue ScalarizeVecRes_SELECT(SDNode *N);
688 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
689 SDValue ScalarizeVecRes_SETCC(SDNode *N);
690 SDValue ScalarizeVecRes_UNDEF(SDNode *N);
691 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
693 SDValue ScalarizeVecRes_MULFIX(SDNode *N);
696 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
697 SDValue ScalarizeVecOp_BITCAST(SDNode *N);
698 SDValue ScalarizeVecOp_UnaryOp(SDNode *N);
699 SDValue ScalarizeVecOp_UnaryOp_StrictFP(SDNode *N);
700 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
701 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
702 SDValue ScalarizeVecOp_VSELECT(SDNode *N);
703 SDValue ScalarizeVecOp_VSETCC(SDNode *N);
705 SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo);
706 SDValue ScalarizeVecOp_STRICT_FP_ROUND(SDNode *N, unsigned OpNo);
707 SDValue ScalarizeVecOp_VECREDUCE(SDNode *N);
724 void SplitVectorResult(SDNode *N, unsigned ResNo);
725 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi);
726 void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
727 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
728 void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi);
729 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi);
730 void SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo, SDValue &Hi);
731 void SplitVecRes_StrictFPOp(SDNode *N, SDValue &Lo, SDValue &Hi);
732 void SplitVecRes_OverflowOp(SDNode *N, unsigned ResNo,
735 void SplitVecRes_MULFIX(SDNode *N, SDValue &Lo, SDValue &Hi);
737 void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi);
738 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
739 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi);
740 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
741 void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
742 void SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi);
743 void SplitVecRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi);
744 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
748 void SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
749 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi);
752 void SplitVecRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi);
755 bool SplitVectorOperand(SDNode *N, unsigned OpNo);
756 SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo);
757 SDValue SplitVecOp_VECREDUCE(SDNode *N, unsigned OpNo);
758 SDValue SplitVecOp_UnaryOp(SDNode *N);
759 SDValue SplitVecOp_TruncateHelper(SDNode *N);
761 SDValue SplitVecOp_BITCAST(SDNode *N);
762 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
763 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
764 SDValue SplitVecOp_ExtVecInRegOp(SDNode *N);
769 SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N);
770 SDValue SplitVecOp_VSETCC(SDNode *N);
771 SDValue SplitVecOp_FP_ROUND(SDNode *N);
772 SDValue SplitVecOp_FCOPYSIGN(SDNode *N);
793 void WidenVectorResult(SDNode *N, unsigned ResNo);
794 SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo);
795 SDValue WidenVecRes_BITCAST(SDNode* N);
796 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N);
797 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N);
798 SDValue WidenVecRes_EXTEND_VECTOR_INREG(SDNode* N);
799 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N);
800 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N);
801 SDValue WidenVecRes_LOAD(SDNode* N);
804 SDValue WidenVecRes_SCALAR_TO_VECTOR(SDNode* N);
805 SDValue WidenVecRes_SELECT(SDNode* N);
806 SDValue WidenVSELECTAndMask(SDNode *N);
807 SDValue WidenVecRes_SELECT_CC(SDNode* N);
808 SDValue WidenVecRes_SETCC(SDNode* N);
809 SDValue WidenVecRes_UNDEF(SDNode *N);
812 SDValue WidenVecRes_Ternary(SDNode *N);
813 SDValue WidenVecRes_Binary(SDNode *N);
814 SDValue WidenVecRes_BinaryCanTrap(SDNode *N);
815 SDValue WidenVecRes_BinaryWithExtraScalarOp(SDNode *N);
816 SDValue WidenVecRes_StrictFP(SDNode *N);
817 SDValue WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo);
818 SDValue WidenVecRes_Convert(SDNode *N);
819 SDValue WidenVecRes_Convert_StrictFP(SDNode *N);
820 SDValue WidenVecRes_FCOPYSIGN(SDNode *N);
821 SDValue WidenVecRes_POWI(SDNode *N);
822 SDValue WidenVecRes_Shift(SDNode *N);
823 SDValue WidenVecRes_Unary(SDNode *N);
824 SDValue WidenVecRes_InregOp(SDNode *N);
827 bool WidenVectorOperand(SDNode *N, unsigned OpNo);
828 SDValue WidenVecOp_BITCAST(SDNode *N);
829 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
830 SDValue WidenVecOp_EXTEND(SDNode *N);
831 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
832 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
833 SDValue WidenVecOp_STORE(SDNode* N);
834 SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo);
835 SDValue WidenVecOp_MGATHER(SDNode* N, unsigned OpNo);
836 SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo);
837 SDValue WidenVecOp_SETCC(SDNode* N);
838 SDValue WidenVecOp_VSELECT(SDNode *N);
840 SDValue WidenVecOp_Convert(SDNode *N);
841 SDValue WidenVecOp_FCOPYSIGN(SDNode *N);
842 SDValue WidenVecOp_VECREDUCE(SDNode *N);
847 SDValue UnrollVectorOp_StrictFP(SDNode *N, unsigned ResNE);
913 void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
915 void SplitRes_SELECT (SDNode *N, SDValue &Lo, SDValue &Hi);
916 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi);
917 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi);
919 void SplitVSETCC(const SDNode *N);
944 void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo,
946 void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi);
947 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi);
948 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi);
949 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
950 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi);
951 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
954 SDValue ExpandOp_BITCAST (SDNode *N);
955 SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
956 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
957 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
958 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
959 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp 34 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
40 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
186 void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo,
193 void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo,
205 void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
245 void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo,
286 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {
331 SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) {
368 SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) {
400 SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) {
406 SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
442 SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) {
456 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
500 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
506 void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) {
543 void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo,
556 void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) {
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp 185 for (SDNode::value_iterator J = I->value_begin(), E = I->value_end();
235 SDNode* Node = Op.getNode();
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 34 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
199 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
206 SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
214 SDValue DAGTypeLegalizer::ScalarizeVecRes_MULFIX(SDNode *N) {
222 SDValue DAGTypeLegalizer::ScalarizeVecRes_StrictFPOp(SDNode *N) {
252 SDValue DAGTypeLegalizer::ScalarizeVecRes_OverflowOp(SDNode *N,
272 SDNode *ScalarNode = DAG.getNode(
289 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
295 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
306 SDValue DAGTypeLegalizer::ScalarizeVecRes_BUILD_VECTOR(SDNode *N) {
316 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
322 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
329 SDValue DAGTypeLegalizer::ScalarizeVecRes_STRICT_FP_ROUND(SDNode *N) {
341 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
347 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
375 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
399 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
407 SDValue DAGTypeLegalizer::ScalarizeVecRes_VecInregOp(SDNode *N) {
435 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
445 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
514 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
521 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
529 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
533 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
542 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
581 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
669 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
677 SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp(SDNode *N) {
690 SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp_StrictFP(SDNode *N) {
706 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
715 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
728 SDValue DAGTypeLegalizer::ScalarizeVecOp_VSELECT(SDNode *N) {
739 SDValue DAGTypeLegalizer::ScalarizeVecOp_VSETCC(SDNode *N) {
788 SDValue DAGTypeLegalizer::ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo) {
796 SDValue DAGTypeLegalizer::ScalarizeVecOp_STRICT_FP_ROUND(SDNode *N,
810 SDValue DAGTypeLegalizer::ScalarizeVecOp_VECREDUCE(SDNode *N) {
826 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
1014 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
1028 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
1044 void DAGTypeLegalizer::SplitVecRes_MULFIX(SDNode *N, SDValue &Lo, SDValue &Hi) {
1057 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
1114 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
1127 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
1148 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
1164 void DAGTypeLegalizer::SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo,
1218 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
1226 void DAGTypeLegalizer::SplitVecRes_FCOPYSIGN(SDNode *N, SDValue &Lo,
1245 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
1261 void DAGTypeLegalizer::SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo,
1299 void DAGTypeLegalizer::SplitVecRes_StrictFPOp(SDNode *N, SDValue &Lo,
1349 SDValue DAGTypeLegalizer::UnrollVectorOp_StrictFP(SDNode *N, unsigned ResNE) {
1406 void DAGTypeLegalizer::SplitVecRes_OverflowOp(SDNode *N, unsigned ResNo,
1427 SDNode *LoNode = DAG.getNode(Opcode, dl, LoVTs, LoLHS, LoRHS).getNode();
1428 SDNode *HiNode = DAG.getNode(Opcode, dl, HiVTs, HiLHS, HiRHS).getNode();
1447 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
1526 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
1704 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
1731 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
1774 void DAGTypeLegalizer::SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo,
1932 void DAGTypeLegalizer::SplitVecRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {
1961 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
2073 SDValue DAGTypeLegalizer::SplitVecOp_VSELECT(SDNode *N, unsigned OpNo) {
2107 SDValue DAGTypeLegalizer::SplitVecOp_VECREDUCE(SDNode *N, unsigned OpNo) {
2149 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
2182 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
2198 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2220 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2277 SDValue DAGTypeLegalizer::SplitVecOp_ExtVecInRegOp(SDNode *N) {
2525 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
2547 SDValue DAGTypeLegalizer::SplitVecOp_TruncateHelper(SDNode *N) {
2626 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
2650 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
2679 SDValue DAGTypeLegalizer::SplitVecOp_FCOPYSIGN(SDNode *N) {
2690 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
2907 SDValue DAGTypeLegalizer::WidenVecRes_Ternary(SDNode *N) {
2917 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
2926 SDValue DAGTypeLegalizer::WidenVecRes_BinaryWithExtraScalarOp(SDNode *N) {
3018 SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
3093 SDValue DAGTypeLegalizer::WidenVecRes_StrictFP(SDNode *N) {
3205 SDValue DAGTypeLegalizer::WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo) {
3238 SDNode *WideNode = DAG.getNode(
3257 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
3340 SDValue DAGTypeLegalizer::WidenVecRes_Convert_StrictFP(SDNode *N) {
3377 SDValue DAGTypeLegalizer::WidenVecRes_EXTEND_VECTOR_INREG(SDNode *N) {
3430 SDValue DAGTypeLegalizer::WidenVecRes_FCOPYSIGN(SDNode *N) {
3441 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
3448 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
3467 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
3474 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
3485 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
3490 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
3571 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
3591 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
3661 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
3702 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
3709 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
3795 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
3898 SDValue DAGTypeLegalizer::WidenVSELECTAndMask(SDNode *N) {
4004 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
4042 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
4050 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
4080 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
4126 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned OpNo) {
4211 SDValue DAGTypeLegalizer::WidenVecOp_EXTEND(SDNode *N) {
4272 SDValue DAGTypeLegalizer::WidenVecOp_FCOPYSIGN(SDNode *N) {
4279 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
4340 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
4382 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
4422 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
4428 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
4434 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
4454 SDValue DAGTypeLegalizer::WidenVecOp_MSTORE(SDNode *N, unsigned OpNo) {
4493 SDValue DAGTypeLegalizer::WidenVecOp_MGATHER(SDNode *N, unsigned OpNo) {
4513 SDValue DAGTypeLegalizer::WidenVecOp_MSCATTER(SDNode *N, unsigned OpNo) {
4548 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
4583 SDValue DAGTypeLegalizer::WidenVecOp_VECREDUCE(SDNode *N) {
4639 SDValue DAGTypeLegalizer::WidenVecOp_VSELECT(SDNode *N) {
lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp 74 const SDNode *ScegN = PredSU->getNode();
112 const SDNode *ScegN = SuccSU->getNode();
434 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode()) {
469 const SDNode *ScegN = SU->getNode();
536 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode())
lib/CodeGen/SelectionDAG/SDNodeDbgValue.h 41 SDNode *Node; ///< Valid for expressions.
59 SDDbgValue(DIVariable *Var, DIExpression *Expr, SDNode *N, unsigned R,
99 SDNode *getSDNode() const { assert (kind==SDNODE); return u.s.Node; }
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 214 SDNode *N = SU->getNode();
234 SmallVector<SDNode*, 2> NewNodes;
242 SDNode *LoadNode = NewNodes[0];
425 static MVT getPhysicalRegisterVT(SDNode *N, unsigned Reg,
481 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) {
653 std::vector<SDNode*> Sequence;
654 DenseMap<SDNode*, SDNode*> GluedMap; // Cache glue to its user
654 DenseMap<SDNode*, SDNode*> GluedMap; // Cache glue to its user
656 void ScheduleNode(SDNode *N);
660 void ScheduleDAGLinearize::ScheduleNode(SDNode *N) {
675 SDNode *GluedOpN = nullptr;
678 SDNode *OpN = Op.getNode();
693 DenseMap<SDNode*, SDNode*>::iterator DI = GluedMap.find(OpN);
693 DenseMap<SDNode*, SDNode*>::iterator DI = GluedMap.find(OpN);
709 static SDNode *findGluedUser(SDNode *N) {
709 static SDNode *findGluedUser(SDNode *N) {
710 while (SDNode *Glued = N->getGluedUser())
718 SmallVector<SDNode*, 8> Glues;
720 for (SDNode &Node : DAG->allnodes()) {
721 SDNode *N = &Node;
729 SDNode *User = findGluedUser(N);
742 SDNode *Glue = Glues[i];
743 SDNode *GUser = GluedMap[Glue];
749 SDNode *ImmGUser = Glue->getGluedUser();
750 for (const SDNode *U : Glue->uses())
771 SDNode *N = Sequence[NumNodes-i-1];
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 277 SUnit *CreateNewSUnit(SDNode *N) {
320 const SDNode *Node = RegDefPos.GetNode();
440 static bool IsChainDependent(SDNode *Outer, SDNode *Inner,
440 static bool IsChainDependent(SDNode *Outer, SDNode *Inner,
443 SDNode *N = Outer;
488 static SDNode *
489 FindCallSeqStart(SDNode *N, unsigned &NestLevel, unsigned &MaxNest,
496 SDNode *Best = nullptr;
501 if (SDNode *New = FindCallSeqStart(Op.getNode(),
579 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode())
584 SDNode *N = FindCallSeqStart(Node, NestLevel, MaxNest, TII);
784 for (const SDNode *SUNode = SU->getNode(); SUNode;
855 for (const SDNode *SUNode = SU->getNode(); SUNode;
872 for (const SDNode *SUNode = SU->getNode(); SUNode;
970 static bool isOperandOf(const SUnit *SU, SDNode *N) {
971 for (const SDNode *SUNode = SU->getNode(); SUNode;
981 SDNode *N = SU->getNode();
983 SmallVector<SDNode *, 2> NewNodes;
995 SDNode *LoadNode = NewNodes[0];
1135 SDNode *N = SU->getNode();
1276 static MVT getPhysicalRegisterVT(SDNode *N, unsigned Reg,
1334 static const uint32_t *getNodeRegMask(const SDNode *N) {
1361 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) {
1399 SDNode *Gen = LiveRegGens[CallResource]->getNode();
1400 while (SDNode *Glued = Gen->getGluedNode())
2109 const SDNode *N = SU->getNode();
2155 const SDNode *N = SU->getNode();
2245 const SDNode *N = SU->getNode();
2269 const SDNode *PN = PredSU->getNode();
2824 SDNode *DU = SU->getNode()->getOperand(i).getNode();
2876 SDNode *N = SuccSU->getNode();
2880 for (const SDNode *SUNode = SU->getNode(); SUNode;
2953 if (SDNode *N = SU.getNode())
2959 SDNode *PredFrameSetup = nullptr;
2963 SDNode *PredND = Pred.getSUnit()->getNode();
3000 if (SDNode *N = SU.getNode())
3058 SDNode *Node = SU.getNode();
3070 SDNode *DU = SU.getNode()->getOperand(j).getNode();
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp 68 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) {
110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op,
110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op,
140 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, ArrayRef<EVT> VTs,
161 static bool AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) {
162 SDNode *GlueDestNode = Glue.getNode();
186 static void RemoveUnusedGlue(SDNode *N, SelectionDAG *DAG) {
200 void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) {
201 SDNode *Chain = nullptr;
223 SmallPtrSet<SDNode*, 16> Visited;
225 DenseMap<long long, SDNode*> O2SMap; // Map from offset to SDNode.
227 SDNode *Base = Node;
235 for (SDNode::use_iterator I = Chain->use_begin(), E = Chain->use_end();
237 SDNode *User = *I;
266 SmallVector<SDNode*, 4> Loads;
269 SDNode *BaseLoad = O2SMap[BaseOff];
273 SDNode *Load = O2SMap[Offset];
285 SDNode *Lead = Loads[0];
291 SDNode *Load = Loads[I];
309 for (SDNode &NI : DAG->allnodes()) {
310 SDNode *Node = &NI;
327 for (SDNode &NI : DAG->allnodes()) {
340 SmallVector<SDNode*, 64> Worklist;
341 SmallPtrSet<SDNode*, 32> Visited;
347 SDNode *NI = Worklist.pop_back_val();
367 SDNode *N = NI;
384 for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end();
424 for (const SDNode *SUNode = SU->getNode(); SUNode;
428 SDNode *SrcN = SUNode->getOperand(2).getNode();
445 SDNode *MainNode = SU->getNode();
461 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode()) {
473 SDNode *OpN = N->getOperand(i).getNode();
609 SDNode *N = SU->getNode();
637 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode())
642 void ScheduleDAGSDNodes::computeOperandLatency(SDNode *Def, SDNode *Use,
642 void ScheduleDAGSDNodes::computeOperandLatency(SDNode *Def, SDNode *Use,
681 SmallVector<SDNode *, 4> GluedNodes;
682 for (SDNode *N = SU.getNode()->getGluedNode(); N; N = N->getGluedNode())
732 ProcessSDDbgValues(SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter,
760 ProcessSourceNode(SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter,
903 SmallVector<SDNode *, 4> GluedNodes;
904 for (SDNode *N = SU->getNode()->getGluedNode(); N; N = N->getGluedNode())
907 SDNode *N = GluedNodes.back();
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h 65 static bool isPassiveNode(SDNode *Node) {
86 SUnit *newSUnit(SDNode *N);
107 virtual void computeOperandLatency(SDNode *Def, SDNode *Use,
107 virtual void computeOperandLatency(SDNode *Def, SDNode *Use,
140 const SDNode *Node;
155 const SDNode *GetNode() const {
178 void ClusterNeighboringLoads(SDNode *Node);
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 86 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
86 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
87 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
88 void SelectionDAG::DAGUpdateListener::NodeInserted(SDNode *) {}
135 bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) {
152 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
196 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
233 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
246 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
259 bool ISD::allOperandsUndef(const SDNode *N) {
472 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
640 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
656 static bool doNotCSE(SDNode *N) {
682 SmallVector<SDNode*, 128> DeadNodes;
685 for (SDNode &Node : allnodes())
697 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
702 SDNode *N = DeadNodes.pop_back_val();
717 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
719 SDNode *Operand = Use.getNode();
731 void SelectionDAG::RemoveDeadNode(SDNode *N){
732 SmallVector<SDNode*, 16> DeadNodes(1, N);
742 void SelectionDAG::DeleteNode(SDNode *N) {
751 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
762 void SDDbgInfo::erase(const SDNode *Node) {
771 void SelectionDAG::DeallocateNode(SDNode *N) {
791 static void VerifySDNode(SDNode *N) {
815 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
833 void SelectionDAG::InsertNode(SDNode *N) {
847 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
907 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
911 SDNode *Existing = CSEMap.GetOrInsertNode(N);
935 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
935 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
944 SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
954 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
954 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
964 SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
974 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
974 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
982 SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
1036 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
1038 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
1051 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
1053 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
1269 SDNode *N = nullptr;
1320 SDNode *N = nullptr;
1379 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
1395 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1414 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1441 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1467 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1485 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1499 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1513 SDNode *&N = VT.isExtended() ?
1523 SDNode *&N = ExternalSymbols[Sym];
1531 SDNode *&N = MCSymbols[Sym];
1541 SDNode *&N =
1722 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
1757 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1772 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1793 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1816 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1834 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1849 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1874 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
1896 SDValue SelectionDAG::expandVAArg(SDNode *Node) {
1930 SDValue SelectionDAG::expandVACopy(SDNode *Node) {
4266 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
4269 auto *N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4269 auto *N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4667 SDNode *N;
4674 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
4679 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
4684 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
4751 const SDNode *N2) {
4795 EVT VT, SDNode *N1, SDNode *N2) {
4795 EVT VT, SDNode *N1, SDNode *N2) {
5418 SDNode *N;
5425 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
5430 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
5435 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
5563 SDNode *N;
5570 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
5575 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
5580 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
5614 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
6488 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
6603 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
6641 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
6752 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
6854 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
6921 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
6949 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
6977 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
7007 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
7035 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
7076 if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
7241 SDNode *N;
7249 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
7252 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7257 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7301 SDNode *N;
7306 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
7309 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList);
7313 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList);
7359 return makeVTList(SDNode::getValueTypeList(VT), 1);
7448 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
7448 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
7456 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
7473 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
7473 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
7482 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
7502 SDNode *SelectionDAG::
7503 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
7508 SDNode *SelectionDAG::
7509 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
7515 SDNode *SelectionDAG::
7516 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
7522 SDNode *SelectionDAG::
7523 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
7534 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
7588 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7588 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7594 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7594 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7601 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7601 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7609 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7609 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7617 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7617 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7623 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7623 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7629 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7629 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7635 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7635 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7642 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7642 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7650 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7650 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
7652 SDNode *New = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
7669 SDNode *SelectionDAG::UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &OLoc) {
7669 SDNode *SelectionDAG::UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &OLoc) {
7695 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
7695 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
7702 if (SDNode *ON = FindNodeOrInsertPos(ID, SDLoc(N), IP))
7716 SmallPtrSet<SDNode*, 16> DeadNodeSet;
7717 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
7719 SDNode *Used = Use.getNode();
7736 SmallVector<SDNode *, 16> DeadNodes;
7737 for (SDNode *N : DeadNodeSet)
7748 SDNode* SelectionDAG::mutateStrictFPToFP(SDNode *Node) {
7748 SDNode* SelectionDAG::mutateStrictFPToFP(SDNode *Node) {
7800 SDNode *Res = MorphNodeTo(Node, NewOpc, VTs, Ops);
7922 if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
7944 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
7954 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
7961 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
7968 if (SDNode *E = FindNodeOrInsertPos(ID, SDLoc(), IP)) {
7980 SDNode *N, unsigned R, bool IsIndirect,
8024 SDNode *FromNode = From.getNode();
8025 SDNode *ToNode = To.getNode();
8081 void SelectionDAG::salvageDebugInfo(SDNode &N) {
8137 SDNode::use_iterator &UI;
8138 SDNode::use_iterator &UE;
8140 void NodeDeleted(SDNode *N, SDNode *E) override {
8140 void NodeDeleted(SDNode *N, SDNode *E) override {
8148 SDNode::use_iterator &ui,
8149 SDNode::use_iterator &ue)
8161 SDNode *From = FromN.getNode();
8176 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
8179 SDNode *User = *UI;
8211 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
8211 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
8232 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
8235 SDNode *User = *UI;
8267 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
8277 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
8280 SDNode *User = *UI;
8329 SDNode::use_iterator UI = From.getNode()->use_begin(),
8333 SDNode *User = *UI;
8381 SDNode *User;
8393 void SelectionDAG::updateDivergence(SDNode * N)
8410 void SelectionDAG::CreateTopologicalOrder(std::vector<SDNode *> &Order) {
8411 DenseMap<SDNode *, unsigned> Degree;
8413 for (auto &N : allnodes()) {
8420 SDNode *N = Order[I];
8431 std::vector<SDNode *> TopoOrder;
8434 DenseMap<const SDNode *, bool> DivergenceMap;
8435 for (auto &N : allnodes()) {
8449 for (auto &N : allnodes()) {
8476 SDNode *FromNode = From[i].getNode();
8477 for (SDNode::use_iterator UI = FromNode->use_begin(),
8494 SDNode *User = Uses[UseIndex].User;
8536 SDNode *N = &*I++;
8555 for (SDNode &Node : allnodes()) {
8556 SDNode *N = &Node;
8560 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
8562 SDNode *P = *UI;
8581 SDNode *S = &*++I;
8609 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
8892 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
8909 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
8917 bool SDNode::isOnlyUserOf(const SDNode *N) const {
8919 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
8920 SDNode *User = *I;
8931 bool SDNode::areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N) {
8931 bool SDNode::areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N) {
8933 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
8934 SDNode *User = *I;
8946 bool SDValue::isOperandOf(const SDNode *N) const {
8950 bool SDNode::isOperandOf(const SDNode *N) const {
9003 bool SDNode::hasPredecessor(const SDNode *N) const {
9004 SmallPtrSet<const SDNode *, 32> Visited;
9005 SmallVector<const SDNode *, 16> Worklist;
9015 SelectionDAG::matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
9110 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
9180 SDNode *N, unsigned ResNE) {
9538 SDNode *SelectionDAG::isConstantIntBuildVectorOrConstantInt(SDValue N) {
9552 SDNode *SelectionDAG::isConstantFPBuildVectorOrConstantFP(SDValue N) {
9562 void SelectionDAG::createOperands(SDNode *Node, ArrayRef<SDValue> Vals) {
9586 size_t Limit = SDNode::getMaxNumOperands();
9598 static void checkForCyclesHelper(const SDNode *N,
9599 SmallPtrSetImpl<const SDNode*> &Visited,
9600 SmallPtrSetImpl<const SDNode*> &Checked,
9623 void llvm::checkForCycles(const llvm::SDNode *N,
9633 SmallPtrSet<const SDNode*, 32> visited;
9634 SmallPtrSet<const SDNode*, 32> checked;
lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp 85 bool BaseIndexOffset::computeAliasing(const SDNode *Op0,
87 const SDNode *Op1,
270 BaseIndexOffset BaseIndexOffset::match(const SDNode *N,
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 1098 if (SDNode *Node = getNodeForIRValue(&I)) {
1475 SDNode *Val = getValue(*OI).getNode();
1491 SDNode *Val = getValue(CDS->getElementAsConstant(i)).getNode();
8733 SDNode *SM = DAG.getMachineNode(TargetOpcode::STACKMAP, DL, NodeTys, Ops);
8793 SDNode *CallEnd = Result.second.getNode();
8801 SDNode *Call = CallEnd->getOperand(0).getNode();
8836 SDNode::op_iterator e = HasGlue ? Call->op_end()-2 : Call->op_end()-1;
9357 void TargetLowering::LowerOperationWrapper(SDNode *N,
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h 504 SDNode *getNodeForIRValue(const Value *V) {
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 455 static Printable PrintNodeId(const SDNode &Node) {
792 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
803 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
820 const SDNode *N = &*I;
869 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
871 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
909 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 298 SDNode *Node) const {
738 SmallPtrSet<SDNode*, 16> VisitedNodes;
739 SmallVector<SDNode*, 128> Worklist;
746 SDNode *N = Worklist.pop_back_val();
1034 void NodeDeleted(SDNode *N, SDNode *E) override {
1034 void NodeDeleted(SDNode *N, SDNode *E) override {
1062 void SelectionDAGISel::EnforceNodeIdInvariant(SDNode *Node) {
1063 SmallVector<SDNode *, 4> Nodes;
1067 SDNode *N = Nodes.pop_back_val();
1068 for (auto *U : N->uses()) {
1081 void SelectionDAGISel::InvalidateNodeId(SDNode *N) {
1087 int SelectionDAGISel::getUninvalidatedNodeId(SDNode *N) {
1122 SDNode *Node = &*--ISelPosition;
1130 SmallVector<SDNode *, 4> Nodes;
2091 static SDNode *findGlueUse(SDNode *N) {
2091 static SDNode *findGlueUse(SDNode *N) {
2093 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
2103 static bool findNonImmUse(SDNode *Root, SDNode *Def, SDNode *ImmedUse,
2103 static bool findNonImmUse(SDNode *Root, SDNode *Def, SDNode *ImmedUse,
2103 static bool findNonImmUse(SDNode *Root, SDNode *Def, SDNode *ImmedUse,
2105 SmallPtrSet<const SDNode *, 16> Visited;
2106 SmallVector<const SDNode *, 16> WorkList;
2115 SDNode *N = Op.getNode();
2128 SDNode *N = Op.getNode();
2138 return SDNode::hasPredecessorHelper(Def, Visited, WorkList, 0, true);
2143 bool SelectionDAGISel::IsProfitableToFold(SDValue N, SDNode *U,
2144 SDNode *Root) const {
2151 bool SelectionDAGISel::IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
2151 bool SelectionDAGISel::IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
2202 SDNode *GU = findGlueUse(Root);
2218 void SelectionDAGISel::Select_INLINEASM(SDNode *N, bool Branch) {
2231 void SelectionDAGISel::Select_READ_REGISTER(SDNode *Op) {
2245 void SelectionDAGISel::Select_WRITE_REGISTER(SDNode *Op) {
2259 void SelectionDAGISel::Select_UNDEF(SDNode *N) {
2283 SDNode *NodeToMatch, SDValue InputChain,
2284 SmallVectorImpl<SDNode *> &ChainNodesMatched, bool isMorphNodeTo) {
2285 SmallVector<SDNode*, 4> NowDeadNodes;
2295 SDNode *ChainNode = ChainNodesMatched[i];
2341 HandleMergeInputChains(SmallVectorImpl<SDNode*> &ChainNodesMatched,
2344 SmallPtrSet<const SDNode *, 16> Visited;
2345 SmallVector<const SDNode *, 8> Worklist;
2369 for (auto *N : ChainNodesMatched) {
2388 for (auto *N : ChainNodesMatched)
2389 if (SDNode::hasPredecessorHelper(N, Visited, Worklist, Max, true))
2400 SDNode *SelectionDAGISel::
2401 MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
2422 SDNode *Res = CurDAG->MorphNodeTo(Node, ~TargetOpc, VTList, Ops);
2464 const SmallVectorImpl<std::pair<SDValue, SDNode*>> &RecordedNodes) {
2475 const SmallVectorImpl<std::pair<SDValue, SDNode*>> &RecordedNodes,
2493 const SelectionDAGISel &SDISel, SDNode *N) {
2499 SDNode *N) {
2606 SmallVectorImpl<std::pair<SDValue, SDNode*>> &RecordedNodes) {
2710 SDNode **NodeToMatch;
2711 SmallVectorImpl<std::pair<SDValue, SDNode *>> &RecordedNodes;
2715 MatchStateUpdater(SelectionDAG &DAG, SDNode **NodeToMatch,
2716 SmallVectorImpl<std::pair<SDValue, SDNode *>> &RN,
2721 void NodeDeleted(SDNode *N, SDNode *E) override {
2721 void NodeDeleted(SDNode *N, SDNode *E) override {
2748 void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
2815 SmallVector<std::pair<SDValue, SDNode*>, 8> RecordedNodes;
2830 SmallVector<SDNode*, 3> ChainNodesMatched;
2940 SDNode *Parent = nullptr;
3622 bool SelectionDAGISel::isOrEquivalentToAdd(const SDNode *N) const {
3641 void SelectionDAGISel::CannotYetSelect(SDNode *N) {
lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp 66 SDNode *TargetNode = *I;
80 static std::string getNodeIdentifierLabel(const SDNode *Node,
107 static std::string getSimpleNodeLabel(const SDNode *Node,
116 std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph);
117 static std::string getNodeAttributes(const SDNode *N,
141 std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node,
181 void SelectionDAG::setGraphAttrs(const SDNode *N, const char *Attrs) {
193 const std::string SelectionDAG::getGraphAttrs(const SDNode *N) const {
195 std::map<const SDNode *, std::string>::const_iterator I =
211 void SelectionDAG::setGraphColor(const SDNode *N, const char *Color) {
223 bool SelectionDAG::setSubgraphColorHelper(SDNode *N, const char *Color, DenseSet<SDNode *> &visited,
223 bool SelectionDAG::setSubgraphColorHelper(SDNode *N, const char *Color, DenseSet<SDNode *> &visited,
255 void SelectionDAG::setSubgraphColor(SDNode *N, const char *Color) {
257 DenseSet<SDNode *> visited;
279 SmallVector<SDNode *, 4> GluedNodes;
280 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode())
299 const SDNode *N = DAG->getRoot().getNode();
lib/CodeGen/SelectionDAG/StatepointLowering.cpp 313 static std::pair<SDValue, SDNode *> lowerCallFromStatepointLoweringInfo(
319 SDNode *CallEnd = CallEndVal.getNode();
672 SDNode *CallNode;
747 SDNode::op_iterator RegMaskIt;
784 SDNode *SinkNode = StatepointMCNode;
lib/CodeGen/SelectionDAG/TargetLowering.cpp 51 bool TargetLowering::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
1999 const SDNode *N = Op.getNode();
2003 SDNode *Op = *I;
2701 bool TargetLowering::isConstTrueVal(const SDNode *N) const {
2735 bool TargetLowering::isConstFalseVal(const SDNode *N) const {
3934 bool TargetLowering::isGAPlusOffset(SDNode *WN, const GlobalValue *&GA,
3937 SDNode *N = unwrapAddress(SDValue(WN, 0)).getNode();
3964 SDValue TargetLowering::PerformDAGCombine(SDNode *N,
4562 static SDValue BuildExactSDIV(const TargetLowering &TLI, SDNode *N,
4564 SmallVectorImpl<SDNode *> &Created) {
4621 SDValue TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
4623 SmallVectorImpl<SDNode *> &Created) const {
4635 SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
4637 SmallVectorImpl<SDNode *> &Created) const {
4744 SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
4746 SmallVectorImpl<SDNode *> &Created) const {
4911 SmallVector<SDNode *, 2> Built;
4914 for (SDNode *N : Built)
4926 SmallVectorImpl<SDNode *> &Created) const {
5078 SmallVector<SDNode *, 7> Built;
5082 for (SDNode *N : Built)
5094 SmallVectorImpl<SDNode *> &Created) const {
5769 bool TargetLowering::expandMUL(SDNode *N, SDValue &Lo, SDValue &Hi, EVT HiLoVT,
5785 bool TargetLowering::expandFunnelShift(SDNode *Node, SDValue &Result,
5834 bool TargetLowering::expandROT(SDNode *Node, SDValue &Result,
5878 bool TargetLowering::expandFP_TO_SINT(SDNode *Node, SDValue &Result,
5949 bool TargetLowering::expandFP_TO_UINT(SDNode *Node, SDValue &Result,
6034 bool TargetLowering::expandUINT_TO_FP(SDNode *Node, SDValue &Result,
6119 SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode *Node,
6159 bool TargetLowering::expandCTPOP(SDNode *Node, SDValue &Result,
6219 bool TargetLowering::expandCTLZ(SDNode *Node, SDValue &Result,
6272 bool TargetLowering::expandCTTZ(SDNode *Node, SDValue &Result,
6327 bool TargetLowering::expandABS(SDNode *N, SDValue &Result,
6882 SDValue TargetLowering::expandAddSubSat(SDNode *Node, SelectionDAG &DAG) const {
6963 TargetLowering::expandFixedPointMul(SDNode *Node, SelectionDAG &DAG) const {
7103 SDNode *Node, SDValue &Result, SDValue &Overflow, SelectionDAG &DAG) const {
7132 SDNode *Node, SDValue &Result, SDValue &Overflow, SelectionDAG &DAG) const {
7171 bool TargetLowering::expandMULO(SDNode *Node, SDValue &Result,
7315 SDValue TargetLowering::expandVecReduce(SDNode *Node, SelectionDAG &DAG) const {
lib/CodeGen/TargetInstrInfo.cpp 1039 SDNode *DefNode, unsigned DefIdx,
1040 SDNode *UseNode, unsigned UseIdx) const {
1055 SDNode *N) const {
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 60 void Select(SDNode *Node) override;
68 bool tryMLAV64LaneV128(SDNode *N);
69 bool tryMULLV64LaneV128(unsigned IntNo, SDNode *N);
177 void SelectTable(SDNode *N, unsigned NumVecs, unsigned Opc, bool isExt);
179 bool tryIndexedLoad(SDNode *N);
181 bool trySelectStackSlotTagP(SDNode *N);
182 void SelectTagP(SDNode *N);
184 void SelectLoad(SDNode *N, unsigned NumVecs, unsigned Opc,
186 void SelectPostLoad(SDNode *N, unsigned NumVecs, unsigned Opc,
188 void SelectLoadLane(SDNode *N, unsigned NumVecs, unsigned Opc);
189 void SelectPostLoadLane(SDNode *N, unsigned NumVecs, unsigned Opc);
191 void SelectStore(SDNode *N, unsigned NumVecs, unsigned Opc);
192 void SelectPostStore(SDNode *N, unsigned NumVecs, unsigned Opc);
193 void SelectStoreLane(SDNode *N, unsigned NumVecs, unsigned Opc);
194 void SelectPostStoreLane(SDNode *N, unsigned NumVecs, unsigned Opc);
196 bool tryBitfieldExtractOp(SDNode *N);
197 bool tryBitfieldExtractOpFromSExt(SDNode *N);
198 bool tryBitfieldInsertOp(SDNode *N);
199 bool tryBitfieldInsertInZeroOp(SDNode *N);
200 bool tryShiftAmountMod(SDNode *N);
202 bool tryReadRegister(SDNode *N);
203 bool tryWriteRegister(SDNode *N);
239 bool SelectCMP_SWAP(SDNode *N);
246 static bool isIntImmediate(const SDNode *N, uint64_t &Imm) {
263 static bool isOpcWithIntImmediate(const SDNode *N, unsigned Opc,
389 const SDNode *Node = V.getNode();
390 for (SDNode *UI : Node->uses())
392 for (SDNode *UII : UI->uses())
503 static bool checkHighLaneIndex(SDNode *DL, SDValue &LaneOp, int &LaneIdx) {
541 bool AArch64DAGToDAGISel::tryMLAV64LaneV128(SDNode *N) {
586 bool AArch64DAGToDAGISel::tryMULLV64LaneV128(unsigned IntNo, SDNode *N) {
934 const SDNode *Node = N.getNode();
935 for (SDNode *UI : Node->uses()) {
1018 const SDNode *Node = N.getNode();
1019 for (SDNode *UI : Node->uses()) {
1046 SDNode *MOVI =
1123 SDNode *N =
1128 void AArch64DAGToDAGISel::SelectTable(SDNode *N, unsigned NumVecs, unsigned Opc,
1149 bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) {
1222 SDNode *Res = CurDAG->getMachineNode(Opcode, dl, MVT::i64, DstVT,
1243 void AArch64DAGToDAGISel::SelectLoad(SDNode *N, unsigned NumVecs, unsigned Opc,
1254 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops);
1269 void AArch64DAGToDAGISel::SelectPostLoad(SDNode *N, unsigned NumVecs,
1282 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops);
1301 void AArch64DAGToDAGISel::SelectStore(SDNode *N, unsigned NumVecs,
1312 SDNode *St = CurDAG->getMachineNode(Opc, dl, N->getValueType(0), Ops);
1321 void AArch64DAGToDAGISel::SelectPostStore(SDNode *N, unsigned NumVecs,
1337 SDNode *St = CurDAG->getMachineNode(Opc, dl, ResTys, Ops);
1377 void AArch64DAGToDAGISel::SelectLoadLane(SDNode *N, unsigned NumVecs,
1399 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops);
1416 void AArch64DAGToDAGISel::SelectPostLoadLane(SDNode *N, unsigned NumVecs,
1443 SDNode *Ld = CurDAG->getMachineNode(Opc, dl, ResTys, Ops);
1471 void AArch64DAGToDAGISel::SelectStoreLane(SDNode *N, unsigned NumVecs,
1491 SDNode *St = CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops);
1500 void AArch64DAGToDAGISel::SelectPostStoreLane(SDNode *N, unsigned NumVecs,
1525 SDNode *St = CurDAG->getMachineNode(Opc, dl, ResTys, Ops);
1534 static bool isBitfieldExtractOpFromAnd(SelectionDAG *CurDAG, SDNode *N,
1562 const SDNode *Op0 = N->getOperand(0).getNode();
1626 static bool isBitfieldExtractOpFromSExtInReg(SDNode *N, unsigned &Opc,
1659 static bool isSeveralBitsExtractOpFromShr(SDNode *N, unsigned &Opc,
1705 static bool isBitfieldExtractOpFromShr(SDNode *N, unsigned &Opc, SDValue &Opd0,
1772 bool AArch64DAGToDAGISel::tryBitfieldExtractOpFromSExt(SDNode *N) {
1796 static bool isBitfieldExtractOp(SelectionDAG *CurDAG, SDNode *N, unsigned &Opc,
1837 bool AArch64DAGToDAGISel::tryBitfieldExtractOp(SDNode *N) {
1852 SDNode *BFM = CurDAG->getMachineNode(Opc, dl, MVT::i64, Ops64);
2028 static void getUsefulBitsForUse(SDNode *UserNode, APInt &UsefulBits,
2088 for (SDNode *Node : Op.getNode()->uses()) {
2112 SDNode *ShiftNode;
2193 static bool tryBitfieldInsertOpFromOrAndImm(SDNode *N, SelectionDAG *CurDAG) {
2269 SDNode *MOVI = CurDAG->getMachineNode(
2281 static bool tryBitfieldInsertOpFromOr(SDNode *N, const APInt &UsefulBits,
2321 SDNode *OrOpd0 = OrOpd0Val.getNode();
2323 SDNode *OrOpd1 = OrOpd1Val.getNode();
2421 SDNode *LSR = CurDAG->getMachineNode(
2441 bool AArch64DAGToDAGISel::tryBitfieldInsertOp(SDNode *N) {
2463 bool AArch64DAGToDAGISel::tryBitfieldInsertInZeroOp(SDNode *N) {
2492 bool AArch64DAGToDAGISel::tryShiftAmountMod(SDNode *N) {
2674 bool AArch64DAGToDAGISel::tryReadRegister(SDNode *N) {
2720 bool AArch64DAGToDAGISel::tryWriteRegister(SDNode *N) {
2782 bool AArch64DAGToDAGISel::SelectCMP_SWAP(SDNode *N) {
2803 SDNode *CmpSwap = CurDAG->getMachineNode(
2817 bool AArch64DAGToDAGISel::trySelectStackSlotTagP(SDNode *N) {
2839 SDNode *Out = CurDAG->getMachineNode(
2847 void AArch64DAGToDAGISel::SelectTagP(SDNode *N) {
2858 SDNode *N1 = CurDAG->getMachineNode(AArch64::SUBP, DL, MVT::i64,
2860 SDNode *N2 = CurDAG->getMachineNode(AArch64::ADDXrr, DL, MVT::i64,
2862 SDNode *N3 = CurDAG->getMachineNode(
2869 void AArch64DAGToDAGISel::Select(SDNode *Node) {
2983 SDNode *Ld = CurDAG->getMachineNode(Op, DL, MVT::i64, MVT::i64,
3006 SDNode *St = CurDAG->getMachineNode(Op, DL, MVT::i32, MVT::Other, Ops);
lib/Target/AArch64/AArch64ISelLowering.cpp 2648 static bool isExtendedBUILD_VECTOR(SDNode *N, SelectionDAG &DAG,
2674 static SDValue skipExtensionForVectorMULL(SDNode *N, SelectionDAG &DAG) {
2698 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) {
2703 static bool isZeroExtended(SDNode *N, SelectionDAG &DAG) {
2708 static bool isAddSubSExt(SDNode *N, SelectionDAG &DAG) {
2711 SDNode *N0 = N->getOperand(0).getNode();
2712 SDNode *N1 = N->getOperand(1).getNode();
2719 static bool isAddSubZExt(SDNode *N, SelectionDAG &DAG) {
2722 SDNode *N0 = N->getOperand(0).getNode();
2723 SDNode *N1 = N->getOperand(1).getNode();
2756 SDNode *N0 = Op.getOperand(0).getNode();
2757 SDNode *N1 = Op.getOperand(1).getNode();
3689 for (SDNode::use_iterator U = DAG.getEntryNode().getNode()->use_begin(),
5277 SDNode *Dest =
7345 static unsigned getIntrinsicID(const SDNode *N) {
7363 static SDValue tryLowerToSLI(SDNode *N, SelectionDAG &DAG) {
7629 SDNode *Vector = nullptr;
7636 const SDNode *N = V.getNode();
8319 SDNode *Node = Op.getNode();
8462 bool AArch64TargetLowering::shouldReduceLoadWidth(SDNode *Load,
9217 AArch64TargetLowering::isDesirableToCommuteWithShift(const SDNode *N,
9269 static SDValue foldVectorXorShiftIntoCmp(SDNode *N, SelectionDAG &DAG,
9293 static SDValue performIntegerAbsCombine(SDNode *N, SelectionDAG &DAG) {
9320 static SDValue performXorCombine(SDNode *N, SelectionDAG &DAG,
9333 AArch64TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
9335 SmallVectorImpl<SDNode *> &Created) const {
9375 static SDValue performMulCombine(SDNode *N, SelectionDAG &DAG,
9475 static SDValue performVectorCompareAndMaskUnaryOpCombine(SDNode *N,
9521 static SDValue performIntToFpCombine(SDNode *N, SelectionDAG &DAG,
9562 static SDValue performFpToIntCombine(SDNode *N, SelectionDAG &DAG,
9637 static SDValue performFDivCombine(SDNode *N, SelectionDAG &DAG,
9728 static SDValue tryCombineToEXTR(SDNode *N,
9768 static SDValue tryCombineToBSL(SDNode *N,
9815 static SDValue performORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
9833 static SDValue performANDCombine(SDNode *N,
9873 static SDValue performSRLCombine(SDNode *N,
9901 static SDValue performBitcastCombine(SDNode *N,
9969 static SDValue performConcatVectorsCombine(SDNode *N,
10051 static SDValue tryCombineFixedPointConvert(SDNode *N,
10246 static SDValue performSetccAddFolding(SDNode *Op, SelectionDAG &DAG) {
10296 static SDValue performAddSubLongCombine(SDNode *N,
10345 static SDValue tryCombineLongOpWithDup(unsigned IID, SDNode *N,
10374 static SDValue tryCombineShiftImm(unsigned IID, SDNode *N, SelectionDAG &DAG) {
10445 static SDValue tryCombineCRC32(unsigned Mask, SDNode *N, SelectionDAG &DAG) {
10458 static SDValue combineAcrossLanesIntrinsic(unsigned Opc, SDNode *N,
10468 static SDValue performIntrinsicCombine(SDNode *N,
10526 static SDValue performExtendCombine(SDNode *N,
10535 SDNode *ABDNode = N->getOperand(0).getNode();
10795 static SDValue splitStores(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
10867 static SDValue performPostLD1Combine(SDNode *N,
10877 SDNode *LD = N->getOperand(LoadIdx).getNode();
10899 for (SDNode::use_iterator UI = LD->use_begin(), UE = LD->use_end(); UI != UE;
10910 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), UE =
10912 SDNode *User = *UI;
10929 SmallPtrSet<const SDNode *, 32> Visited;
10930 SmallVector<const SDNode *, 16> Worklist;
10935 if (SDNode::hasPredecessorHelper(LD, Visited, Worklist) ||
10936 SDNode::hasPredecessorHelper(User, Visited, Worklist))
10986 static SDValue performSTORECombine(SDNode *N,
11003 static SDValue performNEONPostLDSTCombine(SDNode *N,
11013 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(),
11015 SDNode *User = *UI;
11022 SmallPtrSet<const SDNode *, 32> Visited;
11023 SmallVector<const SDNode *, 16> Worklist;
11027 if (SDNode::hasPredecessorHelper(N, Visited, Worklist) ||
11028 SDNode::hasPredecessorHelper(User, Visited, Worklist))
11321 SDValue performCONDCombine(SDNode *N,
11326 SDNode *SubsNode = N->getOperand(CmpIndex).getNode();
11335 SDNode *AndNode = SubsNode->getOperand(0).getNode();
11395 static SDValue performBRCONDCombine(SDNode *N,
11534 static SDValue performTBZCombine(SDNode *N,
11565 static SDValue performVSelectCombine(SDNode *N, SelectionDAG &DAG) {
11594 static SDValue performSelectCombine(SDNode *N,
11655 static SDValue performNVCASTCombine(SDNode *N) {
11665 static SDValue performGlobalAddressCombine(SDNode *N, SelectionDAG &DAG,
11674 for (SDNode *N : GN->uses()) {
11715 SDValue AArch64TargetLowering::PerformDAGCombine(SDNode *N,
11815 bool AArch64TargetLowering::isUsedByReturnOnly(SDNode *N,
11823 SDNode *Copy = *N->use_begin();
11835 for (SDNode *Node : Copy->uses()) {
11856 bool AArch64TargetLowering::getIndexedAddressParts(SDNode *Op, SDValue &Base,
11880 bool AArch64TargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
11903 SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset,
11903 SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset,
11927 static void ReplaceBITCASTResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
11944 static void ReplaceReductionResults(SDNode *N,
11985 static void ReplaceCMP_SWAP_128Results(SDNode *N,
12042 SDNode *CmpSwap = DAG.getMachineNode(
12055 SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const {
12361 SDNode *N) const {
lib/Target/AArch64/AArch64ISelLowering.h 240 static inline bool isDef32(const SDNode &N) {
298 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
343 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
404 bool isDesirableToCommuteWithShift(const SDNode *N,
509 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override;
706 SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor, SelectionDAG &DAG,
707 SmallVectorImpl<SDNode *> &Created) const override;
745 bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override;
747 bool getIndexedAddressParts(SDNode *Op, SDValue &Base, SDValue &Offset,
750 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset,
753 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
753 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
757 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
lib/Target/AArch64/AArch64SelectionDAGInfo.cpp 129 SDNode *St1 = DAG.getMachineNode(
141 SDNode *St = DAG.getMachineNode(
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 103 static SDNode *packConstantV2I16(const SDNode *N, SelectionDAG &DAG,
103 static SDNode *packConstantV2I16(const SDNode *N, SelectionDAG &DAG,
120 static SDNode *packNegConstantV2I16(const SDNode *N, SelectionDAG &DAG) {
120 static SDNode *packNegConstantV2I16(const SDNode *N, SelectionDAG &DAG) {
150 bool matchLoadD16FromBuildVector(SDNode *N) const;
154 void Select(SDNode *N) override;
159 void SelectBuildVector(SDNode *N, unsigned RegClassID);
164 bool isInlineImmediate(const SDNode *N, bool Negated = false) const;
165 bool isNegInlineImmediate(const SDNode *N) const {
169 bool isVGPRImm(const SDNode *N) const;
170 bool isUniformLoad(const SDNode *N) const;
171 bool isUniformBr(const SDNode *N) const;
175 SDNode *glueCopyToOp(SDNode *N, SDValue NewChain, SDValue Glue) const;
175 SDNode *glueCopyToOp(SDNode *N, SDValue NewChain, SDValue Glue) const;
176 SDNode *glueCopyToM0(SDNode *N, SDValue Val) const;
176 SDNode *glueCopyToM0(SDNode *N, SDValue Val) const;
177 SDNode *glueCopyToM0LDSInit(SDNode *N) const;
177 SDNode *glueCopyToM0LDSInit(SDNode *N) const;
179 const TargetRegisterClass *getOperandRegClass(SDNode *N, unsigned OpNo) const;
198 bool SelectMUBUFScratchOffen(SDNode *Parent,
201 bool SelectMUBUFScratchOffset(SDNode *Parent,
214 bool SelectFlatOffset(SDNode *N, SDValue Addr, SDValue &VAddr,
216 bool SelectFlatAtomic(SDNode *N, SDValue Addr, SDValue &VAddr,
218 bool SelectFlatAtomicSigned(SDNode *N, SDValue Addr, SDValue &VAddr,
268 void SelectADD_SUB_I64(SDNode *N);
269 void SelectAddcSubb(SDNode *N);
270 void SelectUADDO_USUBO(SDNode *N);
271 void SelectDIV_SCALE(SDNode *N);
272 void SelectDIV_FMAS(SDNode *N);
273 void SelectMAD_64_32(SDNode *N);
274 void SelectFMA_W_CHAIN(SDNode *N);
275 void SelectFMUL_W_CHAIN(SDNode *N);
277 SDNode *getS_BFE(unsigned Opcode, const SDLoc &DL, SDValue Val,
279 void SelectS_BFEFromShifts(SDNode *N);
280 void SelectS_BFE(SDNode *N);
281 bool isCBranchSCC(const SDNode *N) const;
282 void SelectBRCOND(SDNode *N);
283 void SelectFMAD_FMA(SDNode *N);
284 void SelectATOMIC_CMP_SWAP(SDNode *N);
285 void SelectDSAppendConsume(SDNode *N, unsigned IntrID);
286 void SelectDS_GWS(SDNode *N, unsigned IntrID);
287 void SelectINTRINSIC_W_CHAIN(SDNode *N);
288 void SelectINTRINSIC_WO_CHAIN(SDNode *N);
289 void SelectINTRINSIC_VOID(SDNode *N);
307 void Select(SDNode *N) override;
398 bool AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(SDNode *N) const {
486 SDNode *N = &*--Position;
517 bool AMDGPUDAGToDAGISel::isInlineImmediate(const SDNode *N,
545 const TargetRegisterClass *AMDGPUDAGToDAGISel::getOperandRegClass(SDNode *N,
589 SDNode *AMDGPUDAGToDAGISel::glueCopyToOp(SDNode *N, SDValue NewChain,
589 SDNode *AMDGPUDAGToDAGISel::glueCopyToOp(SDNode *N, SDValue NewChain,
600 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0(SDNode *N, SDValue Val) const {
600 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0(SDNode *N, SDValue Val) const {
610 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0LDSInit(SDNode *N) const {
610 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0LDSInit(SDNode *N) const {
626 SDNode *Lo = CurDAG->getMachineNode(
629 SDNode *Hi =
663 void AMDGPUDAGToDAGISel::SelectBuildVector(SDNode *N, unsigned RegClassID) {
714 void AMDGPUDAGToDAGISel::Select(SDNode *N) {
776 if (SDNode *Packed = packConstantV2I16(N, *CurDAG)) {
926 bool AMDGPUDAGToDAGISel::isUniformBr(const SDNode *N) const {
972 SDNode *Mov = CurDAG->getMachineNode(
979 void AMDGPUDAGToDAGISel::SelectADD_SUB_I64(SDNode *N) {
993 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
995 SDNode *Hi0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
998 SDNode *Lo1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
1000 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
1008 SDNode *AddLo;
1021 SDNode *AddHi = CurDAG->getMachineNode(CarryOpc, DL, VTList, AddHiArgs);
1030 SDNode *RegSequence = CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, DL,
1042 void AMDGPUDAGToDAGISel::SelectAddcSubb(SDNode *N) {
1055 void AMDGPUDAGToDAGISel::SelectUADDO_USUBO(SDNode *N) {
1068 void AMDGPUDAGToDAGISel::SelectFMA_W_CHAIN(SDNode *N) {
1082 void AMDGPUDAGToDAGISel::SelectFMUL_W_CHAIN(SDNode *N) {
1097 void AMDGPUDAGToDAGISel::SelectDIV_SCALE(SDNode *N) {
1110 void AMDGPUDAGToDAGISel::SelectDIV_FMAS(SDNode *N) {
1141 void AMDGPUDAGToDAGISel::SelectMAD_64_32(SDNode *N) {
1479 bool AMDGPUDAGToDAGISel::SelectMUBUFScratchOffen(SDNode *Parent,
1546 bool AMDGPUDAGToDAGISel::SelectMUBUFScratchOffset(SDNode *Parent,
1619 static MemSDNode* findMemSDNode(SDNode *N) {
1632 bool AMDGPUDAGToDAGISel::SelectFlatOffset(SDNode *N,
1691 SDNode *N0Lo = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
1693 SDNode *N0Hi = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
1704 SDNode *Add = CurDAG->getMachineNode(
1708 SDNode *Addc = CurDAG->getMachineNode(
1728 bool AMDGPUDAGToDAGISel::SelectFlatAtomic(SDNode *N,
1736 bool AMDGPUDAGToDAGISel::SelectFlatAtomicSigned(SDNode *N,
1898 SDNode *AMDGPUDAGToDAGISel::getS_BFE(unsigned Opcode, const SDLoc &DL,
1910 void AMDGPUDAGToDAGISel::SelectS_BFEFromShifts(SDNode *N) {
1935 void AMDGPUDAGToDAGISel::SelectS_BFE(SDNode *N) {
2011 bool AMDGPUDAGToDAGISel::isCBranchSCC(const SDNode *N) const {
2037 void AMDGPUDAGToDAGISel::SelectBRCOND(SDNode *N) {
2084 void AMDGPUDAGToDAGISel::SelectFMAD_FMA(SDNode *N) {
2132 void AMDGPUDAGToDAGISel::SelectATOMIC_CMP_SWAP(SDNode *N) {
2195 void AMDGPUDAGToDAGISel::SelectDSAppendConsume(SDNode *N, unsigned IntrID) {
2231 SDNode *Selected = CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
2254 void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N, unsigned IntrID) {
2294 SDNode *SGPROffset
2298 SDNode *M0Base
2319 SDNode *Selected = CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
2323 void AMDGPUDAGToDAGISel::SelectINTRINSIC_W_CHAIN(SDNode *N) {
2338 void AMDGPUDAGToDAGISel::SelectINTRINSIC_WO_CHAIN(SDNode *N) {
2360 void AMDGPUDAGToDAGISel::SelectINTRINSIC_VOID(SDNode *N) {
2633 bool AMDGPUDAGToDAGISel::isVGPRImm(const SDNode * N) const {
2643 for (SDNode::use_iterator U = N->use_begin(), E = SDNode::use_end();
2643 for (SDNode::use_iterator U = N->use_begin(), E = SDNode::use_end();
2655 SDNode * User = *U;
2681 bool AMDGPUDAGToDAGISel::isUniformLoad(const SDNode * N) const {
2716 SDNode *Node = &*Position++;
2721 SDNode *ResNode = Lowering.PostISelFolding(MachineNode, *CurDAG);
2767 void R600DAGToDAGISel::Select(SDNode *N) {
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 548 static bool opMustUseVOP3Encoding(const SDNode *N, MVT VT) {
555 static bool hasSourceMods(const SDNode *N) {
591 bool AMDGPUTargetLowering::allUsesHaveSourceMods(const SDNode *N,
602 for (const SDNode *U : N->uses()) {
638 bool AMDGPUTargetLowering::shouldReduceLoadWidth(SDNode *N,
709 bool AMDGPUTargetLowering::isSDNodeAlwaysUniform(const SDNode * N) const {
1060 for (SDNode::use_iterator U = DAG.getEntryNode().getNode()->use_begin(),
1166 void AMDGPUTargetLowering::ReplaceNodeResults(SDNode *N,
2763 static SDValue simplifyI24(SDNode *Node24,
2812 static bool hasVolatileUser(SDNode *Val) {
2813 for (SDNode *U : Val->uses()) {
2844 SDValue AMDGPUTargetLowering::performLoadCombine(SDNode *N,
2896 SDValue AMDGPUTargetLowering::performStoreCombine(SDNode *N,
2953 SDValue AMDGPUTargetLowering::performAssertSZExtCombine(SDNode *N,
2977 SDNode *N, DAGCombinerInfo &DCI) const {
3013 SDValue AMDGPUTargetLowering::performShlCombine(SDNode *N,
3081 SDValue AMDGPUTargetLowering::performSraCombine(SDNode *N,
3116 SDValue AMDGPUTargetLowering::performSrlCombine(SDNode *N,
3166 SDNode *N, DAGCombinerInfo &DCI) const {
3274 SDValue AMDGPUTargetLowering::performMulCombine(SDNode *N,
3321 SDValue AMDGPUTargetLowering::performMulhsCombine(SDNode *N,
3345 SDValue AMDGPUTargetLowering::performMulhuCombine(SDNode *N,
3370 SDNode *N, DAGCombinerInfo &DCI) const {
3542 SDValue AMDGPUTargetLowering::performSelectCombine(SDNode *N,
3631 SDValue AMDGPUTargetLowering::performFNegCombine(SDNode *N,
3833 SDValue AMDGPUTargetLowering::performFAbsCombine(SDNode *N,
3858 SDValue AMDGPUTargetLowering::performRcpCombine(SDNode *N,
3870 SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,
lib/Target/AMDGPU/AMDGPUISelLowering.h 79 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
80 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
81 SDValue performAssertSZExtCombine(SDNode *N, DAGCombinerInfo &DCI) const;
82 SDValue performIntrinsicWOChainCombine(SDNode *N, DAGCombinerInfo &DCI) const;
87 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const;
88 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const;
89 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const;
90 SDValue performTruncateCombine(SDNode *N, DAGCombinerInfo &DCI) const;
91 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const;
92 SDValue performMulhsCombine(SDNode *N, DAGCombinerInfo &DCI) const;
93 SDValue performMulhuCombine(SDNode *N, DAGCombinerInfo &DCI) const;
94 SDValue performMulLoHi24Combine(SDNode *N, DAGCombinerInfo &DCI) const;
97 SDValue performSelectCombine(SDNode *N, DAGCombinerInfo &DCI) const;
100 SDValue performFNegCombine(SDNode *N, DAGCombinerInfo &DCI) const;
101 SDValue performFAbsCombine(SDNode *N, DAGCombinerInfo &DCI) const;
102 SDValue performRcpCombine(SDNode *N, DAGCombinerInfo &DCI) const;
164 static bool allUsesHaveSourceMods(const SDNode *N,
183 bool shouldReduceLoadWidth(SDNode *Load,
197 bool isSDNodeAlwaysUniform(const SDNode *N) const override;
221 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
222 void ReplaceNodeResults(SDNode * N,
251 virtual SDNode *PostISelFolding(MachineSDNode *N,
lib/Target/AMDGPU/R600ISelLowering.cpp 650 void R600TargetLowering::ReplaceNodeResults(SDNode *N,
1851 SDValue R600TargetLowering::PerformDAGCombine(SDNode *N,
2081 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx,
2213 SDNode *R600TargetLowering::PostISelFolding(MachineSDNode *Node,
lib/Target/AMDGPU/R600ISelLowering.h 36 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
37 void ReplaceNodeResults(SDNode * N,
101 bool FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src,
107 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override;
lib/Target/AMDGPU/SIISelLowering.cpp 1334 bool SITargetLowering::isMemOpHasNoClobberedMemOperand(const SDNode *N) const {
1351 bool SITargetLowering::isMemOpUniform(const SDNode *N) const {
4182 SDNode *N, SelectionDAG &DAG) {
4218 SDNode *N, SelectionDAG &DAG) {
4249 void SITargetLowering::ReplaceNodeResults(SDNode *N,
4374 static SDNode *findUser(SDValue Value, unsigned Opcode) {
4376 SDNode *Parent = Value.getNode();
4377 for (SDNode::use_iterator I = Parent->use_begin(), E = Parent->use_end();
4389 unsigned SITargetLowering::isCFIntrinsic(const SDNode *Intr) const {
4438 SDNode *Intr = BRCOND.getOperand(1).getNode();
4440 SDNode *BR = nullptr;
4441 SDNode *SetCC = nullptr;
4486 SDNode *Result = DAG.getNode(CFNode, DL, DAG.getVTList(Res), Ops).getNode();
4512 SDNode *CopyToReg = findUser(SDValue(Intr, i), ISD::CopyToReg);
5118 SDNode *M0 = DAG.getMachineNode(AMDGPU::SI_INIT_M0, DL, MVT::Other, MVT::Glue,
8003 SDValue SITargetLowering::performUCharToFloatCombine(SDNode *N,
8045 SDValue SITargetLowering::performSHLPtrCombine(SDNode *N,
8228 SDValue SITargetLowering::performAndCombine(SDNode *N,
8414 SDValue SITargetLowering::performOrCombine(SDNode *N,
8540 SDValue SITargetLowering::performXorCombine(SDNode *N,
8616 SDValue SITargetLowering::performZeroExtendCombine(SDNode *N,
8642 SDValue SITargetLowering::performSignExtendInRegCombine(SDNode *N,
8679 SDValue SITargetLowering::performClassCombine(SDNode *N,
8696 SDValue SITargetLowering::performRcpCombine(SDNode *N,
8903 SDNode *N,
9115 SDValue SITargetLowering::performMinMaxCombine(SDNode *N,
9197 SDValue SITargetLowering::performFMed3Combine(SDNode *N,
9241 SDValue SITargetLowering::performCvtPkRTZCombine(SDNode *N,
9251 SDNode *N, DAGCombinerInfo &DCI) const {
9371 SITargetLowering::performInsertVectorEltCombine(SDNode *N,
9407 const SDNode *N0,
9408 const SDNode *N1) const {
9432 SDValue SITargetLowering::reassociateScalarOps(SDNode *N,
9480 SDValue SITargetLowering::performAddCombine(SDNode *N,
9557 SDValue SITargetLowering::performSubCombine(SDNode *N,
9580 SDValue SITargetLowering::performAddCarrySubCarryCombine(SDNode *N,
9605 SDValue SITargetLowering::performFAddCombine(SDNode *N,
9647 SDValue SITargetLowering::performFSubCombine(SDNode *N,
9694 SDValue SITargetLowering::performFMACombine(SDNode *N,
9769 SDValue SITargetLowering::performSetCCCombine(SDNode *N,
9865 SDValue SITargetLowering::performCvtF32UByteNCombine(SDNode *N,
9908 SDValue SITargetLowering::performClampCombine(SDNode *N,
9933 SDValue SITargetLowering::PerformDAGCombine(SDNode *N,
10076 SDNode *SITargetLowering::adjustWritemask(MachineSDNode *&Node,
10085 SDNode *Users[5] = { nullptr };
10109 for (SDNode::use_iterator I = Node->use_begin(), E = Node->use_end();
10204 SDNode *Copy = DAG.getMachineNode(TargetOpcode::COPY,
10213 SDNode *User = Users[i];
10247 SDNode *SITargetLowering::legalizeTargetIndependentNode(SDNode *Node,
10247 SDNode *SITargetLowering::legalizeTargetIndependentNode(SDNode *Node,
10262 SDNode *Glued = Node->getGluedNode();
10293 SDNode *SITargetLowering::PostISelFolding(MachineSDNode *Node,
10387 SDNode *Node) const {
10813 static bool isCopyFromRegOfInlineAsm(const SDNode *N) {
10825 bool SITargetLowering::isSDNodeSourceOfDivergence(const SDNode * N,
lib/Target/AMDGPU/SIISelLowering.h 135 SDNode *adjustWritemask(MachineSDNode *&N, SelectionDAG &DAG) const;
137 SDValue performUCharToFloatCombine(SDNode *N,
139 SDValue performSHLPtrCombine(SDNode *N,
150 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const;
151 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const;
152 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const;
153 SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const;
154 SDValue performSignExtendInRegCombine(SDNode *N, DAGCombinerInfo &DCI) const;
155 SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const;
158 SDValue performFCanonicalizeCombine(SDNode *N, DAGCombinerInfo &DCI) const;
164 SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const;
165 SDValue performFMed3Combine(SDNode *N, DAGCombinerInfo &DCI) const;
166 SDValue performCvtPkRTZCombine(SDNode *N, DAGCombinerInfo &DCI) const;
167 SDValue performExtractVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
168 SDValue performInsertVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
170 SDValue reassociateScalarOps(SDNode *N, SelectionDAG &DAG) const;
172 const SDNode *N0, const SDNode *N1) const;
172 const SDNode *N0, const SDNode *N1) const;
173 SDValue performAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
174 SDValue performAddCarrySubCarryCombine(SDNode *N, DAGCombinerInfo &DCI) const;
175 SDValue performSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
176 SDValue performFAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
177 SDValue performFSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
178 SDValue performFMACombine(SDNode *N, DAGCombinerInfo &DCI) const;
179 SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const;
180 SDValue performCvtF32UByteNCombine(SDNode *N, DAGCombinerInfo &DCI) const;
181 SDValue performClampCombine(SDNode *N, DAGCombinerInfo &DCI) const;
182 SDValue performRcpCombine(SDNode *N, DAGCombinerInfo &DCI) const;
187 unsigned isCFIntrinsic(const SDNode *Intr) const;
261 bool isMemOpUniform(const SDNode *N) const;
262 bool isMemOpHasNoClobberedMemOperand(const SDNode *N) const;
357 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
360 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
361 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override;
363 SDNode *Node) const override;
365 SDNode *legalizeTargetIndependentNode(SDNode *Node, SelectionDAG &DAG) const;
365 SDNode *legalizeTargetIndependentNode(SDNode *Node, SelectionDAG &DAG) const;
386 bool isSDNodeSourceOfDivergence(const SDNode *N,
lib/Target/AMDGPU/SIInstrInfo.cpp 94 static unsigned getNumOperandsNoGlue(SDNode *Node) {
103 static bool nodesHaveSameOperandValue(SDNode *N0, SDNode* N1, unsigned OpName) {
103 static bool nodesHaveSameOperandValue(SDNode *N0, SDNode* N1, unsigned OpName) {
144 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1,
144 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1,
497 bool SIInstrInfo::shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1,
497 bool SIInstrInfo::shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1,
lib/Target/AMDGPU/SIInstrInfo.h 178 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
178 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
191 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
191 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
lib/Target/ARC/ARCISelDAGToDAG.cpp 44 void Select(SDNode *N) override;
169 void ARCDAGToDAGISel::Select(SDNode *N) {
lib/Target/ARC/ARCISelLowering.cpp 686 SDValue ARCTargetLowering::PerformDAGCombine(SDNode *N,
lib/Target/ARC/ARCISelLowering.h 93 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
lib/Target/ARM/ARMBaseInstrInfo.cpp 1838 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
1838 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
1919 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
1919 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
4351 SDNode *DefNode, unsigned DefIdx,
4352 SDNode *UseNode, unsigned UseIdx) const {
4677 SDNode *Node) const {
lib/Target/ARM/ARMBaseInstrInfo.h 246 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
246 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
257 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
257 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
323 SDNode *DefNode, unsigned DefIdx,
324 SDNode *UseNode, unsigned UseIdx) const override;
386 SDNode *Node) const override;
lib/Target/ARM/ARMISelDAGToDAG.cpp 78 void Select(SDNode *N) override;
80 bool hasNoVMLxHazardUse(SDNode *N) const;
99 bool SelectAddLikeOr(SDNode *Parent, SDValue N, SDValue &Out);
111 bool SelectAddrMode2OffsetReg(SDNode *Op, SDValue N,
113 bool SelectAddrMode2OffsetImm(SDNode *Op, SDValue N,
115 bool SelectAddrMode2OffsetImmPre(SDNode *Op, SDValue N,
120 bool SelectAddrMode3Offset(SDNode *Op, SDValue N,
125 bool SelectAddrMode6(SDNode *Parent, SDValue N, SDValue &Addr,SDValue &Align);
126 bool SelectAddrMode6Offset(SDNode *Op, SDValue N, SDValue &Offset);
149 bool SelectT2AddrModeImm8Offset(SDNode *Op, SDValue N,
152 bool SelectT2AddrModeImm7Offset(SDNode *Op, SDValue N, SDValue &OffImm);
153 bool SelectT2AddrModeImm7Offset(SDNode *Op, SDValue N, SDValue &OffImm,
181 void transferMemOperands(SDNode *Src, SDNode *Dst);
181 void transferMemOperands(SDNode *Src, SDNode *Dst);
184 bool tryARMIndexedLoad(SDNode *N);
185 bool tryT1IndexedLoad(SDNode *N);
186 bool tryT2IndexedLoad(SDNode *N);
187 bool tryMVEIndexedLoad(SDNode *N);
193 void SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,
201 void SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,
208 void SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating,
226 void SelectMVE_WB(SDNode *N, const uint16_t *Opcodes, bool Predicated);
229 void SelectMVE_LongShift(SDNode *N, uint16_t Opcode, bool Immediate);
232 void SelectMVE_VADCSBC(SDNode *N, uint16_t OpcodeWithCarry,
240 void SelectMVE_VLD(SDNode *N, unsigned NumVecs,
246 void SelectVLDDup(SDNode *N, bool IsIntrinsic, bool isUpdating,
252 bool tryV6T2BitfieldExtractOp(SDNode *N, bool isSigned);
255 bool tryABSOp(SDNode *N);
257 bool tryReadRegister(SDNode *N);
258 bool tryWriteRegister(SDNode *N);
260 bool tryInlineAsm(SDNode *N);
262 void SelectCMPZ(SDNode *N, bool &SwitchEQNEToPLMI);
264 void SelectCMP_SWAP(SDNode *N);
272 SDNode *createGPRPairNode(EVT VT, SDValue V0, SDValue V1);
273 SDNode *createSRegPairNode(EVT VT, SDValue V0, SDValue V1);
274 SDNode *createDRegPairNode(EVT VT, SDValue V0, SDValue V1);
275 SDNode *createQRegPairNode(EVT VT, SDValue V0, SDValue V1);
278 SDNode *createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
279 SDNode *createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
280 SDNode *createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
302 static bool isInt32Immediate(SDNode *N, unsigned &Imm) {
319 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) {
353 SDNode *N = &*I++; // Preincrement iterator to avoid invalidation issues.
432 bool ARMDAGToDAGISel::hasNoVMLxHazardUse(SDNode *N) const {
442 SDNode *Use = *N->use_begin();
593 bool ARMDAGToDAGISel::SelectAddLikeOr(SDNode *Parent, SDValue N, SDValue &Out) {
761 bool ARMDAGToDAGISel::SelectAddrMode2OffsetReg(SDNode *Op, SDValue N,
797 bool ARMDAGToDAGISel::SelectAddrMode2OffsetImmPre(SDNode *Op, SDValue N,
817 bool ARMDAGToDAGISel::SelectAddrMode2OffsetImm(SDNode *Op, SDValue N,
896 bool ARMDAGToDAGISel::SelectAddrMode3Offset(SDNode *Op, SDValue N,
987 bool ARMDAGToDAGISel::SelectAddrMode6(SDNode *Parent, SDValue N, SDValue &Addr,
1016 bool ARMDAGToDAGISel::SelectAddrMode6Offset(SDNode *Op, SDValue N,
1298 bool ARMDAGToDAGISel::SelectT2AddrModeImm8Offset(SDNode *Op, SDValue N,
1344 bool ARMDAGToDAGISel::SelectT2AddrModeImm7Offset(SDNode *Op, SDValue N,
1349 bool ARMDAGToDAGISel::SelectT2AddrModeImm7Offset(SDNode *Op, SDValue N,
1464 void ARMDAGToDAGISel::transferMemOperands(SDNode *N, SDNode *Result) {
1464 void ARMDAGToDAGISel::transferMemOperands(SDNode *N, SDNode *Result) {
1469 bool ARMDAGToDAGISel::tryARMIndexedLoad(SDNode *N) {
1527 SDNode *New = CurDAG->getMachineNode(Opcode, SDLoc(N), MVT::i32, MVT::i32,
1537 SDNode *New = CurDAG->getMachineNode(Opcode, SDLoc(N), MVT::i32, MVT::i32,
1548 bool ARMDAGToDAGISel::tryT1IndexedLoad(SDNode *N) {
1568 SDNode *New = CurDAG->getMachineNode(ARM::tLDR_postidx, SDLoc(N), MVT::i32,
1575 bool ARMDAGToDAGISel::tryT2IndexedLoad(SDNode *N) {
1616 SDNode *New = CurDAG->getMachineNode(Opcode, SDLoc(N), MVT::i32, MVT::i32,
1626 bool ARMDAGToDAGISel::tryMVEIndexedLoad(SDNode *N) {
1678 SDNode *New = CurDAG->getMachineNode(Opcode, SDLoc(N), LD->getValueType(0),
1689 SDNode *ARMDAGToDAGISel::createGPRPairNode(EVT VT, SDValue V0, SDValue V1) {
1700 SDNode *ARMDAGToDAGISel::createSRegPairNode(EVT VT, SDValue V0, SDValue V1) {
1711 SDNode *ARMDAGToDAGISel::createDRegPairNode(EVT VT, SDValue V0, SDValue V1) {
1722 SDNode *ARMDAGToDAGISel::createQRegPairNode(EVT VT, SDValue V0, SDValue V1) {
1733 SDNode *ARMDAGToDAGISel::createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1,
1748 SDNode *ARMDAGToDAGISel::createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1,
1763 SDNode *ARMDAGToDAGISel::createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1,
1921 void ARMDAGToDAGISel::SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,
1977 SDNode *VLd;
2015 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
2060 void ARMDAGToDAGISel::SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,
2161 SDNode *VSt = CurDAG->getMachineNode(Opc, dl, ResTys, Ops);
2185 SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
2205 SDNode *VStB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys,
2211 void ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating,
2316 SDNode *VLdLn = CurDAG->getMachineNode(Opc, dl, ResTys, Ops);
2369 void ARMDAGToDAGISel::SelectMVE_WB(SDNode *N, const uint16_t *Opcodes,
2401 void ARMDAGToDAGISel::SelectMVE_LongShift(SDNode *N, uint16_t Opcode,
2426 void ARMDAGToDAGISel::SelectMVE_VADCSBC(SDNode *N, uint16_t OpcodeWithCarry,
2460 void ARMDAGToDAGISel::SelectMVE_VLD(SDNode *N, unsigned NumVecs,
2501 void ARMDAGToDAGISel::SelectVLDDup(SDNode *N, bool IsIntrinsic,
2565 SDNode *VLdDup;
2592 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex],
2602 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex],
2633 bool ARMDAGToDAGISel::tryV6T2BitfieldExtractOp(SDNode *N, bool isSigned) {
2779 bool ARMDAGToDAGISel::tryABSOp(SDNode *N){
2810 void ARMDAGToDAGISel::SelectCMP_SWAP(SDNode *N) {
2824 SDNode *CmpSwap = CurDAG->getMachineNode(
2845 void ARMDAGToDAGISel::SelectCMPZ(SDNode *N, bool &SwitchEQNEToPLMI) {
2873 SDNode *NewN;
2917 void ARMDAGToDAGISel::Select(SDNode *N) {
2992 SDNode *ResNode;
3293 SDNode *New = CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops);
3302 SDNode *Dec =
3348 SDNode *LoopDec =
3355 SDNode *LoopEnd =
3385 SDNode *ResNode = CurDAG->getMachineNode(Opc, dl, MVT::Other,
3408 SDNode *Add = nullptr;
3858 SDNode *Ld = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops);
3872 SDNode *ResNode = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
3885 SDNode *ResNode = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
3925 SDNode *St = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops);
4414 bool ARMDAGToDAGISel::tryReadRegister(SDNode *N){
4529 bool ARMDAGToDAGISel::tryWriteRegister(SDNode *N){
4630 bool ARMDAGToDAGISel::tryInlineAsm(SDNode *N){
4723 SDNode *GU = N->getGluedUser();
lib/Target/ARM/ARMISelLowering.cpp 1728 Sched::Preference ARMTargetLowering::getSchedulingPreference(SDNode *N) const {
2868 bool ARMTargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const {
2875 SDNode *Copy = *N->use_begin();
2883 SDNode *VMov = Copy;
2885 SmallPtrSet<SDNode*, 2> Copies;
2886 for (SDNode::use_iterator UI = VMov->use_begin(), UE = VMov->use_end();
2895 for (SDNode::use_iterator UI = VMov->use_begin(), UE = VMov->use_end();
2928 for (SDNode::use_iterator UI = Copy->use_begin(), UE = Copy->use_end();
5059 SDNode *N = Op.getNode();
5583 static void ExpandREAD_REGISTER(SDNode *N, SmallVectorImpl<SDValue> &Results,
5608 static SDValue CombineVMOVDRRCandidateWithVecOp(const SDNode *BC,
5656 static SDValue ExpandBITCAST(SDNode *N, SelectionDAG &DAG,
5889 static SDValue LowerCTTZ(SDNode *N, SelectionDAG &DAG,
5945 static SDValue LowerCTPOP(SDNode *N, SelectionDAG &DAG,
6031 static SDValue LowerShift(SDNode *N, SelectionDAG &DAG,
6074 static SDValue Expand64BitShift(SDNode *N, SelectionDAG &DAG,
8214 static bool isExtendedBUILD_VECTOR(SDNode *N, SelectionDAG &DAG,
8219 SDNode *BVN = N->getOperand(0).getNode();
8246 SDNode *Elt = N->getOperand(i).getNode();
8267 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) {
8277 static bool isZeroExtended(SDNode *N, SelectionDAG &DAG) {
8351 static SDValue SkipExtensionForVMULL(SDNode *N, SelectionDAG &DAG) {
8375 SDNode *BVN = N->getOperand(0).getNode();
8401 static bool isAddSubSExt(SDNode *N, SelectionDAG &DAG) {
8404 SDNode *N0 = N->getOperand(0).getNode();
8405 SDNode *N1 = N->getOperand(1).getNode();
8412 static bool isAddSubZExt(SDNode *N, SelectionDAG &DAG) {
8415 SDNode *N0 = N->getOperand(0).getNode();
8416 SDNode *N1 = N->getOperand(1).getNode();
8429 SDNode *N0 = Op.getOperand(0).getNode();
8430 SDNode *N1 = Op.getOperand(1).getNode();
8682 SDNode *N = Op.getNode();
8842 ARMTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
8844 SmallVectorImpl<SDNode *> &Created) const {
8892 static SDValue WinDBZCheckDenominator(SelectionDAG &DAG, SDNode *N, SDValue InChain) {
9028 static void ReplaceREADCYCLECOUNTER(SDNode *N,
9069 static void ReplaceCMP_SWAP_64Results(SDNode *N,
9078 SDNode *CmpSwap = DAG.getMachineNode(
9242 static void ReplaceLongIntrinsic(SDNode *N, SmallVectorImpl<SDValue> &Results,
9275 void ARMTargetLowering::ReplaceNodeResults(SDNode *N,
10691 MachineInstr &MI, const SDNode *Node) {
10716 SDNode *Node) const {
10834 static bool isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes,
10908 SDValue combineSelectAndUse(SDNode *N, SDValue Slct, SDValue OtherOp,
10934 SDValue combineSelectAndUseCommutative(SDNode *N, bool AllOnes,
10947 static bool IsVUZPShuffleNode(SDNode *N) {
10959 static SDValue AddCombineToVPADD(SDNode *N, SDValue N0, SDValue N1,
10975 SDNode *Unzip = N0.getNode();
10987 static SDValue AddCombineVUZPToVPADDL(SDNode *N, SDValue N0, SDValue N1,
11040 AddCombineBUILD_VECTORToVPADDL(SDNode *N, SDValue N0, SDValue N1,
11065 SDNode *V = Vec.getNode();
11144 static SDValue AddCombineTo64BitSMLAL16(SDNode *AddcNode, SDNode *AddeNode,
11144 static SDValue AddCombineTo64BitSMLAL16(SDNode *AddcNode, SDNode *AddeNode,
11221 static SDValue AddCombineTo64bitMLAL(SDNode *AddeSubeNode,
11253 SDNode *AddcSubcNode = AddeSubeNode->getOperand(2).getNode();
11387 static SDValue AddCombineTo64bitUMAAL(SDNode *AddeNode,
11400 SDNode* AddcNode = AddeNode->getOperand(2).getNode();
11405 SDNode *UmlalNode = nullptr;
11442 static SDValue PerformUMLALCombine(SDNode *N, SelectionDAG &DAG,
11449 SDNode* AddcNode = N->getOperand(2).getNode();
11450 SDNode* AddeNode = N->getOperand(3).getNode();
11464 static SDValue PerformAddcSubcCombine(SDNode *N,
11497 static SDValue PerformAddeSubeCombine(SDNode *N,
11525 static SDValue PerformABSCombine(SDNode *N,
11544 static SDValue PerformADDECombine(SDNode *N,
11561 static SDValue PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1,
11583 ARMTargetLowering::isDesirableToCommuteWithShift(const SDNode *N,
11619 const SDNode *N, CombineLevel Level) const {
11638 static SDValue PerformSHLSimplify(SDNode *N,
11743 static SDValue PerformADDCombine(SDNode *N,
11763 static SDValue PerformSUBCombine(SDNode *N,
11791 static SDValue PerformVMULCombine(SDNode *N,
11822 static SDValue PerformMULCombine(SDNode *N,
11905 static SDValue CombineANDShift(SDNode *N,
11924 SDNode *N0 = N->getOperand(0).getNode();
12009 static SDValue PerformANDCombine(SDNode *N,
12058 static SDValue PerformORCombineToSMULWBT(SDNode *OR,
12082 SDNode *SMULLOHI = SRL.getOperand(0).getNode();
12118 static SDValue PerformORCombineToBFI(SDNode *N,
12261 static SDValue PerformORCombine_i1(SDNode *N,
12316 static SDValue PerformORCombine(SDNode *N,
12416 static SDValue PerformXORCombine(SDNode *N,
12440 static SDValue ParseBFI(SDNode *N, APInt &ToMask, APInt &FromMask) {
12469 static SDValue FindBFIToCombineWith(SDNode *N) {
12513 static SDValue PerformBFICombine(SDNode *N,
12572 static SDValue PerformVMOVRRDCombine(SDNode *N,
12581 SDNode *InNode = InDouble.getNode();
12616 static SDValue PerformVMOVDRRCombine(SDNode *N, SelectionDAG &DAG) {
12636 static bool hasNormalLoadOperand(SDNode *N) {
12639 SDNode *Elt = N->getOperand(i).getNode();
12648 static SDValue PerformBUILD_VECTORCombine(SDNode *N,
12681 PerformARMBUILD_VECTORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
12705 SDNode *Use = *N->use_begin();
12772 PerformPREDICATE_CASTCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
12791 static SDValue PerformInsertEltCombine(SDNode *N,
12796 SDNode *Elt = N->getOperand(1).getNode();
12817 static SDValue PerformVECTOR_SHUFFLECombine(SDNode *N, SelectionDAG &DAG) {
12872 static SDValue CombineBaseUpdate(SDNode *N,
12884 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(),
12886 SDNode *User = *UI;
12894 SmallPtrSet<const SDNode *, 32> Visited;
12895 SmallVector<const SDNode *, 16> Worklist;
12899 if (SDNode::hasPredecessorHelper(N, Visited, Worklist) ||
12900 SDNode::hasPredecessorHelper(User, Visited, Worklist))
13088 static SDValue PerformVLDCombine(SDNode *N,
13100 static bool CombineVLDDUP(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
13108 SDNode *VLD = N->getOperand(0).getNode();
13131 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end();
13136 SDNode *User = *UI;
13156 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end();
13162 SDNode *User = *UI;
13179 static SDValue PerformVDUPLANECombine(SDNode *N,
13210 static SDValue PerformVDUPCombine(SDNode *N,
13238 static SDValue PerformLOADCombine(SDNode *N,
13391 static SDValue PerformSTORECombine(SDNode *N,
13474 static SDValue PerformVCVTCombine(SDNode *N, SelectionDAG &DAG,
13531 static SDValue PerformVDIVCombine(SDNode *N, SelectionDAG &DAG,
13582 static SDValue PerformIntrinsicCombine(SDNode *N, SelectionDAG &DAG) {
13741 static SDValue PerformShiftCombine(SDNode *N,
13829 static SDValue PerformSplittingToWideningLoad(SDNode *N, SelectionDAG &DAG) {
13893 static SDValue PerformExtendCombine(SDNode *N, SelectionDAG &DAG,
13943 SDValue ARMTargetLowering::PerformCMOVToBFICombine(SDNode *CMOV, SelectionDAG &DAG) const {
14076 static SDValue PerformHWLoopCombine(SDNode *N,
14147 SDNode *Br = *N->use_begin();
14200 ARMTargetLowering::PerformBRCONDCombine(SDNode *N, SelectionDAG &DAG) const {
14240 ARMTargetLowering::PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const {
14416 SDValue ARMTargetLowering::PerformDAGCombine(SDNode *N,
14828 SDNode *U = *ExtVal->use_begin();
15123 static bool getARMIndexedAddressParts(SDNode *Ptr, EVT VT,
15182 static bool getT2IndexedAddressParts(SDNode *Ptr, EVT VT,
15207 static bool getMVEIndexedAddressParts(SDNode *Ptr, EVT VT, unsigned Align,
15257 ARMTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
15305 bool ARMTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
15305 bool ARMTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
15917 const SDNode *N, MVT::SimpleValueType SVT) {
15935 const SDNode *N, LLVMContext *Context, const ARMSubtarget *Subtarget) {
16017 SDValue ARMTargetLowering::LowerREM(SDNode *N, SelectionDAG &DAG) const {
16055 SDNode *ResNode = CallResult.first.getNode();
16174 void ARMTargetLowering::lowerABS(SDNode *N, SmallVectorImpl<SDValue> &Results,
16602 bool ARMTargetLowering::shouldExpandShift(SelectionDAG &DAG, SDNode *N) const {
lib/Target/ARM/ARMISelLowering.h 308 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
329 SDNode *Node) const override;
331 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
332 SDValue PerformBRCONDCombine(SDNode *N, SelectionDAG &DAG) const;
333 SDValue PerformCMOVToBFICombine(SDNode *N, SelectionDAG &DAG) const;
334 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
399 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset,
406 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
406 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
496 Sched::Preference getSchedulingPreference(SDNode *N) const override;
599 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override;
623 bool isDesirableToCommuteWithShift(const SDNode *N,
626 bool shouldFoldConstantShiftPairToMask(const SDNode *N,
726 SDValue LowerREM(SDNode *N, SelectionDAG &DAG) const;
732 void lowerABS(SDNode *N, SmallVectorImpl<SDValue> &Results,
738 SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor, SelectionDAG &DAG,
739 SmallVectorImpl<SDNode *> &Created) const override;
814 bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override;
lib/Target/ARM/Thumb1InstrInfo.cpp 143 bool Thumb1InstrInfo::canCopyGluedNodeDuringSchedule(SDNode *N) const {
lib/Target/ARM/Thumb1InstrInfo.h 55 bool canCopyGluedNodeDuringSchedule(SDNode *N) const override;
lib/Target/AVR/AVRISelDAGToDAG.cpp 38 bool SelectAddr(SDNode *Op, SDValue N, SDValue &Base, SDValue &Disp);
40 bool selectIndexedLoad(SDNode *N);
50 void Select(SDNode *N) override;
51 bool trySelect(SDNode *N);
53 template <unsigned NodeType> bool select(SDNode *N);
54 bool selectMultiplication(SDNode *N);
64 bool AVRDAGToDAGISel::SelectAddr(SDNode *Op, SDValue N, SDValue &Base,
121 bool AVRDAGToDAGISel::selectIndexedLoad(SDNode *N) {
159 SDNode *ResNode = CurDAG->getMachineNode(Opcode, SDLoc(N), VT,
308 template <> bool AVRDAGToDAGISel::select<ISD::FrameIndex>(SDNode *N) {
323 template <> bool AVRDAGToDAGISel::select<ISD::STORE>(SDNode *N) {
349 SDNode *ResNode = CurDAG->getMachineNode(Opc, DL, MVT::Other, Ops);
360 template <> bool AVRDAGToDAGISel::select<ISD::LOAD>(SDNode *N) {
374 SDNode *ResNode;
416 template <> bool AVRDAGToDAGISel::select<AVRISD::CALL>(SDNode *N) {
446 SDNode *ResNode =
456 template <> bool AVRDAGToDAGISel::select<ISD::BRIND>(SDNode *N) {
463 SDNode *ResNode = CurDAG->getMachineNode(AVR::IJMP, DL, MVT::Other, Chain);
471 bool AVRDAGToDAGISel::selectMultiplication(llvm::SDNode *N) {
482 SDNode *Mul = CurDAG->getMachineNode(MachineOp, DL, MVT::Glue, Lhs, Rhs);
516 void AVRDAGToDAGISel::Select(SDNode *N) {
532 bool AVRDAGToDAGISel::trySelect(SDNode *N) {
lib/Target/AVR/AVRISelLowering.cpp 282 const SDNode *N = Op.getNode();
715 void AVRTargetLowering::ReplaceNodeResults(SDNode *N,
772 bool AVRTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
777 const SDNode *Op;
828 bool AVRTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
828 bool AVRTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
lib/Target/AVR/AVRISelLowering.h 88 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
95 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset,
99 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
99 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
lib/Target/BPF/BPFISelDAGToDAG.cpp 70 void Select(SDNode *N) override;
77 void PreprocessLoad(SDNode *Node, SelectionDAG::allnodes_iterator &I);
78 void PreprocessCopyToReg(SDNode *Node);
79 void PreprocessTrunc(SDNode *Node, SelectionDAG::allnodes_iterator &I);
179 void BPFDAGToDAGISel::Select(SDNode *Node) {
243 void BPFDAGToDAGISel::PreprocessLoad(SDNode *Node,
259 SDNode *LDAddrNode = LD->getOperand(1).getNode();
267 SDNode *OP1N = OP1.getNode();
330 SDNode *Node = &*I++;
465 void BPFDAGToDAGISel::PreprocessTrunc(SDNode *Node,
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 185 MachineSDNode *HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(SDNode *IntN) {
216 SDNode *HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(MachineSDNode *LoadN,
217 SDNode *IntN) {
238 SDNode *StoreN;
272 SDNode *C = Ch.getNode();
304 SDNode *S = StoreInstrForLoadIntrinsic(L, C);
318 bool HexagonDAGToDAGISel::SelectBrevLdIntrinsic(SDNode *IntN) {
359 bool HexagonDAGToDAGISel::SelectNewCircIntrinsic(SDNode *IntN) {
445 void HexagonDAGToDAGISel::SelectLoad(SDNode *N) {
554 void HexagonDAGToDAGISel::SelectStore(SDNode *N) {
568 void HexagonDAGToDAGISel::SelectSHL(SDNode *N) {
589 SDNode *Result = CurDAG->getMachineNode(Hexagon::M2_mpysmi, dl,
610 SDNode *Result = CurDAG->getMachineNode(Hexagon::M2_mpysmi, dl,
625 void HexagonDAGToDAGISel::SelectIntrinsicWChain(SDNode *N) {
662 void HexagonDAGToDAGISel::SelectIntrinsicWOChain(SDNode *N) {
698 void HexagonDAGToDAGISel::SelectConstantFP(SDNode *N) {
719 void HexagonDAGToDAGISel::SelectConstant(SDNode *N) {
732 void HexagonDAGToDAGISel::SelectFrameIndex(SDNode *N) {
741 SDNode *R = nullptr;
761 void HexagonDAGToDAGISel::SelectAddSubCarry(SDNode *N) {
764 SDNode *C = CurDAG->getMachineNode(OpcCarry, SDLoc(N), N->getVTList(),
770 void HexagonDAGToDAGISel::SelectVAlign(SDNode *N) {
785 SDNode *R = CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl,
791 SDNode *C = CurDAG->getMachineNode(Hexagon::S4_andi_asl_ri, dl, MVT::i32,
793 SDNode *S = CurDAG->getMachineNode(Hexagon::S2_lsr_r_p, dl, MVT::i64,
800 SDNode *Pu = CurDAG->getMachineNode(Hexagon::C2_tfrrp, dl, MVT::v8i1,
802 SDNode *VA = CurDAG->getMachineNode(Hexagon::S2_valignrb, dl, ResTy,
809 void HexagonDAGToDAGISel::SelectVAlignAddr(SDNode *N) {
816 SDNode *AA = CurDAG->getMachineNode(Hexagon::A2_andir, dl, MVT::i32,
824 void HexagonDAGToDAGISel::SelectTypecast(SDNode *N) {
827 SDNode *T = CurDAG->MorphNodeTo(N, N->getOpcode(),
832 void HexagonDAGToDAGISel::SelectP2D(SDNode *N) {
834 SDNode *T = CurDAG->getMachineNode(Hexagon::C2_mask, SDLoc(N), ResTy,
839 void HexagonDAGToDAGISel::SelectD2P(SDNode *N) {
843 SDNode *T = CurDAG->getMachineNode(Hexagon::A4_vcmpbgtui, dl, ResTy,
848 void HexagonDAGToDAGISel::SelectV2Q(SDNode *N) {
856 SDNode *R = CurDAG->getMachineNode(Hexagon::A2_tfrsi, dl, MVT::i32, C);
857 SDNode *T = CurDAG->getMachineNode(Hexagon::V6_vandvrt, dl, ResTy,
862 void HexagonDAGToDAGISel::SelectQ2V(SDNode *N) {
869 SDNode *R = CurDAG->getMachineNode(Hexagon::A2_tfrsi, dl, MVT::i32, C);
870 SDNode *T = CurDAG->getMachineNode(Hexagon::V6_vandqrt, dl, ResTy,
875 void HexagonDAGToDAGISel::Select(SDNode *N) {
934 static bool isMemOPCandidate(SDNode *I, SDNode *U) {
934 static bool isMemOPCandidate(SDNode *I, SDNode *U) {
956 SDNode *UUse = *U->use_begin();
964 SDNode *SYNode = SY.getNode();
977 void HexagonDAGToDAGISel::ppSimplifyOrSelect0(std::vector<SDNode*> &&Nodes) {
1025 void HexagonDAGToDAGISel::ppAddrReorderAddShl(std::vector<SDNode*> &&Nodes) {
1089 void HexagonDAGToDAGISel::ppAddrRewriteAndSrl(std::vector<SDNode*> &&Nodes) {
1092 for (SDNode *N : Nodes) {
1154 void HexagonDAGToDAGISel::ppHoistZextI1(std::vector<SDNode*> &&Nodes) {
1157 for (SDNode *N : Nodes) {
1166 SDNode *U = *I;
1210 std::vector<SDNode*> T;
1212 for (SDNode &N : CurDAG->allnodes())
1489 SDNode *T = CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl,
1581 bool HexagonDAGToDAGISel::isPositiveHalfWord(const SDNode *N) const {
1593 bool HexagonDAGToDAGISel::hasOneUse(const SDNode *N) const {
1600 static bool isOpcodeHandled(const SDNode *N) {
1615 int HexagonDAGToDAGISel::getWeight(SDNode *N) {
1624 int HexagonDAGToDAGISel::getHeight(SDNode *N) {
1779 SDValue HexagonDAGToDAGISel::getMultiplierForSHL(SDNode *N) {
1877 SDValue HexagonDAGToDAGISel::balanceSubTree(SDNode *N, bool TopLevel) {
1894 SDNode *Op0N = Op0.getNode();
1902 SDNode *Op1N = N->getOperand(1).getNode(); // Op1 may have been RAUWd
2234 SDNode *N = &*I++;
2250 SmallVector<SDNode *, 4> Worklist;
2256 SDNode *N = Worklist.pop_back_val();
lib/Target/Hexagon/HexagonISelDAGToDAG.h 55 void Select(SDNode *N) override;
79 MachineSDNode *LoadInstrForLoadIntrinsic(SDNode *IntN);
83 SDNode *StoreInstrForLoadIntrinsic(MachineSDNode *LoadN, SDNode *IntN);
83 SDNode *StoreInstrForLoadIntrinsic(MachineSDNode *LoadN, SDNode *IntN);
85 void SelectFrameIndex(SDNode *N);
92 bool SelectBrevLdIntrinsic(SDNode *IntN);
93 bool SelectNewCircIntrinsic(SDNode *IntN);
94 void SelectLoad(SDNode *N);
97 void SelectStore(SDNode *N);
98 void SelectSHL(SDNode *N);
99 void SelectZeroExtend(SDNode *N);
100 void SelectIntrinsicWChain(SDNode *N);
101 void SelectIntrinsicWOChain(SDNode *N);
102 void SelectConstant(SDNode *N);
103 void SelectConstantFP(SDNode *N);
104 void SelectV65Gather(SDNode *N);
105 void SelectV65GatherPred(SDNode *N);
106 void SelectHVXDualOutput(SDNode *N);
107 void SelectAddSubCarry(SDNode *N);
108 void SelectVAlign(SDNode *N);
109 void SelectVAlignAddr(SDNode *N);
110 void SelectTypecast(SDNode *N);
111 void SelectP2D(SDNode *N);
112 void SelectD2P(SDNode *N);
113 void SelectQ2V(SDNode *N);
114 void SelectV2Q(SDNode *N);
127 SDNode *U = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy);
131 void SelectHvxShuffle(SDNode *N);
132 void SelectHvxRor(SDNode *N);
133 void SelectHvxVAlign(SDNode *N);
138 bool isPositiveHalfWord(const SDNode *N) const;
139 bool hasOneUse(const SDNode *N) const;
142 void ppSimplifyOrSelect0(std::vector<SDNode*> &&Nodes);
143 void ppAddrReorderAddShl(std::vector<SDNode*> &&Nodes);
144 void ppAddrRewriteAndSrl(std::vector<SDNode*> &&Nodes);
145 void ppHoistZextI1(std::vector<SDNode*> &&Nodes);
147 SmallDenseMap<SDNode *,int> RootWeights;
148 SmallDenseMap<SDNode *,int> RootHeights;
150 int getWeight(SDNode *N);
151 int getHeight(SDNode *N);
152 SDValue getMultiplierForSHL(SDNode *N);
155 SDValue balanceSubTree(SDNode *N, bool Factorize = false);
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 671 ResultStack(SDNode *Inp)
673 SDNode *InpNode;
825 void selectShuffle(SDNode *N);
826 void selectRor(SDNode *N);
827 void selectVAlign(SDNode *N);
858 bool selectVectorConstants(SDNode *N);
860 SDValue Va, SDValue Vb, SDNode *N);
925 bool HvxSelector::selectVectorConstants(SDNode *N) {
930 SmallVector<SDNode*,4> Nodes;
931 SetVector<SDNode*> WorkQ;
964 SDNode *W = WorkQ[i];
971 for (SDNode *L : Nodes)
1021 SDNode *ResN = (Node.Opc == TargetOpcode::COPY)
1027 SDNode *OutN = Output.back().getNode();
1028 SDNode *InpN = Results.InpNode;
1345 DenseMap<SDNode*, SDNode**> Refs;
1345 DenseMap<SDNode*, SDNode**> Refs;
1348 SDNode *&N = T::operator[](i);
1352 void erase(SDNode *N) {
1362 SDNode *N) {
1382 DenseSet<SDNode*> AllNodes;
1383 for (SDNode &S : DAG.allnodes())
1449 SetVector<SDNode*> SubNodes, TmpQ;
1450 std::map<SDNode*,unsigned> NumOps;
1455 SDNode *S = SubNodes[I];
1468 SDNode *S = TmpQ[I];
1469 for (SDNode *U : S->uses()) {
1483 for (SDNode *S : reverse(Queue))
2001 void HvxSelector::selectShuffle(SDNode *N) {
2076 void HvxSelector::selectRor(SDNode *N) {
2082 SDNode *NewN = nullptr;
2101 void HvxSelector::selectVAlign(SDNode *N) {
2105 SDNode *NewN = DAG.getMachineNode(Hexagon::V6_valignb, SDLoc(N),
2111 void HexagonDAGToDAGISel::SelectHvxShuffle(SDNode *N) {
2115 void HexagonDAGToDAGISel::SelectHvxRor(SDNode *N) {
2119 void HexagonDAGToDAGISel::SelectHvxVAlign(SDNode *N) {
2123 void HexagonDAGToDAGISel::SelectV65GatherPred(SDNode *N) {
2153 SDNode *Result = CurDAG->getMachineNode(Opcode, dl, VTs, Ops);
2161 void HexagonDAGToDAGISel::SelectV65Gather(SDNode *N) {
2190 SDNode *Result = CurDAG->getMachineNode(Opcode, dl, VTs, Ops);
2198 void HexagonDAGToDAGISel::SelectHVXDualOutput(SDNode *N) {
2200 SDNode *Result;
lib/Target/Hexagon/HexagonISelLowering.cpp 545 bool HexagonTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
545 bool HexagonTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
2887 HexagonTargetLowering::LowerOperationWrapper(SDNode *N,
2900 HexagonTargetLowering::ReplaceNodeResults(SDNode *N,
2922 HexagonTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
3220 bool HexagonTargetLowering::shouldReduceLoadWidth(SDNode *Load,
lib/Target/Hexagon/HexagonISelLowering.h 151 void LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results,
153 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
228 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
261 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op,
261 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op,
315 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
364 SDNode *N = DAG.getMachineNode(MachineOpc, dl, Ty, Ops);
467 SDValue PerformHvxDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 1586 HexagonTargetLowering::PerformHvxDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
lib/Target/Lanai/LanaiISelDAGToDAG.cpp 70 void Select(SDNode *N) override;
74 void selectFrameIndex(SDNode *N);
272 void LanaiDAGToDAGISel::Select(SDNode *Node) {
315 void LanaiDAGToDAGISel::selectFrameIndex(SDNode *Node) {
lib/Target/Lanai/LanaiISelLowering.cpp 1347 static bool isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes, SDValue &CC,
1418 static SDValue combineSelectAndUse(SDNode *N, SDValue Slct, SDValue OtherOp,
1443 combineSelectAndUseCommutative(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
1457 static SDValue PerformSUBCombine(SDNode *N,
1470 SDValue LanaiTargetLowering::PerformDAGCombine(SDNode *N,
lib/Target/Lanai/LanaiISelLowering.h 105 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp 116 void Select(SDNode *N) override;
118 bool tryIndexedLoad(SDNode *Op);
119 bool tryIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8,
328 bool MSP430DAGToDAGISel::tryIndexedLoad(SDNode *N) {
353 bool MSP430DAGToDAGISel::tryIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2,
366 SDNode *ResNode =
380 void MSP430DAGToDAGISel::Select(SDNode *Node) {
lib/Target/MSP430/MSP430ISelLowering.cpp 946 SDNode* N = Op.getNode();
1323 bool MSP430TargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
1323 bool MSP430TargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,
lib/Target/MSP430/MSP430ISelLowering.h 177 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op,
177 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op,
lib/Target/Mips/Mips16ISelDAGToDAG.cpp 44 std::pair<SDNode *, SDNode *>
44 std::pair<SDNode *, SDNode *>
45 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, const SDLoc &DL, EVT Ty,
47 SDNode *Lo = nullptr, *Hi = nullptr;
48 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
179 bool Mips16DAGToDAGISel::trySelect(SDNode *Node) {
198 std::pair<SDNode *, SDNode *> LoHi =
198 std::pair<SDNode *, SDNode *> LoHi =
lib/Target/Mips/Mips16ISelDAGToDAG.h 26 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
26 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
26 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
39 bool trySelect(SDNode *Node) override;
lib/Target/Mips/MipsCCState.cpp 70 MipsCCState::getSpecialCallingConvForCallee(const SDNode *Callee,
lib/Target/Mips/MipsCCState.h 26 getSpecialCallingConvForCallee(const SDNode *Callee,
lib/Target/Mips/MipsISelDAGToDAG.cpp 67 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
154 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm,
223 bool MipsDAGToDAGISel::selectVecAddAsVecSubIfProfitable(SDNode *Node) {
267 void MipsDAGToDAGISel::Select(SDNode *Node) {
lib/Target/Mips/MipsISelDAGToDAG.h 46 SDNode *getGlobalBaseReg();
98 virtual bool selectVSplat(SDNode *N, APInt &Imm,
131 bool selectVecAddAsVecSubIfProfitable(SDNode *Node);
133 void Select(SDNode *N) override;
135 virtual bool trySelect(SDNode *Node) = 0;
138 inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
lib/Target/Mips/MipsISelLowering.cpp 567 static SDValue performDivRemCombine(SDNode *N, SelectionDAG &DAG,
676 static SDValue performSELECTCombine(SDNode *N, SelectionDAG &DAG,
755 static SDValue performCMovFPCombine(SDNode *N, SelectionDAG &DAG,
782 static SDValue performANDCombine(SDNode *N, SelectionDAG &DAG,
864 static SDValue performORCombine(SDNode *N, SelectionDAG &DAG,
962 static SDValue performMADD_MSUBCombine(SDNode *ROOTNode, SelectionDAG &CurDAG,
1055 static SDValue performSUBCombine(SDNode *N, SelectionDAG &DAG,
1070 static SDValue performADDCombine(SDNode *N, SelectionDAG &DAG,
1102 static SDValue performSHLCombine(SDNode *N, SelectionDAG &DAG,
1153 SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
1192 const SDNode *N, CombineLevel Level) const {
1199 MipsTargetLowering::LowerOperationWrapper(SDNode *N,
1210 MipsTargetLowering::ReplaceNodeResults(SDNode *N,
2146 SDNode *Node = Op.getNode();
2966 SDNode *Node) const {
lib/Target/Mips/MipsISelLowering.h 287 bool shouldFoldConstantShiftPairToMask(const SDNode *N,
319 void LowerOperationWrapper(SDNode *N,
329 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
340 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
347 SDNode *Node) const override;
lib/Target/Mips/MipsSEISelDAGToDAG.cpp 205 void MipsSEDAGToDAGISel::selectAddE(SDNode *Node, const SDLoc &DL) const {
237 SDNode *DSPCtrlField =
240 SDNode *Carry = CurDAG->getMachineNode(
246 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops);
256 SDNode *DSPCtrlFinal = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps);
258 SDNode *WrDSP = CurDAG->getMachineNode(Mips::WRDSP, DL, MVT::Glue,
509 bool MipsSEDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm,
733 bool MipsSEDAGToDAGISel::trySelect(SDNode *Node) {
806 SDNode *RegOpnd;
954 SDNode *Rdhwr =
1018 SDNode *Res = nullptr;
1167 SDNode *HiRes;
lib/Target/Mips/MipsSEISelDAGToDAG.h 39 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
39 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
39 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
43 void selectAddE(SDNode *Node, const SDLoc &DL) const;
96 bool selectVSplat(SDNode *N, APInt &Imm,
129 bool trySelect(SDNode *Node) override;
lib/Target/Mips/MipsSEISelLowering.cpp 481 static SDValue performANDCombine(SDNode *N, SelectionDAG &DAG,
596 static SDValue performORCombine(SDNode *N, SelectionDAG &DAG,
828 static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
844 static SDValue performDSPShiftCombine(unsigned Opc, SDNode *N, EVT Ty,
869 static SDValue performSHLCombine(SDNode *N, SelectionDAG &DAG,
892 static SDValue performSRACombine(SDNode *N, SelectionDAG &DAG,
938 static SDValue performSRLCombine(SDNode *N, SelectionDAG &DAG,
967 static SDValue performSETCCCombine(SDNode *N, SelectionDAG &DAG) {
980 static SDValue performVSELECTCombine(SDNode *N, SelectionDAG &DAG) {
997 static SDValue performXORCombine(SDNode *N, SelectionDAG &DAG,
1025 MipsSETargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {
1344 for (SDNode::value_iterator I = Op->value_begin(), E = Op->value_end();
lib/Target/Mips/MipsSEISelLowering.h 50 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 76 void NVPTXDAGToDAGISel::Select(SDNode *N) {
506 bool NVPTXDAGToDAGISel::tryIntrinsicChain(SDNode *N) {
523 bool NVPTXDAGToDAGISel::tryConstantFP16(SDNode *N) {
528 SDNode *LoadConstF16 =
591 bool NVPTXDAGToDAGISel::SelectSETP_F16X2(SDNode *N) {
595 SDNode *SetP = CurDAG->getMachineNode(
604 bool NVPTXDAGToDAGISel::tryEXTRACT_VECTOR_ELEMENT(SDNode *N) {
613 SmallVector<SDNode *, 4> E0, E1;
645 SDNode *ScatterOp =
647 for (auto *Node : E0)
649 for (auto *Node : E1)
718 bool NVPTXDAGToDAGISel::tryIntrinsicNoChain(SDNode *N) {
729 void NVPTXDAGToDAGISel::SelectTexSurfHandle(SDNode *N) {
737 void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
838 bool NVPTXDAGToDAGISel::tryLoad(SDNode *N) {
844 SDNode *NVPTXLD = nullptr;
991 bool NVPTXDAGToDAGISel::tryLoadVector(SDNode *N) {
998 SDNode *LD;
1230 bool NVPTXDAGToDAGISel::tryLDGLDU(SDNode *N) {
1264 SDNode *LD;
1691 SDNode *CvtNode =
1703 bool NVPTXDAGToDAGISel::tryStore(SDNode *N) {
1711 SDNode *NVPTXST = nullptr;
1870 bool NVPTXDAGToDAGISel::tryStoreVector(SDNode *N) {
1876 SDNode *ST;
2094 bool NVPTXDAGToDAGISel::tryLoadParam(SDNode *Node) {
2171 bool NVPTXDAGToDAGISel::tryStoreRetval(SDNode *N) {
2233 SDNode *Ret = CurDAG->getMachineNode(Opcode.getValue(), DL, MVT::Other, Ops);
2241 bool NVPTXDAGToDAGISel::tryStoreParam(SDNode *N) {
2319 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_u32_u16, DL,
2328 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_s32_s16, DL,
2336 SDNode *Ret =
2345 bool NVPTXDAGToDAGISel::tryTextureIntrinsic(SDNode *N) {
2864 bool NVPTXDAGToDAGISel::trySurfaceIntrinsic(SDNode *N) {
3376 bool NVPTXDAGToDAGISel::tryBFE(SDNode *N) {
3605 SDNode *OpNode, SDValue Addr, SDValue &Base, SDValue &Offset, MVT mvt) {
3620 bool NVPTXDAGToDAGISel::SelectADDRsi(SDNode *OpNode, SDValue Addr,
3626 bool NVPTXDAGToDAGISel::SelectADDRsi64(SDNode *OpNode, SDValue Addr,
3633 SDNode *OpNode, SDValue Addr, SDValue &Base, SDValue &Offset, MVT mvt) {
3663 bool NVPTXDAGToDAGISel::SelectADDRri(SDNode *OpNode, SDValue Addr,
3669 bool NVPTXDAGToDAGISel::SelectADDRri64(SDNode *OpNode, SDValue Addr,
3674 bool NVPTXDAGToDAGISel::ChkMemSDNodeAddressSpace(SDNode *N,
lib/Target/NVPTX/NVPTXISelDAGToDAG.h 58 void Select(SDNode *N) override;
59 bool tryIntrinsicNoChain(SDNode *N);
60 bool tryIntrinsicChain(SDNode *N);
61 void SelectTexSurfHandle(SDNode *N);
62 bool tryLoad(SDNode *N);
63 bool tryLoadVector(SDNode *N);
64 bool tryLDGLDU(SDNode *N);
65 bool tryStore(SDNode *N);
66 bool tryStoreVector(SDNode *N);
67 bool tryLoadParam(SDNode *N);
68 bool tryStoreRetval(SDNode *N);
69 bool tryStoreParam(SDNode *N);
70 void SelectAddrSpaceCast(SDNode *N);
71 bool tryTextureIntrinsic(SDNode *N);
72 bool trySurfaceIntrinsic(SDNode *N);
73 bool tryBFE(SDNode *N);
74 bool tryConstantFP16(SDNode *N);
75 bool SelectSETP_F16X2(SDNode *N);
76 bool tryEXTRACT_VECTOR_ELEMENT(SDNode *N);
85 bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
87 bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base,
89 bool SelectADDRri64(SDNode *OpNode, SDValue Addr, SDValue &Base,
91 bool SelectADDRsi_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
93 bool SelectADDRsi(SDNode *OpNode, SDValue Addr, SDValue &Base,
95 bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base,
98 bool ChkMemSDNodeAddressSpace(SDNode *N, unsigned int spN) const;
lib/Target/NVPTX/NVPTXISelLowering.cpp 1890 SDNode *Node = Op.getNode();
2249 SDNode *Node = Op.getNode();
2288 SDNode *N = Op.getNode();
2411 SDNode *Node = Op.getNode();
4342 static SDValue PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1,
4385 for (SDNode::use_iterator UI = N0.getNode()->use_begin(),
4389 SDNode *User = *UI;
4408 const SDNode *left = N0.getOperand(0).getNode();
4409 const SDNode *right = N0.getOperand(1).getNode();
4415 for (SDNode::use_iterator UI = left->use_begin(), UE = left->use_end(); UI != UE; ++UI) {
4416 SDNode *User = *UI;
4425 for (SDNode::use_iterator UI = right->use_begin(), UE = right->use_end(); UI != UE; ++UI) {
4426 SDNode *User = *UI;
4448 static SDValue PerformADDCombine(SDNode *N,
4464 static SDValue PerformANDCombine(SDNode *N,
4539 static SDValue PerformREMCombine(SDNode *N,
4557 for (const SDNode *U : Num->uses()) {
4642 static SDValue TryMULWIDECombine(SDNode *N,
4709 static SDValue PerformMULCombine(SDNode *N,
4722 static SDValue PerformSHLCombine(SDNode *N,
4734 static SDValue PerformSETCCCombine(SDNode *N,
4755 SDValue NVPTXTargetLowering::PerformDAGCombine(SDNode *N,
4779 static void ReplaceLoadVector(SDNode *N, SelectionDAG &DAG,
4909 static void ReplaceINTRINSIC_W_CHAIN(SDNode *N, SelectionDAG &DAG,
5048 SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const {
lib/Target/NVPTX/NVPTXISelLowering.h 575 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
577 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 191 static bool isRotateAndMask(SDNode *N, unsigned Mask, bool isShiftMask,
196 SDNode *getGlobalBaseReg();
198 void selectFrameIndex(SDNode *SN, SDNode *N, unsigned Offset = 0);
198 void selectFrameIndex(SDNode *SN, SDNode *N, unsigned Offset = 0);
202 void Select(SDNode *N) override;
204 bool tryBitfieldInsert(SDNode *N);
205 bool tryBitPermutation(SDNode *N);
206 bool tryIntCompareInGPR(SDNode *N);
345 bool trySETCC(SDNode *N);
351 SDValue combineToCMPB(SDNode *N);
352 void foldBoolExts(SDValue &Res, SDNode *&N);
354 bool AllUsersSelectZero(SDNode *N);
355 void SwapAllSelectUsers(SDNode *N);
357 bool isOffsetMultipleOf(SDNode *N, unsigned Val) const;
358 void transferMemOperands(SDNode *N, SDNode *Result);
358 void transferMemOperands(SDNode *N, SDNode *Result);
430 SDNode *PPCDAGToDAGISel::getGlobalBaseReg() {
485 static bool isInt32Immediate(SDNode *N, unsigned &Imm) {
495 static bool isInt64Immediate(SDNode *N, uint64_t &Imm) {
568 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) {
573 void PPCDAGToDAGISel::selectFrameIndex(SDNode *SN, SDNode *N, unsigned Offset) {
573 void PPCDAGToDAGISel::selectFrameIndex(SDNode *SN, SDNode *N, unsigned Offset) {
586 bool PPCDAGToDAGISel::isRotateAndMask(SDNode *N, unsigned Mask,
665 SDNode *MN = CurDAG->getMachineNode(Opcode, dl, VTs, Ops);
706 SDNode *MN = CurDAG->getMachineNode(Opcode, dl, VTs, Ops);
714 bool PPCDAGToDAGISel::tryBitfieldInsert(SDNode *N) {
887 static SDNode *selectI64ImmDirect(SelectionDAG *CurDAG, const SDLoc &dl,
912 SDNode *Result;
972 static SDNode *selectI64Imm(SelectionDAG *CurDAG, const SDLoc &dl,
1032 static unsigned allUsesTruncate(SelectionDAG *CurDAG, SDNode *N) {
1037 for (SDNode::use_iterator Use = N->use_begin(), UseEnd = N->use_end();
1089 static SDNode *selectI64Imm(SelectionDAG *CurDAG, SDNode *N) {
1089 static SDNode *selectI64Imm(SelectionDAG *CurDAG, SDNode *N) {
1844 SDNode *Select32(SDNode *N, bool LateMask, unsigned *InstCnt) {
1844 SDNode *Select32(SDNode *N, bool LateMask, unsigned *InstCnt) {
2223 SDNode *Select64(SDNode *N, bool LateMask, unsigned *InstCnt) {
2223 SDNode *Select64(SDNode *N, bool LateMask, unsigned *InstCnt) {
2359 SDNode *Select(SDNode *N, bool LateMask, unsigned *InstCnt = nullptr) {
2359 SDNode *Select(SDNode *N, bool LateMask, unsigned *InstCnt = nullptr) {
2405 SDNode *Select(SDNode *N) {
2405 SDNode *Select(SDNode *N) {
2433 SDNode *RN = Select(N, false, &InstCnt);
2437 SDNode *RNLM = Select(N, true, &InstCntLateMask);
2476 SDNode *tryEXTEND(SDNode *N);
2476 SDNode *tryEXTEND(SDNode *N);
2477 SDNode *tryLogicOpOfCompares(SDNode *N);
2477 SDNode *tryLogicOpOfCompares(SDNode *N);
2501 SDNode *Select(SDNode *N) {
2501 SDNode *Select(SDNode *N) {
2530 SDNode *IntegerCompareEliminator::tryEXTEND(SDNode *N) {
2530 SDNode *IntegerCompareEliminator::tryEXTEND(SDNode *N) {
2570 SDNode *IntegerCompareEliminator::tryLogicOpOfCompares(SDNode *N) {
2570 SDNode *IntegerCompareEliminator::tryLogicOpOfCompares(SDNode *N) {
3621 bool PPCDAGToDAGISel::tryIntCompareInGPR(SDNode *N) {
3640 if (SDNode *New = ICmpElim.Select(N)) {
3649 bool PPCDAGToDAGISel::tryBitPermutation(SDNode *N) {
3665 if (SDNode *New = BPS.Select(N)) {
4006 bool PPCDAGToDAGISel::trySETCC(SDNode *N) {
4071 SDNode *AD = CurDAG->getMachineNode(PPC::ADDIC, dl, MVT::i32, MVT::Glue,
4166 bool PPCDAGToDAGISel::isOffsetMultipleOf(SDNode *N, unsigned Val) const {
4201 void PPCDAGToDAGISel::transferMemOperands(SDNode *N, SDNode *Result) {
4201 void PPCDAGToDAGISel::transferMemOperands(SDNode *N, SDNode *Result) {
4207 static bool mayUseP9Setb(SDNode *N, const ISD::CondCode &CC, SelectionDAG *DAG,
4349 void PPCDAGToDAGISel::Select(SDNode *N) {
4444 SDNode *Op =
4453 SDNode *Op =
4519 SDNode *MN = CurDAG->getMachineNode(
4559 SDNode *MN = CurDAG->getMachineNode(
4711 SDNode *Lo = CurDAG->getMachineNode(PPC::ORI8, dl, MVT::i64,
4734 SDNode *Lo = CurDAG->getMachineNode(PPC::XORI8, dl, MVT::i64,
4852 SDNode *Tmp =
4962 SDNode *NewN = CurDAG->SelectNodeTo(N, PPC::LXVDSX,
5093 SDNode *MN = CurDAG->getMachineNode(PPC::LWZtoc, dl, MVT::i32, GA,
5134 SDNode *Tmp = CurDAG->getMachineNode(
5140 SDNode *MN = CurDAG->getMachineNode(
5200 SDNode *Tmp = CurDAG->getMachineNode(Opc1, dl, VT, EltVal);
5212 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal);
5214 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal);
5226 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal);
5228 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal);
5245 SDValue PPCDAGToDAGISel::combineToCMPB(SDNode *N) {
5462 void PPCDAGToDAGISel::foldBoolExts(SDValue &Res, SDNode *&N) {
5485 SDNode *User = *N->use_begin();
5529 SDNode *N = &*--Position;
5577 bool PPCDAGToDAGISel::AllUsersSelectZero(SDNode *N) {
5578 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5580 SDNode *User = *UI;
5587 SDNode *Op2 = User->getOperand(2).getNode();
5606 void PPCDAGToDAGISel::SwapAllSelectUsers(SDNode *N) {
5607 SmallVector<SDNode *, 4> ToReplace;
5608 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5610 SDNode *User = *UI;
5617 for (SmallVector<SDNode *, 4>::iterator UI = ToReplace.begin(),
5619 SDNode *User = *UI;
5620 SDNode *ResNode =
5640 for (SDNode &Node : CurDAG->allnodes()) {
5644 SDNode *ResNode = MachineNode;
6062 SmallPtrSetImpl<SDNode *> &ToPromote) {
6117 SmallPtrSet<SDNode *, 16> ToPromote1;
6132 SmallPtrSet<SDNode *, 16> ToPromote1;
6148 SmallPtrSet<SDNode *, 16> ToPromote1;
6162 SmallPtrSet<SDNode *, 16> ToPromote1, ToPromote2;
6186 SmallPtrSet<SDNode *, 16> ToPromote1;
6221 SDNode *N = &*--Position;
6259 SmallPtrSet<SDNode *, 16> ToPromote;
6266 for (SDNode *PN : ToPromote) {
6267 for (SDNode *UN : PN->uses()) {
6286 for (SDNode *PN : ToPromote) {
6321 SDNode *ReplOp =
6377 SDNode *N = &*--Position;
lib/Target/PowerPC/PPCISelLowering.cpp 1748 int PPC::isVSLDOIShuffleMask(SDNode *N, unsigned ShuffleKind,
2090 unsigned PPC::getSplatIdxForPPCMnemonics(SDNode *N, unsigned EltSize,
2104 SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
2206 int PPC::isQVALIGNIShuffleMask(SDNode *N) {
2242 bool llvm::isIntS16Immediate(SDNode *N, int16_t &Imm) {
2262 for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end();
2499 static bool usePartialVectorLoads(SDNode *N, const PPCSubtarget& ST) {
2531 for (SDNode::use_iterator UI = LD->use_begin(), UE = LD->use_end();
2543 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
3030 SDNode *Node = Op.getNode();
4747 static SDNode *isBLACompatibleAddress(SDValue Op, SelectionDAG &DAG) {
4966 if (SDNode *Dest = isBLACompatibleAddress(Callee, DAG)) {
7572 SDNode *Origin = Op.getOperand(0).getNode();
7582 for (SDNode::use_iterator UI = Origin->use_begin(),
9654 SDNode *N = Op.getNode();
10186 void PPCTargetLowering::ReplaceNodeResults(SDNode *N,
11761 static bool isConsecutiveLS(SDNode *N, LSBaseSDNode *Base,
11878 SmallSet<SDNode *, 16> LoadRoots;
11879 SmallVector<SDNode *, 8> Queue(1, Chain.getNode());
11880 SmallSet<SDNode *, 16> Visited;
11886 SDNode *ChainNext = Queue.pop_back_val();
11912 for (SmallSet<SDNode *, 16>::iterator I = LoadRoots.begin(),
11917 SDNode *LoadRoot = Queue.pop_back_val();
11925 for (SDNode::use_iterator UI = LoadRoot->use_begin(),
11941 static SDValue generateEquivalentSub(SDNode *N, int Size, bool Complement,
11973 SDValue PPCTargetLowering::ConvertSETCCToSubtract(SDNode *N,
11987 for (SDNode::use_iterator UI = N->use_begin(),
12015 SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
12102 SmallPtrSet<SDNode *, 16> Visited;
12167 for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(),
12170 SDNode *User = *UI;
12191 for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(),
12194 SDNode *User = *UI;
12296 SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
12332 SmallPtrSet<SDNode *, 16> Visited;
12371 DenseMap<SDNode *, EVT> SelectTruncOp[2];
12380 for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(),
12383 SDNode *User = *UI;
12405 for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(),
12408 SDNode *User = *UI;
12579 SDValue PPCTargetLowering::combineSetCC(SDNode *N,
12626 combineElementTruncationToVectorTruncation(SDNode *N,
12712 static SDValue combineBVOfConsecutiveLoads(SDNode *N, SelectionDAG &DAG) {
12802 static SDValue addShuffleForVecExtend(SDNode *N, SelectionDAG &DAG,
12836 static SDValue combineBVOfVecSExt(SDNode *N, SelectionDAG &DAG) {
12930 SDValue PPCTargetLowering::DAGCombineBuildVector(SDNode *N,
13013 SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
13119 SDValue PPCTargetLowering::expandVSXLoadForLE(SDNode *N,
13187 SDValue PPCTargetLowering::expandVSXStoreForLE(SDNode *N,
13252 SDValue PPCTargetLowering::combineStoreFPToInt(SDNode *N,
13364 SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
13543 SDNode *Trunc = *UI++;
13545 SDNode *RightShift = *UI;
13559 SDNode *Trunc2 = *RightShift->use_begin();
13565 SDNode *Bitcast = *Trunc->use_begin();
13566 SDNode *Bitcast2 = *Trunc2->use_begin();
13783 SDNode *BasePtr = Add->getOperand(0).getNode();
13784 for (SDNode::use_iterator UI = BasePtr->use_begin(),
13799 SDNode *BasePtr = Add->getOperand(0).getNode();
13800 for (SDNode::use_iterator UI = BasePtr->use_begin(),
13807 SDNode *OtherAdd = *UI;
13808 for (SDNode::use_iterator VI = OtherAdd->use_begin(),
13929 SDNode *VCMPoNode = nullptr;
13931 SDNode *LHSN = N->getOperand(0).getNode();
13932 for (SDNode::use_iterator UI = LHSN->use_begin(), E = LHSN->use_end();
13950 SDNode *FlagUser = nullptr;
13951 for (SDNode::use_iterator UI = VCMPoNode->use_begin();
13954 SDNode *User = *UI;
14094 PPCTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
14096 SmallVectorImpl<SDNode *> &Created) const {
15000 Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const {
15100 static SDValue stripModuloOnShift(const TargetLowering &TLI, SDNode *N,
15132 SDValue PPCTargetLowering::combineSHL(SDNode *N, DAGCombinerInfo &DCI) const {
15162 SDValue PPCTargetLowering::combineSRA(SDNode *N, DAGCombinerInfo &DCI) const {
15169 SDValue PPCTargetLowering::combineSRL(SDNode *N, DAGCombinerInfo &DCI) const {
15180 static SDValue combineADDToADDZE(SDNode *N, SelectionDAG &DAG,
15263 SDValue PPCTargetLowering::combineADD(SDNode *N, DAGCombinerInfo &DCI) const {
15279 SDValue PPCTargetLowering::combineTRUNCATE(SDNode *N,
15322 SDValue PPCTargetLowering::combineMUL(SDNode *N, DAGCombinerInfo &DCI) const {
15471 SDValue PPCTargetLowering::combineABS(SDNode *N, DAGCombinerInfo &DCI) const {
15514 SDValue PPCTargetLowering::combineVSelect(SDNode *N,
lib/Target/PowerPC/PPCISelLowering.h 566 int isVSLDOIShuffleMask(SDNode *N, unsigned ShuffleKind,
587 unsigned getSplatIdxForPPCMnemonics(SDNode *N, unsigned EltSize,
594 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
598 int isQVALIGNIShuffleMask(SDNode *N);
687 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
719 Sched::Preference getSchedulingPreference(SDNode *N) const override;
728 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
731 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const;
732 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const;
734 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
736 SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor, SelectionDAG &DAG,
737 SmallVectorImpl<SDNode *> &Created) const override;
1178 SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const;
1179 SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const;
1180 SDValue DAGCombineTruncBoolExt(SDNode *N, DAGCombinerInfo &DCI) const;
1181 SDValue combineStoreFPToInt(SDNode *N, DAGCombinerInfo &DCI) const;
1182 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const;
1183 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const;
1184 SDValue combineSRA(SDNode *N, DAGCombinerInfo &DCI) const;
1185 SDValue combineSRL(SDNode *N, DAGCombinerInfo &DCI) const;
1186 SDValue combineMUL(SDNode *N, DAGCombinerInfo &DCI) const;
1187 SDValue combineADD(SDNode *N, DAGCombinerInfo &DCI) const;
1188 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const;
1189 SDValue combineSetCC(SDNode *N, DAGCombinerInfo &DCI) const;
1190 SDValue combineABS(SDNode *N, DAGCombinerInfo &DCI) const;
1191 SDValue combineVSelect(SDNode *N, DAGCombinerInfo &DCI) const;
1198 SDValue ConvertSETCCToSubtract(SDNode *N, DAGCombinerInfo &DCI) const;
1208 combineElementTruncationToVectorTruncation(SDNode *N,
1237 bool isIntS16Immediate(SDNode *N, int16_t &Imm);
lib/Target/PowerPC/PPCInstrInfo.h 217 SDNode *DefNode, unsigned DefIdx,
218 SDNode *UseNode, unsigned UseIdx) const override {
lib/Target/RISCV/RISCVISelDAGToDAG.cpp 47 void Select(SDNode *Node) override;
66 static SDNode *selectImm(SelectionDAG *CurDAG, const SDLoc &DL, int64_t Imm,
71 SDNode *Result = nullptr;
89 static bool isConstantMask(SDNode *Node, uint64_t &Mask) {
98 void RISCVDAGToDAGISel::Select(SDNode *Node) {
208 SDNode *N = &*--Position;
lib/Target/RISCV/RISCVISelLowering.cpp 838 static SDValue customLegalizeToWOp(SDNode *N, SelectionDAG &DAG) {
850 static SDValue customLegalizeToWOpWithSExt(SDNode *N, SelectionDAG &DAG) {
860 void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,
923 SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
1023 const SDNode *N, CombineLevel Level) const {
lib/Target/RISCV/RISCVISelLowering.h 82 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
85 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
130 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override {
135 bool isDesirableToCommuteWithShift(const SDNode *N,
lib/Target/Sparc/SparcISelDAGToDAG.cpp 43 void Select(SDNode *N) override;
63 SDNode* getGlobalBaseReg();
64 bool tryInlineAsm(SDNode *N);
68 SDNode* SparcDAGToDAGISel::getGlobalBaseReg() {
156 bool SparcDAGToDAGISel::tryInlineAsm(SDNode *N){
238 SDNode *GU = N->getGluedUser();
322 void SparcDAGToDAGISel::Select(SDNode *N) {
lib/Target/Sparc/SparcISelLowering.cpp 2521 SDNode *Node = Op.getNode();
2749 SDNode *InFP128 = DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF,
2788 SDNode *Hi64 = DAG.getMachineNode(TargetOpcode::EXTRACT_SUBREG,
2793 SDNode *Lo64 = DAG.getMachineNode(TargetOpcode::EXTRACT_SUBREG,
3075 SDValue SparcTargetLowering::PerformBITCASTCombine(SDNode *N,
3087 SDValue SparcTargetLowering::PerformDAGCombine(SDNode *N,
3334 void SparcTargetLowering::ReplaceNodeResults(SDNode *N,
lib/Target/Sparc/SparcISelLowering.h 185 SDValue PerformBITCASTCombine(SDNode *N, DAGCombinerInfo &DCI) const;
190 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
207 void ReplaceNodeResults(SDNode *N,
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp 138 inline SDValue getImm(const SDNode *Node, uint64_t Imm) const {
291 bool tryRISBGZero(SDNode *N);
295 bool tryRxSBG(SDNode *N, unsigned Opcode);
304 void splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0,
308 SDNode *Node);
311 bool tryGather(SDNode *N, unsigned Opcode);
319 bool tryFoldLoadStoreIntoMemOperand(SDNode *Node);
334 bool storeLoadCanUseMVC(SDNode *N) const;
339 bool storeLoadCanUseBlockBinary(SDNode *N, unsigned I) const;
342 SDValue expandSelectBoolean(SDNode *Node);
364 void Select(SDNode *Node) override;
367 bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const override;
367 bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const override;
514 static bool shouldUseLA(SDNode *Base, int64_t Disp, SDNode *Index) {
514 static bool shouldUseLA(SDNode *Base, int64_t Disp, SDNode *Index) {
609 static void insertDAGNode(SelectionDAG *DAG, SDNode *Pos, SDValue N) {
936 SDNode *N = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, VT);
951 bool SystemZDAGToDAGISel::tryRISBGZero(SDNode *N) {
1051 bool SystemZDAGToDAGISel::tryRxSBG(SDNode *N, unsigned Opcode) {
1108 void SystemZDAGToDAGISel::splitLargeImmediate(unsigned Opcode, SDNode *Node,
1144 const SystemZVectorConstantInfo &VCI, SDNode *Node) {
1172 bool SystemZDAGToDAGISel::tryGather(SDNode *N, unsigned Opcode) {
1200 SDNode *Res = CurDAG->getMachineNode(Opcode, DL, VT, MVT::Other, Ops);
1283 SmallVector<const SDNode *, 4> LoopWorklist;
1284 SmallPtrSet<const SDNode *, 16> Visited;
1305 if (SDNode::hasPredecessorHelper(Load.getNode(), Visited, LoopWorklist, Max,
1329 bool SystemZDAGToDAGISel::tryFoldLoadStoreIntoMemOperand(SDNode *Node) {
1432 bool SystemZDAGToDAGISel::storeLoadCanUseMVC(SDNode *N) const {
1451 bool SystemZDAGToDAGISel::storeLoadCanUseBlockBinary(SDNode *N,
1459 void SystemZDAGToDAGISel::Select(SDNode *Node) {
1561 SDNode *UpdatedNode =
1700 SystemZDAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U,
1701 SDNode *Root) const {
1712 SDNode *CCUser = *U->use_begin();
1713 SDNode *CCRegUser = nullptr;
1716 for (auto *U : CCUser->uses()) {
1823 SDValue SystemZDAGToDAGISel::expandSelectBoolean(SDNode *Node) {
1893 SDNode *N = &*I++;
lib/Target/SystemZ/SystemZISelLowering.cpp 1895 static SDNode *emitIntrinsicWithCCAndChain(SelectionDAG &DAG, SDValue Op,
1915 static SDNode *emitIntrinsicWithCC(SelectionDAG &DAG, SDValue Op,
2147 SDNode *N = *I;
2167 SDNode *N = *I;
2194 SDNode *N = *I;
2538 SDNode *Node;
3126 SDNode *U64 = DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF, DL,
3140 SDNode *U64 = DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, MVT::f64);
3438 SDNode *N = Op.getNode();
3496 SDNode *N = Op.getNode();
3924 SDNode *Node = emitIntrinsicWithCCAndChain(DAG, Op, Opcode);
3938 SDNode *Node = emitIntrinsicWithCC(DAG, Op, Opcode);
4684 std::map<const SDNode*, unsigned> UseCounts;
4685 SDNode *LoadMaxUses = nullptr;
4688 SDNode *Ld = Elems[I].getNode();
5052 SDNode *Pair = DAG.getMachineNode(SystemZ::PAIR128, DL,
5067 SystemZTargetLowering::LowerOperationWrapper(SDNode *N,
5123 SystemZTargetLowering::ReplaceNodeResults(SDNode *N,
5408 SDNode *N, DAGCombinerInfo &DCI) const {
5435 SDNode *N, DAGCombinerInfo &DCI) const {
5456 SDNode *N, DAGCombinerInfo &DCI) const {
5486 SDNode *N, DAGCombinerInfo &DCI) const {
5520 SDNode *N, DAGCombinerInfo &DCI) const {
5532 SmallVector<SDNode*, 8> OtherUses;
5533 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5550 for (SDNode *U : OtherUses) {
5585 SDNode *N, DAGCombinerInfo &DCI) const {
5646 SDNode *N, DAGCombinerInfo &DCI) const {
5685 SDNode *N, DAGCombinerInfo &DCI) const {
5726 SDNode *N, DAGCombinerInfo &DCI) const {
5736 SDNode *N, DAGCombinerInfo &DCI) const {
5756 for (auto *U : Vec->uses()) {
5787 SDNode *N, DAGCombinerInfo &DCI) const {
5807 for (auto *U : Vec->uses()) {
5838 SDNode *N, DAGCombinerInfo &DCI) const {
5957 auto *ICmp = CCReg.getNode();
5960 auto *CompareLHS = ICmp->getOperand(0).getNode();
6006 auto *SHL = CompareLHS->getOperand(0).getNode();
6012 auto *IPM = SHL->getOperand(0).getNode();
6043 SDNode *N, DAGCombinerInfo &DCI) const {
6067 SDNode *N, DAGCombinerInfo &DCI) const {
6091 SDNode *N, DAGCombinerInfo &DCI) const {
6132 SDNode *N, DAGCombinerInfo &DCI) const {
6154 SDValue SystemZTargetLowering::PerformDAGCombine(SDNode *N,
lib/Target/SystemZ/SystemZISelLowering.h 480 void LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results,
482 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
503 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
597 SDValue combineZERO_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const;
598 SDValue combineSIGN_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const;
599 SDValue combineSIGN_EXTEND_INREG(SDNode *N, DAGCombinerInfo &DCI) const;
600 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const;
602 SDValue combineLOAD(SDNode *N, DAGCombinerInfo &DCI) const;
603 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const;
604 SDValue combineVECTOR_SHUFFLE(SDNode *N, DAGCombinerInfo &DCI) const;
605 SDValue combineEXTRACT_VECTOR_ELT(SDNode *N, DAGCombinerInfo &DCI) const;
606 SDValue combineJOIN_DWORDS(SDNode *N, DAGCombinerInfo &DCI) const;
607 SDValue combineFP_ROUND(SDNode *N, DAGCombinerInfo &DCI) const;
608 SDValue combineFP_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const;
609 SDValue combineBSWAP(SDNode *N, DAGCombinerInfo &DCI) const;
610 SDValue combineBR_CCMASK(SDNode *N, DAGCombinerInfo &DCI) const;
611 SDValue combineSELECT_CCMASK(SDNode *N, DAGCombinerInfo &DCI) const;
612 SDValue combineGET_CCMASK(SDNode *N, DAGCombinerInfo &DCI) const;
613 SDValue combineIntDIVREM(SDNode *N, DAGCombinerInfo &DCI) const;
lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp 66 void Select(SDNode *Node) override;
79 void WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 954 SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const {
1479 SDNode *IdxNode = Op.getOperand(Op.getNumOperands() - 1).getNode();
lib/Target/WebAssembly/WebAssemblyISelLowering.h 89 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
lib/Target/X86/X86ISelDAGToDAG.cpp 200 bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const override;
200 bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const override;
209 void Select(SDNode *N) override;
220 bool selectAddr(SDNode *Parent, SDValue N, SDValue &Base,
223 bool selectVectorAddr(SDNode *Parent, SDValue N, SDValue &Base,
236 bool selectScalarSSELoad(SDNode *Root, SDNode *Parent, SDValue N,
236 bool selectScalarSSELoad(SDNode *Root, SDNode *Parent, SDValue N,
243 bool tryFoldLoad(SDNode *Root, SDNode *P, SDValue N,
243 bool tryFoldLoad(SDNode *Root, SDNode *P, SDValue N,
249 bool tryFoldLoad(SDNode *P, SDValue N,
256 bool tryFoldBroadcast(SDNode *Root, SDNode *P, SDValue N,
256 bool tryFoldBroadcast(SDNode *Root, SDNode *P, SDValue N,
332 bool shouldAvoidImmediateInstFormsForSize(SDNode *N) const {
342 for (SDNode::use_iterator UI = N->use_begin(),
345 SDNode *User = *UI;
422 SDValue getExtractVEXTRACTImmediate(SDNode *N, unsigned VecWidth,
430 SDValue getInsertVINSERTImmediate(SDNode *N, unsigned VecWidth,
440 bool isUnneededShiftMask(SDNode *N, unsigned Width) const {
454 SDNode *getGlobalBaseReg();
475 bool isSExtAbsoluteSymbolRef(unsigned Width, SDNode *N) const;
479 template <unsigned Width> bool isSExtRelocImm(SDNode *N) const {
509 bool foldLoadStoreIntoMemOperand(SDNode *Node);
510 MachineSDNode *matchBEXTRFromAndImm(SDNode *Node);
511 bool matchBitExtract(SDNode *Node);
512 bool shrinkAndImmediate(SDNode *N);
513 bool isMaskZeroExtended(SDNode *N) const;
514 bool tryShiftAmountMod(SDNode *N);
515 bool combineIncDecVector(SDNode *Node);
516 bool tryShrinkShlLogicImm(SDNode *N);
517 bool tryVPTESTM(SDNode *Root, SDValue Setcc, SDValue Mask);
518 bool tryMatchBitSelect(SDNode *N);
521 const SDLoc &dl, MVT VT, SDNode *Node);
523 const SDLoc &dl, MVT VT, SDNode *Node,
526 bool tryOptimizeRem8Extend(SDNode *N);
537 static bool isLegalMaskCompare(SDNode *N, const X86Subtarget *Subtarget) {
560 bool X86DAGToDAGISel::isMaskZeroExtended(SDNode *N) const {
572 X86DAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const {
572 X86DAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const {
792 SDNode *N = &*I++; // Preincrement iterator to avoid invalidation issues.
1119 bool X86DAGToDAGISel::tryOptimizeRem8Extend(SDNode *N) {
1163 SDNode *N = &*--Position;
2218 bool X86DAGToDAGISel::selectVectorAddr(SDNode *Parent, SDValue N, SDValue &Base,
2253 bool X86DAGToDAGISel::selectAddr(SDNode *Parent, SDValue N, SDValue &Base,
2293 static bool hasSingleUsesFromRoot(SDNode *Root, SDNode *User) {
2293 static bool hasSingleUsesFromRoot(SDNode *Root, SDNode *User) {
2310 bool X86DAGToDAGISel::selectScalarSSELoad(SDNode *Root, SDNode *Parent,
2310 bool X86DAGToDAGISel::selectScalarSSELoad(SDNode *Root, SDNode *Parent,
2585 bool X86DAGToDAGISel::tryFoldLoad(SDNode *Root, SDNode *P, SDValue N,
2585 bool X86DAGToDAGISel::tryFoldLoad(SDNode *Root, SDNode *P, SDValue N,
2599 bool X86DAGToDAGISel::tryFoldBroadcast(SDNode *Root, SDNode *P, SDValue N,
2599 bool X86DAGToDAGISel::tryFoldBroadcast(SDNode *Root, SDNode *P, SDValue N,
2616 SDNode *X86DAGToDAGISel::getGlobalBaseReg() {
2622 bool X86DAGToDAGISel::isSExtAbsoluteSymbolRef(unsigned Width, SDNode *N) const {
2637 static X86::CondCode getCondFromNode(SDNode *N) {
2661 for (SDNode::use_iterator UI = Flags->use_begin(), UE = Flags->use_end();
2671 for (SDNode::use_iterator FlagUI = UI->use_begin(),
2697 for (SDNode::use_iterator UI = Flags->use_begin(), UE = Flags->use_end();
2707 for (SDNode::use_iterator FlagUI = UI->use_begin(),
2753 for (SDNode::use_iterator UI = Flags->use_begin(), UE = Flags->use_end();
2766 for (SDNode::use_iterator FlagUI = UI->use_begin(), FlagUE = UI->use_end();
2840 SmallVector<const SDNode *, 4> LoopWorklist;
2841 SmallPtrSet<const SDNode *, 16> Visited;
2910 if (SDNode::hasPredecessorHelper(Load.getNode(), Visited, LoopWorklist, Max,
2939 bool X86DAGToDAGISel::foldLoadStoreIntoMemOperand(SDNode *Node) {
3187 bool X86DAGToDAGISel::matchBitExtract(SDNode *Node) {
3451 MachineSDNode *X86DAGToDAGISel::matchBEXTRFromAndImm(SDNode *Node) {
3573 MVT VT, SDNode *Node) {
3605 MVT VT, SDNode *Node,
3635 bool X86DAGToDAGISel::tryShiftAmountMod(SDNode *N) {
3702 SDNode *UpdatedNode = CurDAG->UpdateNodeOperands(N, N->getOperand(0),
3722 bool X86DAGToDAGISel::tryShrinkShlLogicImm(SDNode *N) {
3841 bool X86DAGToDAGISel::combineIncDecVector(SDNode *Node) {
3888 bool X86DAGToDAGISel::shrinkAndImmediate(SDNode *And) {
4110 bool X86DAGToDAGISel::tryVPTESTM(SDNode *Root, SDValue Setcc,
4198 SDNode *ParentNode = N0.getNode();
4206 SDNode *ParentNode = N0.getNode();
4302 bool X86DAGToDAGISel::tryMatchBitSelect(SDNode *N) {
4349 void X86DAGToDAGISel::Select(SDNode *Node) {
4765 SDNode *CNode = CurDAG->getMachineNode(Opc, dl, VTs, Ops);
4937 SDNode *RNode = CurDAG->getMachineNode(AHExtOpcode, dl, MVT::i32,
lib/Target/X86/X86ISelLowering.cpp 2669 bool X86TargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const {
2674 SDNode *Copy = *N->use_begin();
2685 for (SDNode::use_iterator UI = Copy->use_begin(), UE = Copy->use_end();
4859 bool X86TargetLowering::shouldReduceLoadWidth(SDNode *Load,
5114 const SDNode *N, CombineLevel Level) const {
5146 SDNode *N) const {
5570 static bool collectConcatOps(SDNode *N, SmallVectorImpl<SDValue> &Ops) {
6414 static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
7320 static SDValue getShuffleScalarElt(SDNode *N, unsigned Index, SelectionDAG &DAG,
8053 static SDValue combineToConsecutiveLoads(EVT VT, SDNode *N, const SDLoc &DL,
8093 static bool isFoldableUseOfShuffle(SDNode *N) {
8094 for (auto *U : N->uses()) {
17302 SDNode *User = *Op.getNode()->use_begin();
19749 for (SDNode *User : Op->uses())
19999 for (SDNode::use_iterator UI = Op->use_begin(), UE = Op->use_end(); UI != UE;
20001 SDNode *User = *UI;
20082 for (SDNode::use_iterator UI = Op.getNode()->use_begin(),
20305 X86TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
20307 SmallVectorImpl<SDNode *> &Created) const {
22076 SDNode *User = *Op.getNode()->use_begin();
22082 SDNode *NewBR =
22117 SDNode *User = *Op.getNode()->use_begin();
22123 SDNode *NewBR =
22201 SDNode *Node = Op.getNode();
23784 SDNode *Res = DAG.getMachineNode(Opc, dl, MVT::Other, Ops);
23796 static SDValue expandIntrinsicWChainHelper(SDNode *N, const SDLoc &DL,
23813 SDNode *N1 = DAG.getMachineNode(
23851 static void getReadTimeStampCounter(SDNode *N, const SDLoc &DL, unsigned Opcode,
26646 SDNode *Res = DAG.getMachineNode(X86::OR32mi8Locked, DL, MVT::i32,
26661 SDNode *Res = DAG.getMachineNode(X86::OR32mi8Locked, DL, MVT::i32,
27251 SDNode *N = Op.getNode();
27790 void X86TargetLowering::LowerOperationWrapper(SDNode *N,
27817 void X86TargetLowering::ReplaceNodeResults(SDNode *N,
33026 ArrayRef<int> RootMask, ArrayRef<const SDNode *> SrcNodes, unsigned Depth,
33182 SmallVector<const SDNode *, 16> CombinedNodes(SrcNodes.begin(),
33197 SDNode::areOnlyUsersOf(CombinedNodes, Ops[i].getNode()))
33505 for (SDNode *User : Src->uses())
33835 static bool isAddSubOrSubAdd(SDNode *N, const X86Subtarget &Subtarget,
33895 static SDValue combineShuffleToFMAddSub(SDNode *N,
33938 static SDValue combineShuffleToAddSubOrFMAddSub(SDNode *N,
33974 static SDValue combineShuffleOfConcatUndef(SDNode *N, SelectionDAG &DAG,
34017 static SDValue foldShuffleOfHorizOp(SDNode *N, SelectionDAG &DAG) {
34136 static SDValue combineShuffle(SDNode *N, SelectionDAG &DAG,
35064 XFormVExtractWithShuffleIntoLoad(SDNode *N, SelectionDAG &DAG,
35331 static SDValue combineCastedMaskArithmetic(SDNode *N, SelectionDAG &DAG,
35458 static SDValue combineBitcast(SDNode *N, SelectionDAG &DAG,
35745 static SDValue combineHorizontalMinMaxResult(SDNode *Extract, SelectionDAG &DAG,
35822 static SDValue combineHorizontalPredicateResult(SDNode *Extract,
35952 static SDValue combineBasicSADPattern(SDNode *Extract, SelectionDAG &DAG,
36035 static SDValue combineExtractWithShuffle(SDNode *N, SelectionDAG &DAG,
36167 static SDValue scalarizeExtEltFP(SDNode *ExtElt, SelectionDAG &DAG) {
36265 static SDValue combineReductionToHorizontal(SDNode *ExtElt, SelectionDAG &DAG,
36378 static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG,
36480 SmallVector<SDNode *, 16> BoolExtracts;
36496 for (SDNode *Use : BoolExtracts) {
36517 combineVSelectWithAllOnesOrZeros(SDNode *N, SelectionDAG &DAG,
36630 static SDValue narrowVectorSelect(SDNode *N, SelectionDAG &DAG,
36659 static SDValue combineSelectOfTwoConstants(SDNode *N, SelectionDAG &DAG) {
36727 static SDValue combineVSelectToBLENDV(SDNode *N, SelectionDAG &DAG,
36772 for (SDNode::use_iterator UI = Cond->use_begin(), UE = Cond->use_end();
36791 for (SDNode *U : Cond->uses()) {
36805 static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
37577 static SDValue combineCMov(SDNode *N, SelectionDAG &DAG,
37800 static bool canReduceVMulWidth(SDNode *N, SelectionDAG &DAG, ShrinkMode &Mode) {
37862 static SDValue reduceVMULWidth(SDNode *N, SelectionDAG &DAG,
37930 static SDValue combineMulSpecial(uint64_t MulAmt, SDNode *N, SelectionDAG &DAG,
38018 static SDValue combineMulToPMADDWD(SDNode *N, SelectionDAG &DAG,
38066 static SDValue combineMulToPMULDQ(SDNode *N, SelectionDAG &DAG,
38110 static SDValue combineMul(SDNode *N, SelectionDAG &DAG,
38252 static SDValue combineShiftLeft(SDNode *N, SelectionDAG &DAG) {
38311 static SDValue combineShiftRightArithmetic(SDNode *N, SelectionDAG &DAG) {
38364 static SDValue combineShiftRightLogical(SDNode *N, SelectionDAG &DAG,
38413 static SDValue combineVectorPack(SDNode *N, SelectionDAG &DAG,
38513 static SDValue combineVectorShiftVar(SDNode *N, SelectionDAG &DAG,
38546 static SDValue combineVectorShiftImm(SDNode *N, SelectionDAG &DAG,
38624 static SDValue combineVectorInsert(SDNode *N, SelectionDAG &DAG,
38649 static SDValue combineCompareEqual(SDNode *N, SelectionDAG &DAG,
38674 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
38752 static SDValue combineANDXORWithAllOnesIntoANDNP(SDNode *N, SelectionDAG &DAG) {
38783 static SDValue PromoteMaskArithmetic(SDNode *N, SelectionDAG &DAG,
38849 static SDValue convertIntLogicToFPLogic(SDNode *N, SelectionDAG &DAG,
38885 static SDValue combineAndMaskToShift(SDNode *N, SelectionDAG &DAG,
38959 static SDValue combineAndLoadToBZHI(SDNode *Node, SelectionDAG &DAG,
39039 static SDValue combineParity(SDNode *N, SelectionDAG &DAG,
39110 static SDValue combineScalarAndWithMaskSetcc(SDNode *N, SelectionDAG &DAG,
39169 static SDValue combineAnd(SDNode *N, SelectionDAG &DAG,
39289 static SDValue canonicalizeBitSelect(SDNode *N, SelectionDAG &DAG,
39337 static bool matchLogicBlend(SDNode *N, SDValue &X, SDValue &Y, SDValue &Mask) {
39438 static SDValue combineLogicBlendIntoPBLENDV(SDNode *N, SelectionDAG &DAG,
39511 static SDValue combineOrCmpEqZeroToCtlzSrl(SDNode *N, SelectionDAG &DAG,
39537 SDNode *OR = N->getOperand(0).getNode();
39542 SmallVector<SDNode *, 2> ORNodes;
39590 static SDValue combineOr(SDNode *N, SelectionDAG &DAG,
39771 static SDValue foldXorTruncShiftIntoCmp(SDNode *N, SelectionDAG &DAG) {
39826 static SDValue foldVectorXorShiftIntoCmp(SDNode *N, SelectionDAG &DAG,
40202 static SDValue combineLoad(SDNode *N, SelectionDAG &DAG,
40402 static SDValue combineMaskedLoad(SDNode *N, SelectionDAG &DAG,
40450 static SDValue combineMaskedStore(SDNode *N, SelectionDAG &DAG,
40488 static SDValue combineStore(SDNode *N, SelectionDAG &DAG,
40913 static SDValue combineFaddFsub(SDNode *N, SelectionDAG &DAG,
40936 static SDValue combineTruncatedArithmetic(SDNode *N, SelectionDAG &DAG,
41031 static SDValue combineVectorTruncationWithPACKUS(SDNode *N, const SDLoc &DL,
41045 static SDValue combineVectorTruncationWithPACKSS(SDNode *N, const SDLoc &DL,
41061 static SDValue combineVectorTruncation(SDNode *N, SelectionDAG &DAG,
41108 static SDValue combineVectorSignBitsTruncation(SDNode *N, const SDLoc &DL,
41354 static SDValue combineTruncate(SDNode *N, SelectionDAG &DAG,
41395 static SDValue combineVTRUNC(SDNode *N, SelectionDAG &DAG) {
41417 static SDValue isFNEG(SelectionDAG &DAG, SDNode *N, unsigned Depth = 0) {
41541 static SDValue combineFneg(SDNode *N, SelectionDAG &DAG,
41686 static SDValue lowerX86FPLogicOp(SDNode *N, SelectionDAG &DAG,
41715 static SDValue foldXor1SetCC(SDNode *N, SelectionDAG &DAG) {
41730 static SDValue combineXor(SDNode *N, SelectionDAG &DAG,
41760 static SDValue combineBEXTR(SDNode *N, SelectionDAG &DAG,
41810 static SDValue combineFAndFNotToFAndn(SDNode *N, SelectionDAG &DAG,
41842 static SDValue combineFAnd(SDNode *N, SelectionDAG &DAG,
41859 static SDValue combineFAndn(SDNode *N, SelectionDAG &DAG,
41873 static SDValue combineFOr(SDNode *N, SelectionDAG &DAG,
41892 static SDValue combineFMinFMax(SDNode *N, SelectionDAG &DAG) {
41912 static SDValue combineFMinNumFMaxNum(SDNode *N, SelectionDAG &DAG,
41977 static SDValue combineX86INT_TO_FP(SDNode *N, SelectionDAG &DAG,
42019 static SDValue combineCVTP2I_CVTTP2I(SDNode *N, SelectionDAG &DAG,
42055 static SDValue combineAndnp(SDNode *N, SelectionDAG &DAG,
42083 static SDValue combineBT(SDNode *N, SelectionDAG &DAG,
42098 static SDValue combineSextInRegCmov(SDNode *N, SelectionDAG &DAG) {
42159 static SDValue combineSignExtendInReg(SDNode *N, SelectionDAG &DAG,
42201 static SDValue promoteExtBeforeAdd(SDNode *Ext, SelectionDAG &DAG,
42238 for (auto *User : Ext->uses()) {
42273 static SDValue combineToExtendCMOV(SDNode *Extend, SelectionDAG &DAG) {
42321 combineToExtendBoolVectorInReg(SDNode *N, SelectionDAG &DAG,
42409 static SDValue combineExtSetcc(SDNode *N, SelectionDAG &DAG,
42450 static SDValue combineSext(SDNode *N, SelectionDAG &DAG,
42490 static SDValue combineFMA(SDNode *N, SelectionDAG &DAG,
42552 static SDValue combineFMADDSUB(SDNode *N, SelectionDAG &DAG,
42574 static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
42649 static SDValue combineVectorSizedSetCCEquality(SDNode *SetCC, SelectionDAG &DAG,
42815 static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG,
42896 static SDValue combineMOVMSK(SDNode *N, SelectionDAG &DAG,
42943 static SDValue combineX86GatherScatter(SDNode *N, SelectionDAG &DAG,
42957 static SDValue combineGatherScatter(SDNode *N, SelectionDAG &DAG,
43069 static SDValue combineX86SetCC(SDNode *N, SelectionDAG &DAG,
43083 static SDValue combineBrCond(SDNode *N, SelectionDAG &DAG,
43101 static SDValue combineVectorCompareAndMaskUnaryOp(SDNode *N,
43149 static SDValue combineToFPTruncExtElt(SDNode *N, SelectionDAG &DAG) {
43181 static SDValue combineUIntToFP(SDNode *N, SelectionDAG &DAG,
43209 static SDValue combineSIntToFP(SDNode *N, SelectionDAG &DAG,
43294 for (SDNode::use_iterator UI = Flags->use_begin(), UE = Flags->use_end();
43296 SDNode *User = *UI;
43332 for (SDNode::use_iterator UI = Flags->use_begin(), UE = Flags->use_end();
43334 SDNode *User = *UI;
43355 static SDValue combineCMP(SDNode *N, SelectionDAG &DAG) {
43443 static SDValue combineX86AddSub(SDNode *N, SelectionDAG &DAG,
43464 if (SDNode *GenericAddSub = DAG.getNodeIfExists(GenericOpc, VTs, Ops)) {
43477 static SDValue combineSBB(SDNode *N, SelectionDAG &DAG) {
43499 static SDValue combineADC(SDNode *N, SelectionDAG &DAG,
43535 static SDValue combineAddOrSubToADCOrSBB(SDNode *N, SelectionDAG &DAG) {
43691 static SDValue combineLoopMAddPattern(SDNode *N, SelectionDAG &DAG,
43754 static SDValue combineLoopSADPattern(SDNode *N, SelectionDAG &DAG,
44059 static SDValue combineAdd(SDNode *N, SelectionDAG &DAG,
44118 static SDValue combineSubToSubus(SDNode *N, SelectionDAG &DAG,
44205 static SDValue combineSub(SDNode *N, SelectionDAG &DAG,
44250 static SDValue combineVectorCompare(SDNode *N, SelectionDAG &DAG,
44379 static SDValue combineConcatVectors(SDNode *N, SelectionDAG &DAG,
44400 static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG,
44526 static SDValue narrowExtractedVectorSelect(SDNode *Ext, SelectionDAG &DAG) {
44578 static SDValue combineExtractSubvector(SDNode *N, SelectionDAG &DAG,
44749 static SDValue combineScalarToVector(SDNode *N, SelectionDAG &DAG) {
44786 static SDValue combinePMULDQ(SDNode *N, SelectionDAG &DAG,
44838 static SDValue combineExtInVec(SDNode *N, SelectionDAG &DAG,
44877 static SDValue combineKSHIFT(SDNode *N, SelectionDAG &DAG,
44891 SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
45116 SDNode *User = *Op->use_begin();
45129 SDNode *User = *Op->use_begin();
lib/Target/X86/X86ISelLowering.h 768 void LowerOperationWrapper(SDNode *N,
775 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
778 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
871 bool shouldFoldConstantShiftPairToMask(const SDNode *N,
894 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override;
1106 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
1393 bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override;
1510 SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor, SelectionDAG &DAG,
1511 SmallVectorImpl<SDNode *> &Created) const override;
1529 static bool classof(const SDNode *N) {
1549 static bool classof(const SDNode *N) {
1562 static bool classof(const SDNode *N) {
1574 static bool classof(const SDNode *N) {
1587 static bool classof(const SDNode *N) {
1600 static bool classof(const SDNode *N) {
1620 static bool classof(const SDNode *N) {
1635 static bool classof(const SDNode *N) {
1649 static bool classof(const SDNode *N) {
lib/Target/X86/X86InstrInfo.cpp 5597 X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
5598 SmallVectorImpl<SDNode*> &NewNodes) const {
5633 SDNode *Load = nullptr;
5699 SDNode *NewNode= DAG.getMachineNode(Opc, dl, VTs, BeforeOps);
5716 SDNode *Store =
5746 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
5746 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
5944 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
5944 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
lib/Target/X86/X86InstrInfo.h 363 bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
364 SmallVectorImpl<SDNode *> &NewNodes) const override;
381 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
381 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
392 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
392 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
lib/Target/XCore/XCoreISelDAGToDAG.cpp 43 void Select(SDNode *N) override;
44 bool tryBRIND(SDNode *N);
52 inline bool immMskBitp(SDNode *inN) const {
131 void XCoreDAGToDAGISel::Select(SDNode *N) {
149 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
237 bool XCoreDAGToDAGISel::tryBRIND(SDNode *N) {
lib/Target/XCore/XCoreISelLowering.cpp 230 void XCoreTargetLowering::ReplaceNodeResults(SDNode *N,
632 TryExpandADDWithMul(SDNode *N, SelectionDAG &DAG) const
692 ExpandADDSUB(SDNode *N, SelectionDAG &DAG) const
738 SDNode *Node = Op.getNode();
1589 SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
lib/Target/XCore/XCoreISelLowering.h 113 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
199 SDValue TryExpandADDWithMul(SDNode *Op, SelectionDAG &DAG) const;
200 SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG) const;
202 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
usr/include/c++/7.4.0/bits/stl_iterator_base_types.h 123 typedef _Tp value_type;
usr/include/c++/7.4.0/type_traits 381 : public __is_pointer_helper<typename remove_cv<_Tp>::type>::type
1554 { typedef _Tp type; };
1558 { typedef _Tp type; };
1563 { typedef _Tp type; };
1574 remove_const<typename remove_volatile<_Tp>::type>::type type;
1983 { typedef _Up type; };