reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
9586 if (!FuncInfo->CanLowerReturn) { 9608 findArgumentCopyElisionCandidates(DL, FuncInfo, ArgCopyElisionCandidates); 9751 if (!FuncInfo->CanLowerReturn) { 9769 FuncInfo->DemoteRegister = SRetReg; 9793 tryToElideArgumentCopy(FuncInfo, Chains, ArgCopyElisionFrameIndexMap, 9809 FuncInfo->setArgumentFrameIndex(&Arg, FI->getIndex()); 9844 FuncInfo->setArgumentFrameIndex(&Arg, FI->getIndex()); 9863 FuncInfo->setArgumentFrameIndex(&Arg, FI->getIndex()); 9874 SwiftError->setCurrentVReg(FuncInfo->MBB, SwiftError->getFunctionArg(), 9886 FuncInfo->ValueMap[&Arg] = Reg; 9891 FuncInfo->InitializeRegForValue(&Arg);lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
314 SDB(new SelectionDAGBuilder(*CurDAG, *FuncInfo, *SwiftError, OL)), 329 delete FuncInfo; 452 FuncInfo->set(Fn, *MF, CurDAG); 461 FuncInfo->BPI = &getAnalysis<BranchProbabilityInfoWrapperPass>().getBPI(); 463 FuncInfo->BPI = nullptr; 474 FuncInfo->SplitCSR = false; 479 FuncInfo->SplitCSR = true; 491 FuncInfo->SplitCSR = false; 497 if (FuncInfo->SplitCSR) 514 for (DenseMap<unsigned, unsigned>::iterator I = FuncInfo->RegFixups.begin(), 515 E = FuncInfo->RegFixups.end(); 522 DenseMap<unsigned, unsigned>::iterator J = FuncInfo->RegFixups.find(To); 547 if (FuncInfo->SplitCSR) { 564 if (!FuncInfo->ArgDbgValues.empty()) 570 for (unsigned i = 0, e = FuncInfo->ArgDbgValues.size(); i != e; ++i) { 571 MachineInstr *MI = FuncInfo->ArgDbgValues[e-i-1]; 662 I = FuncInfo->RegFixups.begin(), E = FuncInfo->RegFixups.end(); 662 I = FuncInfo->RegFixups.begin(), E = FuncInfo->RegFixups.end(); 669 DenseMap<unsigned, unsigned>::iterator J = FuncInfo->RegFixups.find(To); 691 FuncInfo->clear(); 773 FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, Known); 784 getAnalysis<TargetTransformInfoWrapperPass>().getTTI(*FuncInfo->Fn); 793 FuncInfo->MBB->getBasicBlock()->getName()); 802 (MF->getName() + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str(); 805 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 825 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 847 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 871 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 884 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 895 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 910 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 935 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 955 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 974 << printMBBReference(*FuncInfo->MBB) << " '" << BlockName 986 Scheduler->Run(CurDAG, FuncInfo->MBB); 994 MachineBasicBlock *FirstMBB = FuncInfo->MBB, *LastMBB; 1001 LastMBB = FuncInfo->MBB = Scheduler->EmitSchedule(FuncInfo->InsertPt); 1001 LastMBB = FuncInfo->MBB = Scheduler->EmitSchedule(FuncInfo->InsertPt); 1096 << printMBBReference(*FuncInfo->MBB) << " '" 1097 << FuncInfo->MBB->getName() << "'\n"); 1227 MachineBasicBlock *MBB = FuncInfo->MBB; 1228 const Constant *PersonalityFn = FuncInfo->Fn->getPersonalityFn(); 1245 unsigned VReg = FuncInfo->getCatchPadExceptionPointerVReg(CPI, PtrRC); 1246 BuildMI(*MBB, FuncInfo->InsertPt, SDB->getCurDebugLoc(), 1259 BuildMI(*MBB, FuncInfo->InsertPt, SDB->getCurDebugLoc(), II) 1270 FuncInfo->ExceptionPointerVirtReg = MBB->addLiveIn(Reg, PtrRC); 1273 FuncInfo->ExceptionSelectorVirtReg = MBB->addLiveIn(Reg, PtrRC); 1342 FastIS = TLI->createFastISel(*FuncInfo, LibInfo); 1353 FuncInfo->MBB = FuncInfo->MBBMap[&Fn.getEntryBlock()]; 1353 FuncInfo->MBB = FuncInfo->MBBMap[&Fn.getEntryBlock()]; 1354 FuncInfo->InsertPt = FuncInfo->MBB->begin(); 1354 FuncInfo->InsertPt = FuncInfo->MBB->begin(); 1356 CurDAG->setFunctionLoweringInfo(FuncInfo); 1385 if (FuncInfo->InsertPt != FuncInfo->MBB->begin()) 1385 if (FuncInfo->InsertPt != FuncInfo->MBB->begin()) 1386 FastIS->setLastLocalValue(&*std::prev(FuncInfo->InsertPt)); 1394 FastIS->setLastLocalValue(&*std::prev(FuncInfo->InsertPt)); 1396 processDbgDeclares(FuncInfo); 1405 if (!FuncInfo->VisitedBBs.count(*PI)) { 1413 FuncInfo->ComputePHILiveOutRegInfo(&PN); 1416 FuncInfo->InvalidatePHILiveOutRegInfo(&PN); 1419 FuncInfo->VisitedBBs.insert(LLVMBB); 1427 FuncInfo->MBB = FuncInfo->MBBMap[LLVMBB]; 1427 FuncInfo->MBB = FuncInfo->MBBMap[LLVMBB]; 1428 if (!FuncInfo->MBB) 1432 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1432 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1435 FuncInfo->ExceptionPointerVirtReg = 0; 1436 FuncInfo->ExceptionSelectorVirtReg = 0; 1449 SwiftError->preassignVRegs(FuncInfo->MBB, Begin, End); 1456 if (isFoldedOrDeadInstruction(Inst, FuncInfo) || 1476 if (!isFoldedOrDeadInstruction(BeforeInst, FuncInfo)) 1516 unsigned &R = FuncInfo->ValueMap[Inst]; 1518 R = FuncInfo->CreateRegs(Inst); 1522 MachineBasicBlock::iterator SavedInsertPt = FuncInfo->InsertPt; 1528 FastIS->removeDeadCode(SavedInsertPt, FuncInfo->MBB->end()); 1573 SDB->SPDescriptor.initialize(LLVMBB, FuncInfo->MBBMap[LLVMBB], 1592 if (HadTailCall && FuncInfo->InsertPt != FuncInfo->MBB->end()) 1592 if (HadTailCall && FuncInfo->InsertPt != FuncInfo->MBB->end()) 1593 FastIS->removeDeadCode(FuncInfo->InsertPt, FuncInfo->MBB->end()); 1593 FastIS->removeDeadCode(FuncInfo->InsertPt, FuncInfo->MBB->end()); 1599 FuncInfo->PHINodesToUpdate.clear(); 1698 << FuncInfo->PHINodesToUpdate.size() << "\n"; 1699 for (unsigned i = 0, e = FuncInfo->PHINodesToUpdate.size(); i != e; 1701 << "Node " << i << " : (" << FuncInfo->PHINodesToUpdate[i].first 1702 << ", " << FuncInfo->PHINodesToUpdate[i].second << ")\n"); 1706 for (unsigned i = 0, e = FuncInfo->PHINodesToUpdate.size(); i != e; ++i) { 1707 MachineInstrBuilder PHI(*MF, FuncInfo->PHINodesToUpdate[i].first); 1710 if (!FuncInfo->MBB->isSuccessor(PHI->getParent())) 1712 PHI.addReg(FuncInfo->PHINodesToUpdate[i].second).addMBB(FuncInfo->MBB); 1712 PHI.addReg(FuncInfo->PHINodesToUpdate[i].second).addMBB(FuncInfo->MBB); 1722 FuncInfo->MBB = ParentMBB; 1723 FuncInfo->InsertPt = 1751 FuncInfo->MBB = ParentMBB; 1752 FuncInfo->InsertPt = ParentMBB->end(); 1761 FuncInfo->MBB = FailureMBB; 1762 FuncInfo->InsertPt = FailureMBB->end(); 1778 FuncInfo->MBB = BTB.Parent; 1779 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1779 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1781 SDB->visitBitTestHeader(BTB, FuncInfo->MBB); 1791 FuncInfo->MBB = BTB.Cases[j].ThisBB; 1792 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1792 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1817 FuncInfo->MBB); 1831 for (unsigned pi = 0, pe = FuncInfo->PHINodesToUpdate.size(); 1833 MachineInstrBuilder PHI(*MF, FuncInfo->PHINodesToUpdate[pi].first); 1840 PHI.addReg(FuncInfo->PHINodesToUpdate[pi].second).addMBB(BTB.Parent); 1842 PHI.addReg(FuncInfo->PHINodesToUpdate[pi].second) 1851 PHI.addReg(FuncInfo->PHINodesToUpdate[pi].second).addMBB(cBB); 1864 FuncInfo->MBB = SDB->SL->JTCases[i].first.HeaderBB; 1865 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1865 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1868 SDB->SL->JTCases[i].first, FuncInfo->MBB); 1875 FuncInfo->MBB = SDB->SL->JTCases[i].second.MBB; 1876 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1876 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1884 for (unsigned pi = 0, pe = FuncInfo->PHINodesToUpdate.size(); 1886 MachineInstrBuilder PHI(*MF, FuncInfo->PHINodesToUpdate[pi].first); 1892 PHI.addReg(FuncInfo->PHINodesToUpdate[pi].second) 1895 if (FuncInfo->MBB->isSuccessor(PHIBB)) 1896 PHI.addReg(FuncInfo->PHINodesToUpdate[pi].second).addMBB(FuncInfo->MBB); 1896 PHI.addReg(FuncInfo->PHINodesToUpdate[pi].second).addMBB(FuncInfo->MBB); 1905 FuncInfo->MBB = SDB->SL->SwitchCases[i].ThisBB; 1906 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1906 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1915 SDB->visitSwitchCase(SDB->SL->SwitchCases[i], FuncInfo->MBB); 1922 MachineBasicBlock *ThisBB = FuncInfo->MBB; 1929 FuncInfo->MBB = Succs[i]; 1930 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1930 FuncInfo->InsertPt = FuncInfo->MBB->end(); 1933 if (ThisBB->isSuccessor(FuncInfo->MBB)) { 1935 MBBI = FuncInfo->MBB->begin(), MBBE = FuncInfo->MBB->end(); 1935 MBBI = FuncInfo->MBB->begin(), MBBE = FuncInfo->MBB->end(); 1940 assert(pn != FuncInfo->PHINodesToUpdate.size() && 1942 if (FuncInfo->PHINodesToUpdate[pn].first == PHI) { 1943 PHI.addReg(FuncInfo->PHINodesToUpdate[pn].second).addMBB(ThisBB);lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
927 const BasicBlock *BB = FuncInfo->MBB->getBasicBlock();
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 1271 unsigned AR = FuncInfo->CreateReg(MVT::i32);
lib/Target/PowerPC/PPCISelDAGToDAG.cpp5005 PCC |= getBranchHint(PCC, FuncInfo, N->getOperand(3)); 5048 PCC |= getBranchHint(PCC, FuncInfo, N->getOperand(4));