reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/ScheduleDAGInstrs.h

  272     MachineBasicBlock::iterator begin() const { return RegionBegin; }

lib/CodeGen/MachineScheduler.cpp

  716   if (&*RegionBegin == MI)
  717     ++RegionBegin;
  727   if (RegionBegin == InsertPos)
  728     RegionBegin = MI;
  870   CurrentTop = nextIfDebug(RegionBegin, RegionEnd);
  889     BB->splice(RegionBegin, BB, FirstDbgValue);
  890     RegionBegin = FirstDbgValue;
  898     if (&*RegionBegin == DbgValue)
  899       ++RegionBegin;
  998   TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin,
 1043            BotRPTracker.getPos() == priorNonDebug(RegionEnd, RegionBegin))) &&
 1380     assert(TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker");

lib/CodeGen/PostRASchedulerList.cpp

  396       AntiDepBreak->BreakAntiDependencies(SUnits, RegionBegin, RegionEnd,
  672   RegionBegin = RegionEnd;
  689       RegionBegin = std::prev(RegionEnd);

lib/CodeGen/ScheduleDAGInstrs.cpp

  191   RegionBegin = begin;
  565   for (MachineInstr &MI : make_range(RegionBegin, RegionEnd)) {
  793   for (MachineBasicBlock::iterator MII = RegionEnd, MIE = RegionBegin;

lib/Target/AMDGPU/GCNIterativeScheduler.cpp

  202     assert(Sch.RegionBegin == Rgn.Begin && Sch.RegionEnd == Rgn.End);
  210     Rgn.Begin = Sch.RegionBegin;
  215     assert(Sch.RegionBegin == Rgn.Begin && Sch.RegionEnd == Rgn.End);
  314   LLVM_DEBUG(printLivenessInfo(dbgs(), RegionBegin, RegionEnd, LIS);
  315              if (!Regions.empty() && Regions.back()->Begin == RegionBegin) {
  374   assert(RegionBegin == R.Begin && RegionEnd == R.End);
  404   RegionBegin = getMachineInstr(Schedule.front());
  415   R.Begin = RegionBegin;

lib/Target/AMDGPU/GCNSchedStrategy.cpp

  326     Regions.push_back(std::make_pair(RegionBegin, RegionEnd));
  349   Regions[RegionIdx] = std::make_pair(RegionBegin, RegionEnd);
  397   RegionEnd = RegionBegin;
  428   RegionBegin = Unsched.front()->getIterator();
  429   Regions[RegionIdx] = std::make_pair(RegionBegin, RegionEnd);
  553       RegionBegin = Region.first;
  556       if (RegionBegin->getParent() != MBB) {
  558         MBB = RegionBegin->getParent();

lib/Target/AMDGPU/SIMachineScheduler.cpp

 2028   assert(TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker");

lib/Target/AMDGPU/SIMachineScheduler.h

  452     RPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin, false, false);