reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/MachinePipeliner.cpp
 1591     RecRPTracker.init(&MF, &RegClassInfo, &LIS, BB, BB->end(), false, true);
 1591     RecRPTracker.init(&MF, &RegClassInfo, &LIS, BB, BB->end(), false, true);
 2193       if (Def->getOperand(i + 1).getMBB() == BB) {
 2253   getPhiRegs(*Def, BB, InitVal, LoopVal);
lib/CodeGen/MachineScheduler.cpp
  720   BB->splice(InsertPos, BB, MI);
  720   BB->splice(InsertPos, BB, MI);
  889     BB->splice(RegionBegin, BB, FirstDbgValue);
  889     BB->splice(RegionBegin, BB, FirstDbgValue);
  900     BB->splice(++OrigPrevMI, BB, DbgValue);
  900     BB->splice(++OrigPrevMI, BB, DbgValue);
  998   TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin,
 1000   BotRPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd,
 1133         nextIfDebug(BotRPTracker.getPos(), BB->end());
 1134       if (I == BB->end())
 1135         VNI = LI.getVNInfoBefore(LIS->getMBBEndIdx(BB));
 1265   RPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd,
 1317   if (!BB->isSuccessor(BB))
 1317   if (!BB->isSuccessor(BB))
 1327     const VNInfo *DefVNI = LI.getVNInfoBefore(LIS->getMBBEndIdx(BB));
lib/CodeGen/PostRASchedulerList.cpp
  676     BB->splice(RegionEnd, BB, FirstDbgValue);
  676     BB->splice(RegionEnd, BB, FirstDbgValue);
  681       BB->splice(RegionEnd, BB, SU->getInstr());
  681       BB->splice(RegionEnd, BB, SU->getInstr());
  684       TII->insertNoop(*BB, RegionEnd);
  698     BB->splice(++OrigPrivMI, BB, DbgValue);
  698     BB->splice(++OrigPrivMI, BB, DbgValue);
lib/CodeGen/ScheduleDAGInstrs.cpp
  178   BB = bb;
  183   BB = nullptr;
  190   assert(bb == BB && "startBlock should set BB");
  201   MachineInstr *ExitMI = RegionEnd != BB->end() ? &*RegionEnd : nullptr;
  218     for (const MachineBasicBlock *Succ : BB->successors()) {
 1188   return "dag." + BB->getFullName();
lib/Target/AMDGPU/GCNSchedStrategy.cpp
  403       BB->remove(MI);
  404       BB->insert(RegionEnd, MI);
lib/Target/AMDGPU/SIMachineScheduler.h
  452     RPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin, false, false);
  455   MachineBasicBlock *getBB() { return BB; }
lib/Target/Hexagon/HexagonMachineScheduler.cpp
  193                     << printMBBReference(*BB) << " " << BB->getName()
  193                     << printMBBReference(*BB) << " " << BB->getName()
  194                     << " in_func " << BB->getParent()->getName()
  195                     << " at loop depth " << MLI->getLoopDepth(BB) << " \n");
lib/Target/Hexagon/HexagonMachineScheduler.h
  100   int getBBSize() { return BB->size(); }