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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/TargetFrameLowering.h 25 class RegScavenger;
include/llvm/CodeGen/TargetInstrInfo.h 57 class RegScavenger;
include/llvm/CodeGen/TargetRegisterInfo.h 40 class RegScavenger;
lib/Target/AArch64/AArch64RegisterInfo.h 22 class RegScavenger;
lib/Target/AMDGPU/SIInstrInfo.h 41 class RegScavenger;
References
include/llvm/CodeGen/RegisterScavenging.h 235 void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
include/llvm/CodeGen/TargetFrameLowering.h 301 RegScavenger *RS = nullptr) const;
309 RegScavenger *RS = nullptr) const {
include/llvm/CodeGen/TargetInstrInfo.h 549 RegScavenger *RS = nullptr) const {
lib/CodeGen/BranchRelaxation.cpp 83 std::unique_ptr<RegScavenger> RS;
551 RS.reset(new RegScavenger());
lib/CodeGen/PrologEpilogInserter.cpp 99 RegScavenger *RS;
220 RS = TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr;
lib/CodeGen/RegisterScavenging.cpp 459 RegScavenger::ScavengedInfo &
623 static Register scavengeVReg(MachineRegisterInfo &MRI, RegScavenger &RS,
678 RegScavenger &RS,
751 void llvm::scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS) {
797 RegScavenger RS;
lib/CodeGen/ShrinkWrap.cpp 162 bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS) const;
164 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
184 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
260 RegScavenger *RS) const {
327 RegScavenger *RS) {
484 std::unique_ptr<RegScavenger> RS(
485 TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
lib/Target/AArch64/AArch64FrameLowering.cpp 2175 RegScavenger *RS) const {
2342 MachineFunction &MF, RegScavenger *RS) const {
lib/Target/AArch64/AArch64FrameLowering.h 67 RegScavenger *RS) const override;
77 RegScavenger *RS) const override;
lib/Target/AArch64/AArch64SpeculationHardening.cpp 288 RegScavenger RS;
lib/Target/AMDGPU/SIFrameLowering.cpp 953 RegScavenger *RS) const {
987 RegScavenger *RS) const {
1062 RegScavenger *RS) const {
lib/Target/AMDGPU/SIFrameLowering.h 38 RegScavenger *RS = nullptr) const override;
40 RegScavenger *RS = nullptr) const;
50 RegScavenger *RS = nullptr) const override;
lib/Target/AMDGPU/SIInstrInfo.cpp 644 RegScavenger RS;
1229 MachineBasicBlock &MBB, MachineInstr &MI, RegScavenger *RS, unsigned TmpReg,
1771 RegScavenger *RS) const {
lib/Target/AMDGPU/SIInstrInfo.h 199 RegScavenger *RS, unsigned TmpReg,
268 RegScavenger *RS = nullptr) const override;
lib/Target/ARC/ARCFrameLowering.cpp 91 RegScavenger *RS) const {
436 MachineFunction &MF, RegScavenger *RS) const {
lib/Target/ARC/ARCFrameLowering.h 41 RegScavenger *RS) const override;
55 RegScavenger *RS) const override;
lib/Target/ARM/ARMFrameLowering.cpp 1635 RegScavenger *RS) const {
lib/Target/ARM/ARMFrameLowering.h 59 RegScavenger *RS) const override;
lib/Target/AVR/AVRExpandPseudoInsts.cpp 865 RegScavenger RS;
lib/Target/AVR/AVRFrameLowering.h 37 RegScavenger *RS = nullptr) const override;
lib/Target/AVR/AVRInstrInfo.h 114 RegScavenger *RS) const override;
lib/Target/BPF/BPFFrameLowering.h 31 RegScavenger *RS) const override;
lib/Target/Hexagon/HexagonFrameLowering.cpp 1354 MachineFunction &MF, RegScavenger *RS) const {
1931 RegScavenger *RS) const {
lib/Target/Hexagon/HexagonFrameLowering.h 72 RegScavenger *RS = nullptr) const override;
74 RegScavenger *RS) const override;
lib/Target/Lanai/LanaiFrameLowering.h 50 RegScavenger *RS = nullptr) const override;
lib/Target/Mips/Mips16InstrInfo.cpp 341 RegScavenger rs;
lib/Target/Mips/MipsSEFrameLowering.cpp 863 RegScavenger *RS) const {
lib/Target/Mips/MipsSEFrameLowering.h 41 RegScavenger *RS) const override;
lib/Target/PowerPC/PPCFrameLowering.cpp 618 RegScavenger RS;
1766 RegScavenger *RS) const {
1839 RegScavenger *RS) const {
2089 RegScavenger *RS) const {
lib/Target/PowerPC/PPCFrameLowering.h 109 RegScavenger *RS = nullptr) const override;
111 RegScavenger *RS = nullptr) const override;
112 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const;
lib/Target/RISCV/RISCVFrameLowering.cpp 373 RegScavenger *RS) const {
414 MachineFunction &MF, RegScavenger *RS) const {
lib/Target/RISCV/RISCVFrameLowering.h 36 RegScavenger *RS) const override;
39 RegScavenger *RS) const override;
lib/Target/RISCV/RISCVInstrInfo.cpp 376 RegScavenger *RS) const {
lib/Target/RISCV/RISCVInstrInfo.h 71 RegScavenger *RS = nullptr) const override;
lib/Target/SystemZ/SystemZFrameLowering.cpp 66 RegScavenger *RS) const {
285 RegScavenger *RS) const {
lib/Target/SystemZ/SystemZFrameLowering.h 30 RegScavenger *RS) const override;
41 RegScavenger *RS) const override;
lib/Target/XCore/XCoreFrameLowering.cpp 536 RegScavenger *RS) const {
574 RegScavenger *RS) const {
lib/Target/XCore/XCoreFrameLowering.h 50 RegScavenger *RS = nullptr) const override;
53 RegScavenger *RS = nullptr) const override;
usr/include/c++/7.4.0/bits/unique_ptr.h 68 default_delete(const default_delete<_Up>&) noexcept { }
72 operator()(_Tp* __ptr) const
74 static_assert(!is_void<_Tp>::value,
76 static_assert(sizeof(_Tp)>0,
122 using type = _Up*;
137 using pointer = typename _Ptr<_Tp, _Dp>::type;
161 typename __uniq_ptr_impl<_Tp, _Up>::_DeleterConstraint::type;
163 __uniq_ptr_impl<_Tp, _Dp> _M_t;
166 using pointer = typename __uniq_ptr_impl<_Tp, _Dp>::pointer;
167 using element_type = _Tp;
usr/include/c++/7.4.0/type_traits 215 : public __is_void_helper<typename remove_cv<_Tp>::type>::type
581 : public __or_<is_lvalue_reference<_Tp>,
582 is_rvalue_reference<_Tp>>::type
601 : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
601 : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
602 is_void<_Tp>>>::type
638 : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
638 : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
1554 { typedef _Tp type; };
1563 { typedef _Tp type; };
1574 remove_const<typename remove_volatile<_Tp>::type>::type type;
1645 { typedef _Tp& type; };
1650 : public __add_lvalue_reference_helper<_Tp>