reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/MachineRegisterInfo.h

  916     return getTargetRegisterInfo()->isInAllocatableClass(PhysReg) &&
 1178     const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();

lib/CodeGen/DetectDeadLanes.cpp

  164   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
  582   TRI = MRI->getTargetRegisterInfo();

lib/CodeGen/ImplicitNullChecks.cpp

  298   TRI = MF.getRegInfo().getTargetRegisterInfo();

lib/CodeGen/LiveInterval.cpp

  974   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();

lib/CodeGen/LivePhysRegs.cpp

  250   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
  261   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
  282   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();

lib/CodeGen/LiveRangeCalc.cpp

   80   const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
  164   const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
  367       errs() << "Use of " << printReg(PhysReg, MRI->getTargetRegisterInfo())
  377       const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();

lib/CodeGen/LiveRangeEdit.cpp

  249   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
  369       const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();

lib/CodeGen/MIRPrinter.cpp

  669     const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();

lib/CodeGen/MachineRegisterInfo.cpp

   48   unsigned NumRegs = getTargetRegisterInfo()->getNumRegs();
   75       MRI.getTargetRegisterInfo()->getCommonSubClass(OldRC, RC);
  126       getTargetRegisterInfo()->getLargestLegalSuperClass(OldRC, *MF);
  138                                             getTargetRegisterInfo());
  224       errs() << printReg(Reg, getTargetRegisterInfo())
  233       errs() << printReg(Reg, getTargetRegisterInfo())
  239       errs() << printReg(Reg, getTargetRegisterInfo())
  245       errs() << printReg(Reg, getTargetRegisterInfo())
  259   for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i)
  383   const TargetRegisterInfo *TRI = getTargetRegisterInfo();
  514   ReservedRegs = getTargetRegisterInfo()->getReservedRegs(MF);
  515   assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() &&
  522   const TargetRegisterInfo *TRI = getTargetRegisterInfo();
  537   const TargetRegisterInfo *TRI = getTargetRegisterInfo();
  590   const TargetRegisterInfo *TRI = getTargetRegisterInfo();
  604   const TargetRegisterInfo *TRI = getTargetRegisterInfo();
  615   const TargetRegisterInfo *TRI = getTargetRegisterInfo();
  641   return getTargetRegisterInfo()->getCalleeSavedRegs(MF);
  658   const TargetRegisterInfo *TRI = getTargetRegisterInfo();

lib/CodeGen/ModuloSchedule.cpp

 1688                               *MRI.getTargetRegisterInfo());
 1754                                     *MRI.getTargetRegisterInfo());

lib/CodeGen/PeepholeOptimizer.cpp

 1965   const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();

lib/CodeGen/RegAllocPBQP.cpp

  880     const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();

lib/CodeGen/RegUsageInfoPropagate.cpp

   67                                           ->getRegInfo().getTargetRegisterInfo()

lib/CodeGen/RegisterPressure.cpp

  226   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
 1226   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();

lib/CodeGen/RegisterScavenging.cpp

  388   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
  625   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
  680   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();

lib/CodeGen/RenameIndependentSubregs.cpp

  175   const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
  213   const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();

lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp

  320   TRI = F.getRegInfo().getTargetRegisterInfo();

lib/Target/AArch64/AArch64InstructionSelector.cpp

  833   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
 3381   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
 3583   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

 2115         = static_cast<const SIRegisterInfo *>(MRI.getTargetRegisterInfo());
 2137         = static_cast<const SIRegisterInfo *>(MRI.getTargetRegisterInfo());

lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp

  266   const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
  917              << printReg(Register, MRI->getTargetRegisterInfo()) << " with "
  918              << printReg(NewRegister, MRI->getTargetRegisterInfo()) << "\n");
  926       LLVM_DEBUG(Current->print(dbgs(), MRI->getTargetRegisterInfo()));
  929       LLVM_DEBUG(Current->print(dbgs(), MRI->getTargetRegisterInfo()));
  954                           << printReg(NewRegister, MRI->getTargetRegisterInfo())
  959                           << printReg(Register, MRI->getTargetRegisterInfo())
  961                           << printReg(NewRegister, MRI->getTargetRegisterInfo())
 1018   const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
 1037                                 << printReg(Reg, MRI->getTargetRegisterInfo())
 1041                                 << printReg(Reg, MRI->getTargetRegisterInfo())
 1951                       << printReg(Reg, MRI->getTargetRegisterInfo())
 1955                       << printReg(Reg, MRI->getTargetRegisterInfo())
 2237                         << printReg(NewRegister, MRI->getTargetRegisterInfo())
 2245                         << printReg(Register, MRI->getTargetRegisterInfo())
 2247                         << printReg(NewRegister, MRI->getTargetRegisterInfo())

lib/Target/AMDGPU/AMDGPUMacroFusion.cpp

   46     const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();

lib/Target/AMDGPU/GCNRegPressure.cpp

   52           dbgs() << "  " << printReg(Reg, MRI.getTargetRegisterInfo())
   89   auto STI = static_cast<const SIRegisterInfo*>(MRI.getTargetRegisterInfo());
  207     MRI.getTargetRegisterInfo()->getSubRegIndexLaneMask(MO.getSubReg());
  216     return MRI.getTargetRegisterInfo()->getSubRegIndexLaneMask(SubReg);
  482     reportMismatch(LISLR, TrackedLR, MRI->getTargetRegisterInfo());
  499   const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();

lib/Target/AMDGPU/SIFrameLowering.cpp

   84   LiveRegs.init(*MRI.getTargetRegisterInfo());

lib/Target/AMDGPU/SIInstrInfo.cpp

 3670         VAddrWords = MRI.getTargetRegisterInfo()->getRegSizeInBits(*RC) / 32;
 3830       static_cast<const SIRegisterInfo*>(MRI.getTargetRegisterInfo());
 6457   auto *TRI = MRI.getTargetRegisterInfo();
 6489   auto *TRI = MRI.getTargetRegisterInfo();

lib/Target/AMDGPU/SIInstrInfo.h

 1039   auto *TRI = MRI.getTargetRegisterInfo();

lib/Target/AMDGPU/SIRegisterInfo.cpp

  561   auto *TRI = static_cast<const SIRegisterInfo*>(MRI.getTargetRegisterInfo());

lib/Target/ARM/ARMBaseInstrInfo.cpp

 2454   const TargetRegisterInfo *TRI = MF.getRegInfo().getTargetRegisterInfo();

lib/Target/ARM/ARMBaseRegisterInfo.cpp

  856               MRI.getTargetRegisterInfo()->getRegClassWeight(NewRC);
  858               MRI.getTargetRegisterInfo()->getRegClassWeight(SrcRC);
  860               MRI.getTargetRegisterInfo()->getRegClassWeight(DstRC);

lib/Target/Hexagon/HexagonBitSimplify.cpp

  409     Width = MRI.getTargetRegisterInfo()->getRegSizeInBits(*RC);
  418       Width = MRI.getTargetRegisterInfo()->getRegSizeInBits(*RC) / 2;
  438                   *MRI.getTargetRegisterInfo());
  902                   *MRI.getTargetRegisterInfo());

lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp

  173       MRI.getTargetRegisterInfo()->getPointerRegClass(MF);
  246         MRI.getTargetRegisterInfo()->getPointerRegClass(MF);

lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp

   65           : MRI.getTargetRegisterInfo()->getMinimalPhysRegClass(DestReg);

lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp

  119         MRI.getTargetRegisterInfo()->getPointerRegClass(MF);

lib/Target/X86/X86CallLowering.cpp

  136         MRI.getTargetRegisterInfo()->getRegSizeInBits(PhysReg, MRI);
  270           MRI.getTargetRegisterInfo()->getRegSizeInBits(PhysReg, MRI);

lib/Target/X86/X86DomainReassignment.cpp

  186         TII->getRegClass(TII->get(DstOpcode), 0, MRI->getTargetRegisterInfo(),
  248                                      MRI->getTargetRegisterInfo());
  359       dbgs() << printReg(Reg, MRI->getTargetRegisterInfo(), 0, MRI);
  445   RegDomain RD = getDomain(MRI->getRegClass(Reg), MRI->getTargetRegisterInfo());

lib/Target/X86/X86InstrInfo.cpp

  765   assert((Is8BitOp || RegInfo.getTargetRegisterInfo()->getRegSizeInBits(
 2871   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
 4636   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();