reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/MachinePipeliner.h
  548     return (stageScheduled(SU) == (int)StageNum);
lib/CodeGen/MachinePipeliner.cpp
  538       Stages[SU->getInstr()] = Schedule.stageScheduled(SU);
 2161     int DefStageNum = Schedule.stageScheduled(getSUnit(LoopDef));
 2163     int BaseStageNum = Schedule.stageScheduled(SU);
 2467   int StageInst1 = stageScheduled(SU);
 2486       if (MO.isDef() && Reads && stageScheduled(*I) <= StageInst1) {
 2490       } else if (MO.isDef() && Reads && stageScheduled(*I) > StageInst1) {
 2494       } else if (MO.isUse() && Writes && stageScheduled(*I) == StageInst1) {
 2503       } else if (MO.isUse() && Writes && stageScheduled(*I) > StageInst1) {
 2511       } else if (MO.isUse() && Writes && stageScheduled(*I) < StageInst1) {
 2516       } else if (MO.isUse() && stageScheduled(*I) == StageInst1 &&
 2529       if (S.getKind() == SDep::Order && stageScheduled(*I) == StageInst1) {
 2537       else if (S.getKind() == SDep::Anti && stageScheduled(*I) == StageInst1) {
 2546       if (P.getKind() == SDep::Order && stageScheduled(*I) == StageInst1) {
 2594   int DefStage = stageScheduled(DefSU);
 2605   int LoopStage = stageScheduled(UseSU);
 2647     int StageDef = stageScheduled(&SU);
 2652           if (stageScheduled(SI.getSUnit()) != StageDef)
 2876       os << "cycle " << cycle << " (" << stageScheduled(CI) << ") ";