reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/MachineSink.cpp

 1153         if (UI.killsRegister(SrcReg, TRI)) {

lib/CodeGen/TwoAddressInstructionPass.cpp

  449   return MI->killsRegister(Reg);
 1403                     if (NewMIs[0]->killsRegister(MO.getReg()))
 1406                       assert(NewMIs[1]->killsRegister(MO.getReg()) &&

lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

  965         if (MI.killsRegister(StRt, TRI)) {
 1039     if (MI.killsRegister(StRt, TRI)) {

lib/Target/AMDGPU/R600EmitClauseMarkers.cpp

  232         if (UseI != Def && UseI->killsRegister(MOI->getReg(), &TRI))

lib/Target/AMDGPU/SIInsertSkips.cpp

  408       MI.killsRegister(CondReg, TRI))

lib/Target/ARM/ARMConstantIslandPass.cpp

 1868     if (!Br.MI->killsRegister(ARM::CPSR))
 1963       if (KillMI->killsRegister(Reg, TRI)) {

lib/Target/ARM/ARMFrameLowering.cpp

 1326     assert(MI->killsRegister(ARM::R4) && "Missed kill flag");

lib/Target/ARM/ARMISelLowering.cpp

10499     if (!MI.killsRegister(ARM::CPSR) &&

lib/Target/ARM/ARMLoadStoreOptimizer.cpp

  559     if (MBBI->killsRegister(Base) || MBBI->definesRegister(Base))
  897   bool BaseKill = LatestMI->killsRegister(Base);

lib/Target/ARM/Thumb2SizeReduction.cpp

 1088       if (BundleMI->killsRegister(ARM::CPSR))

lib/Target/Hexagon/HexagonCopyToCombine.cpp

  291     if (I2.killsRegister(I2UseReg))
  368           (!MI.killsRegister(I1UseReg) && MI.killsRegister(I1UseReg, TRI)))
  368           (!MI.killsRegister(I1UseReg) && MI.killsRegister(I1UseReg, TRI)))
  372       if (I1UseReg && MI.killsRegister(I1UseReg)) {

lib/Target/Hexagon/HexagonNewValueJump.cpp

  675           bool MO1IsKill = cmpPos->killsRegister(cmpReg1, QRI);
  676           bool MO2IsKill = isSecondOpReg && cmpPos->killsRegister(cmpOp2, QRI);

lib/Target/PowerPC/PPCInstrInfo.cpp

 3527     else if (It->killsRegister(Reg, &getRegisterInfo()) && (&*It) != &DefMI)

lib/Target/PowerPC/PPCVSXFMAMutate.cpp

  168               J->killsRegister(AddendSrcReg, TRI)) {

lib/Target/SystemZ/SystemZISelLowering.cpp

 6668       (LastMI->killsRegister(SystemZ::CC) || checkCCKill(*LastMI, MBB));
 6769   if (!MI.killsRegister(SystemZ::CC) && !checkCCKill(MI, JoinMBB)) {

lib/Target/X86/X86CmovConversion.cpp

  565   if (MI->killsRegister(X86::EFLAGS))

lib/Target/X86/X86FloatingPoint.cpp

 1026             MI.killsRegister(Op.getReg())) && // Later use is marked kill.
 1121   bool KillsSrc = MI.killsRegister(X86::FP0 + Reg);
 1182   bool KillsSrc = MI.killsRegister(X86::FP0 + Reg);
 1292   bool KillsOp0 = MI.killsRegister(X86::FP0 + Op0);
 1293   bool KillsOp1 = MI.killsRegister(X86::FP0 + Op1);
 1387   bool KillsOp0 = MI.killsRegister(X86::FP0 + Op0);
 1388   bool KillsOp1 = MI.killsRegister(X86::FP0 + Op1);
 1413   bool KillsOp1 = MI.killsRegister(X86::FP0 + Op1);
 1456     bool KillsSrc = MI.killsRegister(MO1.getReg());

lib/Target/X86/X86ISelLowering.cpp

29811   if (!SecondCascadedCMOV.killsRegister(X86::EFLAGS) &&
29966   if (!LastCMOV->killsRegister(X86::EFLAGS) &&

lib/Target/X86/X86InstrInfo.cpp

 3776     if (ModifyEFLAGS || Instr.killsRegister(X86::EFLAGS, TRI)) {
 4571   if (MI.killsRegister(Reg, TRI))

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 1603     if (MI.killsRegister(X86::EFLAGS, &TRI))