reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
467 if (isInsertSubreg() && OpIdx == 3)
lib/CodeGen/PeepholeOptimizer.cpp240 (MI.isRegSequence() || MI.isInsertSubreg() || 906 assert(MI.isInsertSubreg() && "Invalid instruction"); 1923 assert((Def->isInsertSubreg() || Def->isInsertSubregLike()) && 2066 if (Def->isInsertSubreg() || Def->isInsertSubregLike())lib/CodeGen/ProcessImplicitDefs.cpp
64 !MI->isInsertSubreg() &&
lib/CodeGen/TargetInstrInfo.cpp1221 assert((MI.isInsertSubreg() || 1224 if (!MI.isInsertSubreg())lib/CodeGen/TwoAddressInstructionPass.cpp
415 } else if (MI.isInsertSubreg() || MI.isSubregToReg()) { 1762 if (mi->isInsertSubreg()) {lib/Target/ARM/A15SDOptimizer.cpp
247 if (MI->isInsertSubreg()) { 330 if (MI->isInsertSubreg() && usesRegClass(MI->getOperand(2), 398 if (MI->isCopyLike() || MI->isInsertSubreg() || MI->isRegSequence() ||lib/Target/ARM/ARMBaseInstrInfo.cpp
4270 if (ResolvedDefMI->isCopyLike() || ResolvedDefMI->isInsertSubreg() || 4607 if (MI.isCopyLike() || MI.isInsertSubreg() || MI.isRegSequence() || 4628 if (MI.isCopyLike() || MI.isInsertSubreg() || MI.isRegSequence() ||lib/Target/ARM/MLxExpansionPass.cpp
104 } else if (DefMI->isInsertSubreg()) { 126 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { 168 } else if (DefMI->isInsertSubreg()) {