|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/CodeGen/MachineCSE.cpp 780 for (auto def : MI->defs())
lib/CodeGen/MachineLoopUtils.cpp 50 for (MachineOperand &MO : NewMI->defs()) {
lib/CodeGen/ModuloSchedule.cpp 1339 for (MachineOperand &Def : MI->defs()) {
1742 for (MachineOperand &DefMO : MI->defs()) {
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp 609 for (auto &I : MI->defs())
674 for (auto &I : MI->defs())
lib/Target/AArch64/AArch64SpeculationHardening.cpp 484 bool AllDefsAreGPR = llvm::all_of(MI.defs(), [&](MachineOperand &Op) {
498 for (MachineOperand Op : MI.defs())
509 for (auto Def : MI.defs()) {
570 for (MachineOperand Op : MI.defs())
lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp 757 for (auto &RI : II.defs()) {
799 for (auto &RI : II.defs()) {
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 686 for (MachineOperand &Def : MI.defs()) {
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 751 for (const MachineOperand &Def : VALU->defs()) {
921 for (const MachineOperand &Def : MI->defs()) {
lib/Target/AMDGPU/SIFormMemoryClauses.cpp 369 for (MachineOperand &MO : BI->defs())
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 325 for (auto &DefMO : DefInstr->defs()) {
lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp 210 for (MachineOperand &DefOpnd : MI.defs()) {
lib/Target/AMDGPU/SIWholeQuadMode.cpp 389 for (const MachineOperand &MO : MI.defs()) {
lib/Target/NVPTX/NVPTXProxyRegErasure.cpp 97 auto &OutOp = *MI.defs().begin();
lib/Target/PowerPC/PPCBranchCoalescing.cpp 539 for (auto &Def : I->defs())
lib/Target/X86/X86CmovConversion.cpp 321 MRI->use_nodbg_instructions(I.defs().begin()->getReg()),
537 auto UIs = MRI->use_instructions(MI->defs().begin()->getReg());
lib/Target/X86/X86DomainReassignment.cpp 592 for (auto &DefOp : UseMI.defs()) {
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1678 for (MachineOperand &Def : MI.defs())
1761 for (MachineOperand &Def : MI.defs())