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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/CodeGen/LiveInterval.h 176 return start <= I && I < end;
182 return (start <= S && S < end) && (start < E && E <= end);
182 return (start <= S && S < end) && (start < E && E <= end);
186 return std::tie(start, end) < std::tie(Other.start, Other.end);
186 return std::tie(start, end) < std::tie(Other.start, Other.end);
189 return start == Other.start && end == Other.end;
189 return start == Other.start && end == Other.end;
254 segments.push_back(Segment(S.start, S.end, valnos[S.valno->id]));
266 while (I->end <= Pos) ++I;
274 while (I->end <= Pos) ++I;
385 return segments.back().end;
520 removeSegment(S.start, S.end, RemoveDeadValNo);
548 EndPoint = I->end;
550 if (SlotIndex::isSameInstr(Idx, I->end)) {
566 EndPoint = I->end;
580 S.end.getBaseIndex())
627 if (Seg->end <= *Idx) {
631 return V < S.end;
639 auto NotLessEnd = std::lower_bound(NotLessStart, EndIdx, Seg->end);
lib/CodeGen/InterferenceCache.cpp 244 SlotIndex StopI = I->end;
lib/CodeGen/LiveDebugVariables.cpp 733 if (Segment->end < Stop) {
734 Stop = Segment->end;
1056 if (LStop > LII->end)
1057 LocMapI.setStopUnchecked(LII->end);
1070 LocMapI.insert(LII->end, LStop, OldLoc);
1076 if (LII->end < LocMapI.stop()) {
lib/CodeGen/LiveInterval.cpp 128 if (I->end <= StartIdx)
130 if (I->end < Use)
144 if (I->end <= StartIdx)
146 if (I->end < Use) {
147 if (LR->isUndefIn(Undefs, I->end, BeforeUse))
165 for (; MergeTo != segments().end() && NewEnd >= MergeTo->end; ++MergeTo)
169 S->end = std::max(NewEnd, std::prev(MergeTo)->end);
169 S->end = std::max(NewEnd, std::prev(MergeTo)->end);
173 if (MergeTo != segments().end() && MergeTo->start <= I->end &&
175 S->end = MergeTo->end;
175 S->end = MergeTo->end;
205 if (MergeTo->end >= NewStart && MergeTo->valno == ValNo) {
206 segmentAt(MergeTo)->end = S->end;
206 segmentAt(MergeTo)->end = S->end;
212 MergeToSeg->end = S->end;
212 MergeToSeg->end = S->end;
220 SlotIndex Start = S.start, End = S.end;
228 if (B->start <= Start && B->end >= Start) {
235 assert(B->end <= Start &&
250 if (End > I->end)
331 if (Pos < (*PrevI).end)
360 if (Pos < I[Mid].end) {
437 if (i->end > j->start)
463 assert(J->end >= I->start);
465 if (J->start < I->end) {
474 if (J->end > I->end) {
474 if (J->end > I->end) {
482 while (J->end < I->start);
491 return I != begin() && (--I)->end > Start;
505 while (I->end < O.end) {
505 while (I->end < O.end) {
509 if (I == end() || Last->end != I->start)
560 assert(segments.empty() || segments.back().end <= S.start);
594 if (I->end == End) {
617 if (I->end == End) {
618 I->end = Start;
623 SlotIndex OldEnd = I->end;
624 I->end = Start; // Trim the old segment.
674 if (OutIt->valno == nextValNo && OutIt->end == I->start) {
675 OutIt->end = I->end;
675 OutIt->end = I->end;
682 OutIt->end = I->end;
682 OutIt->end = I->end;
728 Updater.add(S.start, S.end, LHSValNo);
742 Updater.add(S.start, S.end, LHSValNo);
772 if (Prev->valno == V2 && Prev->end == S->start) {
773 Prev->end = S->end;
773 Prev->end = S->end;
790 if (I->start == S->end && I->valno == V2) {
791 S->end = I->end;
791 S->end = I->end;
963 Sum += S.start.distance(S.end);
992 return OS << '[' << S.start << ',' << S.end << ':' << S.valno->id << ')';
1063 assert(I->end.isValid());
1064 assert(I->start < I->end);
1069 assert(I->end <= std::next(I)->start);
1070 if (I->end == std::next(I)->start)
1162 if (A.end == B.start)
1164 if (A.end < B.start)
1194 if (ReadI != E && ReadI->end <= Seg.start) {
1202 while (ReadI != E && ReadI->end <= Seg.start)
1206 assert(ReadI == E || ReadI->end > Seg.start);
1212 if (ReadI->end >= Seg.end)
1212 if (ReadI->end >= Seg.end)
1221 Seg.end = std::max(Seg.end, ReadI->end);
1221 Seg.end = std::max(Seg.end, ReadI->end);
1221 Seg.end = std::max(Seg.end, ReadI->end);
1228 Seg.end = std::max(Spills.back().end, Seg.end);
1228 Seg.end = std::max(Spills.back().end, Seg.end);
1228 Seg.end = std::max(Spills.back().end, Seg.end);
1234 WriteI[-1].end = std::max(WriteI[-1].end, Seg.end);
1234 WriteI[-1].end = std::max(WriteI[-1].end, Seg.end);
1234 WriteI[-1].end = std::max(WriteI[-1].end, Seg.end);
lib/CodeGen/LiveIntervalUnion.cpp 40 SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
50 SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg);
52 SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
145 while (LRI->start < LiveUnionI.stop() && LRI->end > LiveUnionI.start()) {
163 assert(LRI->end <= LiveUnionI.start() && "Expected non-overlap");
lib/CodeGen/LiveIntervals.cpp 514 if ((I == LI.begin() || std::prev(I)->end < Def) && !VNI->isPHIDef()) {
520 if (I->end != Def.getDeadSlot())
598 if (Segment->end != VNI->def.getDeadSlot())
706 RU.push_back(std::make_pair(&RURange, RURange.find(LI.begin()->end)));
712 SRs.push_back(std::make_pair(&SR, SR.find(LI.begin()->end)));
721 if (RI->end.isBlock())
723 MachineInstr *MI = getInstructionFromIndex(RI->end);
740 I = RURange.advanceTo(I, RI->end);
741 if (I == RURange.end() || I->start >= RI->end)
768 I = SR.advanceTo(I, RI->end);
769 if (I == SR.end() || I->start >= RI->end)
800 if (N != LI.end() && N->start == RI->end)
914 while (*SlotI < LiveI->end) {
1058 if (SlotIndex::isEarlierEqualInstr(NewIdx, OldIdxIn->end))
1063 if (MachineInstr *KillMI = LIS.getInstructionFromIndex(OldIdxIn->end))
1080 Prev->end = NewIdx.getRegSlot();
1083 OldIdxIn->end = Next->start;
1089 bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end);
1090 OldIdxIn->end = NewIdx.getRegSlot(OldIdxIn->end.isEarlyClobber());
1090 OldIdxIn->end = NewIdx.getRegSlot(OldIdxIn->end.isEarlyClobber());
1113 if (SlotIndex::isEarlierInstr(NewIdxDef, OldIdxOut->end)) {
1125 bool OldIdxDefIsDead = OldIdxOut->end.isDead();
1127 SlotIndex::isEarlierInstr(OldIdxOut->end, NewIdxDef)) {
1131 !SlotIndex::isEarlierInstr(std::prev(OldIdxOut)->end,
1137 IPrev->end = OldIdxOut->end;
1137 IPrev->end = OldIdxOut->end;
1147 INext->start = OldIdxOut->end;
1164 Prev->end = NewIdxDef;
1177 *NewSegment = LiveRange::Segment(NewIdxDef, Prev->end, Prev->valno);
1233 bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end);
1241 NewIdx.getRegSlot(OldIdxIn->end.isEarlyClobber()));
1242 OldIdxIn->end = findLastUseBefore(DefBeforeOldIdx, Reg, LaneMask);
1259 bool OldIdxDefIsDead = OldIdxOut->end.isDead();
1291 SlotIndex NewDefEndPoint = std::next(NewIdxIn)->end;
1294 SlotIndex::isEarlierInstr(NewIdx, Prev->end)) {
1307 *OldIdxOut = LiveRange::Segment(OldIdxIn->start, OldIdxOut->end,
1335 if (OldIdxIn != E && SlotIndex::isEarlierInstr(NewIdx, OldIdxIn->end))
1336 OldIdxIn->end = NewIdx.getRegSlot();
1340 && SlotIndex::isEarlierInstr(NewIdx, NewIdxOut->end)) {
1356 NewIdxDef.getRegSlot(), (NewIdxOut + 1)->end, OldIdxVNI);
1494 lastUseIdx = LII->end;
1506 bool isEndValid = getInstructionFromIndex(LII->end);
1524 if (LII->end.isDead()) {
1566 if (!isEndValid && !LII->end.isBlock())
1567 LII->end = instrIdx.getRegSlot();
lib/CodeGen/LiveRangeCalc.cpp 317 if (Seg.end > Begin) {
322 if (LR.isUndefIn(Undefs, Seg.end, End))
lib/CodeGen/MachineScheduler.cpp 1741 if (SlotIndex::isSameInstr(std::prev(GlobalSegment)->end,
lib/CodeGen/MachineVerifier.cpp 2492 LiveInts->getMBBFromIndex(S.end.getPrevSlot());
2501 if (S.end == LiveInts->getMBBEndIdx(EndMBB))
2506 S.start == VNI->def && S.end == VNI->def.getDeadSlot())
2511 LiveInts->getInstructionFromIndex(S.end.getPrevSlot());
2520 if (S.end.isBlock()) {
2526 if (S.end.isDead()) {
2529 if (!SlotIndex::isSameInstr(S.start, S.end)) {
2538 if (S.end.isEarlyClobber()) {
2539 if (I+1 == LR.end() || (I+1)->start != S.end) {
2577 if (S.end.isDead()) {
lib/CodeGen/RegAllocGreedy.cpp 2217 if (Uses[Gap+1].getBaseIndex() >= I->end)
lib/CodeGen/RegAllocPBQP.cpp 265 return std::get<0>(I)->segments[std::get<1>(I)].end;
lib/CodeGen/RegisterCoalescer.cpp 614 LIS->getInstructionFromIndex(ValS->end.getPrevSlot());
625 SlotIndex FillerStart = ValS->end, FillerEnd = BS->start;
645 if (SS != S.end() && SlotIndex::isSameInstr(SS->start, SS->end)) {
669 bool RecomputeLiveRange = AS->end == CopyIdx;
673 if (SS != S.end() && SS->end == CopyIdx) {
700 for (; BI != IntB.end() && ASeg.end >= BI->start; ++BI) {
703 if (BI->start <= ASeg.start && BI->end > ASeg.start)
705 if (BI->start > ASeg.start && BI->start < ASeg.end)
728 LiveRange::Segment Added = LiveRange::Segment(S.start, S.end, DstValNo);
730 if (Merged.end.isDead())
1550 if (VNInfo *V = DstLI.getVNInfoAt(Seg->end)) {
2796 SlotIndex End = OtherI->end;
3144 NewEnd = I->end;
3165 LE = LE.isValid() ? std::max(LE, I->end) : I->end;
3165 LE = LE.isValid() ? std::max(LE, I->end) : I->end;
3177 std::prev(S)->end = NewEnd;
lib/CodeGen/RegisterPressure.cpp 1260 return S != nullptr && S->end == Pos.getRegSlot();
1272 S->end != Pos.getDeadSlot();
lib/CodeGen/SplitKit.cpp 241 if (LVI->end < Stop)
264 while (LVI->end < Stop) {
265 SlotIndex LastStop = LVI->end;
302 if (LVI->end == Stop && ++LVI == LVE)
351 return I != Orig.begin() && (--I)->end == Idx;
1133 SlotIndex End = S.end;
1219 } while (Start != S.end);
1234 if (Seg->end != Def.getDeadSlot())
1413 if (S.end != S.valno->def.getDeadSlot())
lib/CodeGen/TwoAddressInstructionPass.cpp 262 KillMI = LIS->getInstructionFromIndex(I->end);
446 return !I->end.isBlock() && SlotIndex::isSameInstr(I->end, useIdx);
446 return !I->end.isBlock() && SlotIndex::isSameInstr(I->end, useIdx);
882 KillMI = LIS->getInstructionFromIndex(I->end);
1072 KillMI = LIS->getInstructionFromIndex(I->end);
1648 if (I->end == UseIdx)
lib/CodeGen/VirtRegMap.cpp 281 if (!Last.isValid() || SR.segments.back().end > Last)
282 Last = SR.segments.back().end;
296 while (SRI != SR->end() && SRI->end <= MBBBegin)
334 for (; I != Indexes->MBBIndexEnd() && I->first < Seg.end; ++I) {
lib/Target/AMDGPU/SIWholeQuadMode.cpp 604 SlotIndex Next = S->end.getNextIndex().getBaseIndex();
lib/Target/Hexagon/HexagonExpandCondsets.cpp 335 if (!I->end.isRegister())
348 LiveRange::iterator F = S.find(I->end);
349 return F != S.end() && I->end == F->end;
349 return F != S.end() && I->end == F->end;
355 KillAt(I->end, S.LaneMask);
361 KillAt(I->end, MRI->getMaxLaneMaskForVReg(Reg));
475 if (P.second && Seg.end.isDead()) {
1115 if (!LR.end.isRegister() && !LR.end.isDead())
1115 if (!LR.end.isRegister() && !LR.end.isDead())
1172 L1.addSegment(LiveRange::Segment(I->start, I->end, NewVN));
lib/Target/Hexagon/HexagonRegisterInfo.cpp 256 for (SlotIndex I = S.start.getBaseIndex(), E = S.end.getBaseIndex();
lib/Target/PowerPC/PPCVSXFMAMutate.cpp 309 NewFMAInt.addSegment(LiveInterval::Segment(AI->start, AI->end,