reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1522   case ISD::SMULO:
 4180   bool IsSigned = (ISD::SMULO == N->getOpcode());

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 3402   case ISD::SMULO: {

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  143   case ISD::SMULO:
 1044   if (N->getOpcode() == ISD::SMULO) {
 1784   case ISD::SMULO: ExpandIntRes_XMULO(N, Lo, Hi); break;
 2890       unsigned MulOp = Signed ? ISD::SMULO : ISD::UMULO;

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  445   case ISD::SMULO:
  824   case ISD::SMULO:

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  183   case ISD::SMULO:
  998   case ISD::SMULO:
 2809   case ISD::SMULO:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 2774   case ISD::SMULO:
 3640   case ISD::SMULO:
 9184           Opcode == ISD::UMULO || Opcode == ISD::SMULO) &&

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 6528     case Intrinsic::smul_with_overflow: Op = ISD::SMULO; break;

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  292   case ISD::SMULO:                      return "smulo";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 6987     } else if (Signed && isOperationLegalOrCustom(ISD::SMULO, VT)) {
 6989           DAG.getNode(ISD::SMULO, dl, DAG.getVTList(VT, BoolVT), LHS, RHS);
 7178   bool isSigned = Node->getOpcode() == ISD::SMULO;

lib/CodeGen/TargetLoweringBase.cpp

  663     setOperationAction(ISD::SMULO, VT, Expand);

lib/Target/AArch64/AArch64ISelLowering.cpp

  344   setOperationAction(ISD::SMULO, MVT::i32, Custom);
  345   setOperationAction(ISD::SMULO, MVT::i64, Custom);
 2130   case ISD::SMULO:
 2133     bool IsSigned = Op.getOpcode() == ISD::SMULO;
 2229            Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO));
 3005   case ISD::SMULO:

lib/Target/ARM/ARMISelLowering.cpp

 4410   case ISD::SMULO:
 5181   bool OptimizeMul = (Opc == ISD::SMULO || Opc == ISD::UMULO) &&
 5232   bool OptimizeMul = (Opc == ISD::SMULO || Opc == ISD::UMULO) &&

lib/Target/PowerPC/PPCTargetTransformInfo.cpp

  343           case Intrinsic::smul_with_overflow: Opcode = ISD::SMULO;      break;

lib/Target/Sparc/SparcISelLowering.cpp

 1675     setOperationAction(ISD::SMULO,     MVT::i64, Custom);
 2936   assert((opcode == ISD::UMULO || opcode == ISD::SMULO) && "Invalid Opcode.");
 2938   bool isSigned = (opcode == ISD::SMULO);
 3057   case ISD::SMULO:              return LowerUMULO_SMULO(Op, DAG, *this);

lib/Target/X86/X86ISelLowering.cpp

 1791     setOperationAction(ISD::SMULO, VT, Custom);
21141   case ISD::SMULO:
21429              CondOpcode == ISD::UMULO || CondOpcode == ISD::SMULO) {
21983          Cond.getOperand(0).getOpcode() == ISD::SMULO ||
22036       CondOpcode == ISD::UMULO || CondOpcode == ISD::SMULO) {
27758   case ISD::SMULO: