|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc50781 /*109371*/ OPC_CheckChild2CondCode, ISD::SETUGE,
51283 /*110740*/ OPC_CheckChild2CondCode, ISD::SETUGE,
51785 /*112109*/ OPC_CheckChild2CondCode, ISD::SETUGE,
51979 /*112600*/ OPC_CheckChild2CondCode, ISD::SETUGE,
52239 /*113223*/ OPC_CheckChild2CondCode, ISD::SETUGE,
52499 /*113846*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60389 /*132120*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60577 /*132464*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60840 /*132944*/ OPC_CheckChild2CondCode, ISD::SETUGE,
61086 /*133502*/ OPC_CheckChild2CondCode, ISD::SETUGE,
61543 /*134599*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62020 /*135736*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62268 /*136249*/ OPC_CheckChild2CondCode, ISD::SETUGE,
gen/lib/Target/AMDGPU/R600GenDAGISel.inc 5130 /* 20956*/ OPC_CheckCondCode, ISD::SETUGE,
gen/lib/Target/BPF/BPFGenDAGISel.inc 2042 return (N->getZExtValue() == ISD::SETUGE);
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc29701 /* 57314*/ OPC_CheckChild2CondCode, ISD::SETUGE,
29846 /* 57604*/ OPC_CheckChild2CondCode, ISD::SETUGE,
29921 /* 57758*/ OPC_CheckChild2CondCode, ISD::SETUGE,
30028 /* 57973*/ OPC_CheckChild2CondCode, ISD::SETUGE,
30136 /* 58189*/ OPC_CheckChild2CondCode, ISD::SETUGE,
30244 /* 58405*/ OPC_CheckChild2CondCode, ISD::SETUGE,
30358 /* 58635*/ OPC_CheckChild2CondCode, ISD::SETUGE,
30513 /* 58981*/ OPC_CheckChild2CondCode, ISD::SETUGE,
30941 /* 59780*/ OPC_CheckChild2CondCode, ISD::SETUGE,
51595 /* 97204*/ OPC_CheckChild2CondCode, ISD::SETUGE,
51751 /* 97483*/ OPC_CheckChild2CondCode, ISD::SETUGE,
68574 /*132805*/ OPC_CheckChild2CondCode, ISD::SETUGE,
68711 /*133052*/ OPC_CheckChild2CondCode, ISD::SETUGE,
68815 /*133239*/ OPC_CheckChild2CondCode, ISD::SETUGE,
68953 /*133487*/ OPC_CheckChild2CondCode, ISD::SETUGE,
69176 /*133886*/ OPC_CheckChild2CondCode, ISD::SETUGE,
69256 /*134030*/ OPC_CheckChild2CondCode, ISD::SETUGE,
69336 /*134174*/ OPC_CheckChild2CondCode, ISD::SETUGE,
gen/lib/Target/Mips/MipsGenDAGISel.inc 1992 /* 3529*/ OPC_CheckChild2CondCode, ISD::SETUGE,
2072 /* 3687*/ OPC_CheckChild2CondCode, ISD::SETUGE,
2151 /* 3841*/ OPC_CheckChild2CondCode, ISD::SETUGE,
2348 /* 4183*/ OPC_CheckChild2CondCode, ISD::SETUGE,
2416 /* 4319*/ OPC_CheckChild2CondCode, ISD::SETUGE,
2483 /* 4451*/ OPC_CheckChild2CondCode, ISD::SETUGE,
2759 /* 4933*/ OPC_CheckChild2CondCode, ISD::SETUGE,
2864 /* 5131*/ OPC_CheckChild2CondCode, ISD::SETUGE,
3291 /* 5910*/ OPC_CheckChild2CondCode, ISD::SETUGE,
3377 /* 6085*/ OPC_CheckChild2CondCode, ISD::SETUGE,
3463 /* 6260*/ OPC_CheckChild2CondCode, ISD::SETUGE,
3549 /* 6435*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4177 /* 7837*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4245 /* 7975*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4584 /* 8729*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4649 /* 8864*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4736 /* 9049*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4814 /* 9211*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4901 /* 9386*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4984 /* 9540*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5036 /* 9648*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5381 /* 10352*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5449 /* 10490*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5517 /* 10628*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5585 /* 10766*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5653 /* 10904*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5718 /* 11036*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5802 /* 11210*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5886 /* 11384*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5970 /* 11558*/ OPC_CheckChild2CondCode, ISD::SETUGE,
6054 /* 11732*/ OPC_CheckChild2CondCode, ISD::SETUGE,
6199 /* 12014*/ OPC_CheckChild2CondCode, ISD::SETUGE,
6267 /* 12152*/ OPC_CheckChild2CondCode, ISD::SETUGE,
6332 /* 12284*/ OPC_CheckChild2CondCode, ISD::SETUGE,
6416 /* 12458*/ OPC_CheckChild2CondCode, ISD::SETUGE,
16597 /* 30817*/ OPC_CheckChild2CondCode, ISD::SETUGE,
16619 /* 30869*/ OPC_CheckChild2CondCode, ISD::SETUGE,
16766 /* 31176*/ OPC_CheckChild2CondCode, ISD::SETUGE,
16832 /* 31332*/ OPC_CheckChild2CondCode, ISD::SETUGE,
16925 /* 31543*/ OPC_CheckChild2CondCode, ISD::SETUGE,
17010 /* 31727*/ OPC_CheckChild2CondCode, ISD::SETUGE,
17109 /* 31945*/ OPC_CheckChild2CondCode, ISD::SETUGE,
29432 /* 55706*/ OPC_CheckCondCode, ISD::SETUGE,
29635 /* 56369*/ OPC_CheckChild2CondCode, ISD::SETUGE,
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc60096 /*127294*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60110 /*127321*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60124 /*127348*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60138 /*127375*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60152 /*127402*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60166 /*127429*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60180 /*127456*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60194 /*127483*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60208 /*127510*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60222 /*127537*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60236 /*127564*/ OPC_CheckChild2CondCode, ISD::SETUGE,
60250 /*127591*/ OPC_CheckChild2CondCode, ISD::SETUGE,
61984 /*130990*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62008 /*131038*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62032 /*131086*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62046 /*131113*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62060 /*131140*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62084 /*131188*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62108 /*131236*/ OPC_CheckChild2CondCode, ISD::SETUGE,
62122 /*131263*/ OPC_CheckChild2CondCode, ISD::SETUGE,
64736 /*136638*/ OPC_CheckChild2CondCode, ISD::SETUGE,
64765 /*136702*/ OPC_CheckChild2CondCode, ISD::SETUGE,
64794 /*136766*/ OPC_CheckChild2CondCode, ISD::SETUGE,
64823 /*136830*/ OPC_CheckChild2CondCode, ISD::SETUGE,
66246 /*139972*/ OPC_CheckChild2CondCode, ISD::SETUGE,
66430 /*140375*/ OPC_CheckChild2CondCode, ISD::SETUGE,
66614 /*140778*/ OPC_CheckChild2CondCode, ISD::SETUGE,
67013 /*141658*/ OPC_CheckChild2CondCode, ISD::SETUGE,
67701 /*143133*/ OPC_CheckChild2CondCode, ISD::SETUGE,
68221 /*144256*/ OPC_CheckChild2CondCode, ISD::SETUGE,
gen/lib/Target/PowerPC/PPCGenDAGISel.inc 4248 /* 9335*/ OPC_CheckChild2CondCode, ISD::SETUGE,
4564 /* 10191*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5081 /* 11564*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5398 /* 12422*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5603 /* 12985*/ OPC_CheckChild2CondCode, ISD::SETUGE,
5897 /* 13790*/ OPC_CheckChild2CondCode, ISD::SETUGE,
6153 /* 14487*/ OPC_CheckChild2CondCode, ISD::SETUGE,
6447 /* 15292*/ OPC_CheckChild2CondCode, ISD::SETUGE,
6703 /* 15989*/ OPC_CheckChild2CondCode, ISD::SETUGE,
7903 /* 19101*/ OPC_CheckChild2CondCode, ISD::SETUGE,
8219 /* 19957*/ OPC_CheckChild2CondCode, ISD::SETUGE,
8736 /* 21330*/ OPC_CheckChild2CondCode, ISD::SETUGE,
9053 /* 22188*/ OPC_CheckChild2CondCode, ISD::SETUGE,
9258 /* 22751*/ OPC_CheckChild2CondCode, ISD::SETUGE,
9552 /* 23556*/ OPC_CheckChild2CondCode, ISD::SETUGE,
9808 /* 24253*/ OPC_CheckChild2CondCode, ISD::SETUGE,
10102 /* 25058*/ OPC_CheckChild2CondCode, ISD::SETUGE,
10358 /* 25755*/ OPC_CheckChild2CondCode, ISD::SETUGE,
10872 /* 27112*/ OPC_CheckChild2CondCode, ISD::SETUGE,
11188 /* 28100*/ OPC_CheckChild2CondCode, ISD::SETUGE,
11397 /* 28767*/ OPC_CheckChild2CondCode, ISD::SETUGE,
11714 /* 29757*/ OPC_CheckChild2CondCode, ISD::SETUGE,
11918 /* 30414*/ OPC_CheckChild2CondCode, ISD::SETUGE,
12212 /* 31352*/ OPC_CheckChild2CondCode, ISD::SETUGE,
12468 /* 32163*/ OPC_CheckChild2CondCode, ISD::SETUGE,
12762 /* 33101*/ OPC_CheckChild2CondCode, ISD::SETUGE,
13018 /* 33912*/ OPC_CheckChild2CondCode, ISD::SETUGE,
19280 /* 48719*/ OPC_CheckChild2CondCode, ISD::SETUGE,
19395 /* 49031*/ OPC_CheckChild2CondCode, ISD::SETUGE,
19647 /* 49669*/ OPC_CheckChild2CondCode, ISD::SETUGE,
19711 /* 49856*/ OPC_CheckChild2CondCode, ISD::SETUGE,
19775 /* 50043*/ OPC_CheckChild2CondCode, ISD::SETUGE,
19866 /* 50309*/ OPC_CheckChild2CondCode, ISD::SETUGE,
19948 /* 50544*/ OPC_CheckChild2CondCode, ISD::SETUGE,
20039 /* 50810*/ OPC_CheckChild2CondCode, ISD::SETUGE,
20121 /* 51045*/ OPC_CheckChild2CondCode, ISD::SETUGE,
25204 /* 60679*/ OPC_CheckChild2CondCode, ISD::SETUGE,
25425 /* 61274*/ OPC_CheckChild2CondCode, ISD::SETUGE,
25614 /* 61763*/ OPC_CheckChild2CondCode, ISD::SETUGE,
25819 /* 62317*/ OPC_CheckChild2CondCode, ISD::SETUGE,
25945 /* 62646*/ OPC_CheckChild2CondCode, ISD::SETUGE,
26104 /* 63011*/ OPC_CheckChild2CondCode, ISD::SETUGE,
26223 /* 63368*/ OPC_CheckChild2CondCode, ISD::SETUGE,
26460 /* 63995*/ OPC_CheckChild2CondCode, ISD::SETUGE,
26579 /* 64352*/ OPC_CheckChild2CondCode, ISD::SETUGE,
26756 /* 64835*/ OPC_CheckChild2CondCode, ISD::SETUGE,
27001 /* 65490*/ OPC_CheckChild2CondCode, ISD::SETUGE,
27211 /* 66019*/ OPC_CheckChild2CondCode, ISD::SETUGE,
28801 /* 69186*/ OPC_CheckCondCode, ISD::SETUGE,
28925 /* 69508*/ OPC_CheckCondCode, ISD::SETUGE,
29025 /* 69738*/ OPC_CheckCondCode, ISD::SETUGE,
29131 /* 69980*/ OPC_CheckCondCode, ISD::SETUGE,
29241 /* 70230*/ OPC_CheckCondCode, ISD::SETUGE,
29351 /* 70480*/ OPC_CheckCondCode, ISD::SETUGE,
29461 /* 70730*/ OPC_CheckCondCode, ISD::SETUGE,
29571 /* 70980*/ OPC_CheckCondCode, ISD::SETUGE,
29681 /* 71230*/ OPC_CheckCondCode, ISD::SETUGE,
29785 /* 71468*/ OPC_CheckCondCode, ISD::SETUGE,
29891 /* 71710*/ OPC_CheckCondCode, ISD::SETUGE,
29995 /* 71948*/ OPC_CheckCondCode, ISD::SETUGE,
30101 /* 72190*/ OPC_CheckCondCode, ISD::SETUGE,
30211 /* 72440*/ OPC_CheckCondCode, ISD::SETUGE,
30321 /* 72690*/ OPC_CheckCondCode, ISD::SETUGE,
gen/lib/Target/RISCV/RISCVGenDAGISel.inc 6906 /* 12770*/ OPC_CheckChild2CondCode, ISD::SETUGE,
7115 /* 13222*/ OPC_CheckChild2CondCode, ISD::SETUGE,
7782 /* 14597*/ OPC_CheckChild2CondCode, ISD::SETUGE,
7956 /* 14880*/ OPC_CheckChild2CondCode, ISD::SETUGE,
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc 7645 /* 14178*/ OPC_CheckChild2CondCode, ISD::SETUGE,
7718 /* 14310*/ OPC_CheckChild2CondCode, ISD::SETUGE,
7945 /* 14726*/ OPC_CheckChild2CondCode, ISD::SETUGE,
8019 /* 14864*/ OPC_CheckChild2CondCode, ISD::SETUGE,
8094 /* 15005*/ OPC_CheckChild2CondCode, ISD::SETUGE,
gen/lib/Target/XCore/XCoreGenDAGISel.inc 1460 /* 2441*/ OPC_CheckChild2CondCode, ISD::SETUGE,
1614 /* 2747*/ OPC_CheckChild2CondCode, ISD::SETUGE,
1828 /* 3193*/ OPC_CheckChild2CondCode, ISD::SETUGE,
include/llvm/CodeGen/ISDOpcodes.h 1060 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
lib/CodeGen/Analysis.cpp 214 case FCmpInst::FCMP_UGE: return ISD::SETUGE;
230 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE;
245 case ICmpInst::ICMP_UGE: return ISD::SETUGE;
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 4492 return DAG.getSetCC(DL, VT, Add, Two, ISD::SETUGE);
8163 case ISD::SETUGE: {
12300 case ISD::SETUGE:
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1689 case ISD::SETUGE:
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 1274 case ISD::SETUGE:
3693 case ISD::SETUGE: LowCC = ISD::SETUGE; break;
3693 case ISD::SETUGE: LowCC = ISD::SETUGE; break;
3725 CCCode == ISD::SETUGE || CCCode == ISD::SETULE);
3759 case ISD::SETULE: CCCode = ISD::SETUGE; FlipOperands = true; break;
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 383 case ISD::SETUGE: return 2;
2026 case ISD::SETUGE: return getBoolConstant(C1.uge(C2), dl, VT, OpVT);
2091 case ISD::SETUGE: return getBoolConstant(R!=APFloat::cmpLessThan, dl, VT,
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 410 case ISD::SETUGE: return "setuge";
lib/CodeGen/SelectionDAG/TargetLowering.cpp 369 case ISD::SETUGE:
2882 } else if (Cond == ISD::CondCode::SETUGE) {
3303 case ISD::SETUGE:
3328 case ISD::SETUGE:
3500 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
3663 } else if (Cond == ISD::SETULT || Cond == ISD::SETUGE ||
3676 NewCond = (Cond == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
3743 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGE);
3912 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> ~Y | X
lib/Target/AArch64/AArch64ISelLowering.cpp 1446 case ISD::SETUGE:
1498 case ISD::SETUGE:
1570 case ISD::SETUGE:
1993 case ISD::SETUGE:
2019 CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 1308 case ISD::SETUGE:
1745 ISD::SETUGE);
1747 ISD::SETUGE);
1767 ISD::SETUGE);
1769 ISD::SETUGE);
1827 SDValue realBIT = DAG.getSelectCC(DL, REM, RHS, BIT, Zero, ISD::SETUGE);
1833 REM = DAG.getSelectCC(DL, REM, RHS, REM_sub, REM, ISD::SETUGE);
1906 ISD::SETUGE);
1912 ISD::SETUGE);
lib/Target/AMDGPU/R600ISelLowering.cpp 130 setCondCodeAction(ISD::SETUGE, MVT::f32, Expand);
lib/Target/AMDGPU/SIISelLowering.cpp 9802 (CC == ISD::SETEQ || CC == ISD::SETLE || CC == ISD::SETUGE)) ||
lib/Target/AMDGPU/SIInsertSkips.cpp 231 case ISD::SETUGE:
lib/Target/ARC/ARCISelLowering.cpp 47 case ISD::SETUGE:
lib/Target/ARM/ARMISelLowering.cpp 1807 case ISD::SETUGE: return ARMCC::HS;
1832 case ISD::SETUGE: CondCode = ARMCC::PL; break;
4198 case ISD::SETUGE:
4214 CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
4614 if (CC == ISD::SETUGE || CC == ISD::SETOGE || CC == ISD::SETOLE ||
4637 if (CC == ISD::SETULE || CC == ISD::SETULT || CC == ISD::SETUGE ||
6230 case ISD::SETUGE: Swap = true; LLVM_FALLTHROUGH;
6277 case ISD::SETUGE: Opc = ARMCC::HS; break;
14135 (CC == ISD::SETUGE && Imm == 1);
lib/Target/AVR/AVRISelLowering.cpp 434 case ISD::SETUGE:
517 CC = ISD::SETUGE;
525 CC = ISD::SETUGE;
lib/Target/BPF/BPFISelLowering.cpp 690 SET_NEWCC(SETUGE, JUGE);
lib/Target/Hexagon/HexagonISelLowering.cpp 1511 setCondCodeAction(ISD::SETUGE, VT, Expand);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 120 setCondCodeAction(ISD::SETUGE, T, Expand);
lib/Target/Lanai/LanaiISelLowering.cpp 846 case ISD::SETUGE:
lib/Target/MSP430/MSP430ISelLowering.cpp 1053 case ISD::SETUGE:
lib/Target/Mips/MipsISelLowering.cpp 621 case ISD::SETUGE: return Mips::FCOND_UGE;
lib/Target/Mips/MipsSEISelLowering.cpp 264 setCondCodeAction(ISD::SETUGE, MVT::f32, Expand);
269 setCondCodeAction(ISD::SETUGE, MVT::f64, Expand);
365 setCondCodeAction(ISD::SETUGE, Ty, Expand);
401 setCondCodeAction(ISD::SETUGE, Ty, Expand);
962 case ISD::SETUGE: return !IsV216;
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 562 case ISD::SETUGE:
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 3019 case ISD::SETUGE:
3192 case ISD::SETUGE:
3351 case ISD::SETUGE:
3514 case ISD::SETUGE:
3786 case ISD::SETUGE:
3813 case ISD::SETUGE:
3853 case ISD::SETUGE:
3877 case ISD::SETUGE:
3910 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break;
3954 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break;
lib/Target/PowerPC/PPCISelLowering.cpp12007 case ISD::SETUGE:
15546 case ISD::SETUGE:
lib/Target/RISCV/RISCVISelLowering.cpp 145 ISD::SETUGE, ISD::SETULT, ISD::SETULE, ISD::SETUNE, ISD::SETGT,
363 case ISD::SETUGE:
lib/Target/Sparc/SparcISelLowering.cpp 1376 case ISD::SETUGE: return SPCC::ICC_CC;
1400 case ISD::SETUGE: return SPCC::FCC_UGE;
lib/Target/SystemZ/SystemZISelLowering.cpp 1946 CONV(GE);
2464 else if (Cond == ISD::SETGE || Cond == ISD::SETUGE)
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 89 ISD::SETULT, ISD::SETULE, ISD::SETUGT, ISD::SETUGE})
lib/Target/X86/X86ISelLowering.cpp 4678 case ISD::SETUGE: return X86::COND_AE;
4727 case ISD::SETUGE:
4751 case ISD::SETUGE: // flipped
20474 case ISD::SETUGE: SSECC = 5; break;
20614 case ISD::SETUGE:
20726 case ISD::SETUGE:
20810 Cond = ISD::SETUGE;
20827 case ISD::SETUGE: Opc = ISD::UMAX; break;
20850 Cond == ISD::SETGE || Cond == ISD::SETUGE;
36901 case ISD::SETUGE:
36937 case ISD::SETUGE:
37116 if ((CC == ISD::SETUGE || CC == ISD::SETUGT) &&
37184 if (CC == ISD::SETUGE) {
lib/Target/X86/X86InstrInfo.cpp 2321 case ISD::SETUGE: