reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc
50532 /*108690*/        OPC_CheckChild2CondCode, ISD::SETOGE,
50560 /*108766*/        OPC_CheckChild2CondCode, ISD::SETOGE,
51034 /*110059*/        OPC_CheckChild2CondCode, ISD::SETOGE,
51062 /*110135*/        OPC_CheckChild2CondCode, ISD::SETOGE,
51536 /*111428*/        OPC_CheckChild2CondCode, ISD::SETOGE,
51564 /*111504*/        OPC_CheckChild2CondCode, ISD::SETOGE,
61005 /*133304*/        OPC_CheckChild2CondCode, ISD::SETOGE,
61462 /*134401*/        OPC_CheckChild2CondCode, ISD::SETOGE,
61930 /*135520*/        OPC_CheckChild2CondCode, ISD::SETOGE,
gen/lib/Target/AMDGPU/R600GenDAGISel.inc
 4353 /* 17847*/            OPC_CheckCondCode, ISD::SETOGE,
 4580 /* 18714*/            OPC_CheckCondCode, ISD::SETOGE,
 4794 /* 19569*/          OPC_CheckCondCode, ISD::SETOGE,
 4938 /* 20193*/          OPC_CheckCondCode, ISD::SETOGE,
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc
30288 /* 58488*/          OPC_CheckChild2CondCode, ISD::SETOGE,
30443 /* 58834*/          OPC_CheckChild2CondCode, ISD::SETOGE,
51961 /* 97936*/          OPC_CheckChild2CondCode, ISD::SETOGE,
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc
61072 /*129190*/      OPC_CheckChild2CondCode, ISD::SETOGE,
61096 /*129238*/      OPC_CheckChild2CondCode, ISD::SETOGE,
61120 /*129286*/      OPC_CheckChild2CondCode, ISD::SETOGE,
61134 /*129313*/      OPC_CheckChild2CondCode, ISD::SETOGE,
61148 /*129340*/      OPC_CheckChild2CondCode, ISD::SETOGE,
61172 /*129388*/      OPC_CheckChild2CondCode, ISD::SETOGE,
61196 /*129436*/      OPC_CheckChild2CondCode, ISD::SETOGE,
61210 /*129463*/      OPC_CheckChild2CondCode, ISD::SETOGE,
64040 /*135102*/      OPC_CheckChild2CondCode, ISD::SETOGE,
64069 /*135166*/      OPC_CheckChild2CondCode, ISD::SETOGE,
64098 /*135230*/      OPC_CheckChild2CondCode, ISD::SETOGE,
64127 /*135294*/      OPC_CheckChild2CondCode, ISD::SETOGE,
66803 /*141208*/        OPC_CheckChild2CondCode, ISD::SETOGE,
67503 /*142707*/        OPC_CheckChild2CondCode, ISD::SETOGE,
68131 /*144058*/        OPC_CheckChild2CondCode, ISD::SETOGE,
gen/lib/Target/PowerPC/PPCGenDAGISel.inc
26929 /* 65292*/        OPC_CheckChild2CondCode, ISD::SETOGE,
27139 /* 65821*/        OPC_CheckChild2CondCode, ISD::SETOGE,
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc
 7759 /* 14384*/            OPC_CheckChild2CondCode, ISD::SETOGE,
 7835 /* 14523*/            OPC_CheckChild2CondCode, ISD::SETOGE,
 8140 /* 15090*/            OPC_CheckChild2CondCode, ISD::SETOGE,
 8223 /* 15243*/          OPC_CheckChild2CondCode, ISD::SETOGE,
lib/CodeGen/Analysis.cpp
  206   case FCmpInst::FCMP_OGE:   return ISD::SETOGE;
  230     case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE;
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 8159   case ISD::SETOGE:
12299       case ISD::SETOGE:
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 1682     case ISD::SETOGE:
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 1982   case ISD::SETOGE:
 2072     case ISD::SETOGE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  401     case ISD::SETOGE:                   return "setoge";
lib/CodeGen/SelectionDAG/TargetLowering.cpp
  300   case ISD::SETOGE:
 3739               isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType()))
 3740             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE);
 3742               isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType()))
lib/Target/AArch64/AArch64ISelLowering.cpp
 1472   case ISD::SETOGE:
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
 1316   case ISD::SETOGE:
 1605   SDValue cv = DAG.getSetCC(DL, SetCCVT, fr, fb, ISD::SETOGE);
 2183   SDValue Cmp = DAG.getSetCC(SL, SetCCVT, AbsDiff, Half, ISD::SETOGE);
lib/Target/AMDGPU/SIInsertSkips.cpp
  203     case ISD::SETOGE:
lib/Target/ARM/ARMISelLowering.cpp
 1824   case ISD::SETOGE: CondCode = ARMCC::GE; break;
 4614   if (CC == ISD::SETUGE || CC == ISD::SETOGE || CC == ISD::SETOLE ||
 6228     case ISD::SETOGE:
lib/Target/Lanai/LanaiISelLowering.cpp
  852   case ISD::SETOGE:
lib/Target/Mips/MipsISelLowering.cpp
  617   case ISD::SETOGE: return Mips::FCOND_OGE;
lib/Target/Mips/MipsSEISelLowering.cpp
  262     setCondCodeAction(ISD::SETOGE, MVT::f32, Expand);
  267     setCondCodeAction(ISD::SETOGE, MVT::f64, Expand);
  399     setCondCodeAction(ISD::SETOGE, Ty, Expand);
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
  546     case ISD::SETOGE:
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 3784         case ISD::SETOGE:
 3811         case ISD::SETOGE:
 3840   case ISD::SETOGE:
 3885   case ISD::SETOGE:
 3908       case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break;
 3919       case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break;
 3939       case ISD::SETOGE:
lib/Target/PowerPC/PPCISelLowering.cpp
  493   setCondCodeAction(ISD::SETOGE, MVT::f32, Expand);
  494   setCondCodeAction(ISD::SETOGE, MVT::f64, Expand);
  895         setCondCodeAction(ISD::SETOGE, MVT::f128, Expand);
 7285     case ISD::SETOGE:
 7323   case ISD::SETOGE:
lib/Target/RISCV/RISCVISelLowering.cpp
  144       ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT,
lib/Target/Sparc/SparcISelLowering.cpp
 1396   case ISD::SETOGE: return SPCC::FCC_GE;
lib/Target/SystemZ/SystemZISelLowering.cpp
 1946   CONV(GE);
 2611   case ISD::SETOGE:
lib/Target/X86/X86ISelLowering.cpp
 4746   case ISD::SETOGE:
20466   case ISD::SETOGE:
36880       case ISD::SETOGE:
36917       case ISD::SETOGE: