|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 1045 case ISD::INLINEASM_BR: {
1051 unsigned TgtOpc = Node->getOpcode() == ISD::INLINEASM_BR
lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp 87 case ISD::INLINEASM_BR: break;
124 case ISD::INLINEASM_BR: break;
450 case ISD::INLINEASM_BR:
553 case ISD::INLINEASM_BR:
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 483 Node->getOpcode() == ISD::INLINEASM_BR) {
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 717 case ISD::INLINEASM_BR:
1363 Node->getOpcode() == ISD::INLINEASM_BR) {
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 8404 unsigned ISDOpc = IsCallBr ? ISD::INLINEASM_BR : ISD::INLINEASM;
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 175 case ISD::INLINEASM_BR: return "inlineasm_br";
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 2225 SDValue New = CurDAG->getNode(Branch ? ISD::INLINEASM_BR : ISD::INLINEASM, DL, VTs, Ops);
2786 case ISD::INLINEASM_BR:
2788 NodeToMatch->getOpcode() == ISD::INLINEASM_BR);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 565 case ISD::INLINEASM_BR:
lib/Target/AMDGPU/SIISelLowering.cpp10819 N->getOpcode() == ISD::INLINEASM_BR)
lib/Target/ARM/ARMISelDAGToDAG.cpp 2974 case ISD::INLINEASM_BR:
lib/Target/Hexagon/HexagonISelLowering.cpp 582 Op.getOpcode() != ISD::INLINEASM_BR) || HMFI.hasClobberLR())
1300 setOperationAction(ISD::INLINEASM_BR, MVT::Other, Custom);
2827 if (Opc == ISD::INLINEASM || Opc == ISD::INLINEASM_BR)
lib/Target/Sparc/SparcISelDAGToDAG.cpp 332 case ISD::INLINEASM_BR: {