reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenDAGISel.inc

40696 /* 89173*/  /*SwitchOpcode*/ 67, TARGET_VAL(ISD::FP_TO_FP16),// ->89243

gen/lib/Target/X86/X86GenDAGISel.inc

58740 /*123820*/  /*SwitchOpcode*/ 93, TARGET_VAL(ISD::FP_TO_FP16),// ->123916
75208 /*158647*/      OPC_CheckOpcode, TARGET_VAL(ISD::FP_TO_FP16),

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1603   case ISD::FP_TO_FP16:         return visitFP_TO_FP16(N);

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 1005   case ISD::FP_TO_FP16:
 3143   case ISD::FP_TO_FP16:
 3149           TLI.isOperationLegalOrCustom(ISD::FP_TO_FP16, MVT::f32)) {
 3155             DAG.getNode(ISD::FP_TO_FP16, dl, Node->getValueType(0), FloatVal));
 4039   case ISD::FP_TO_FP16: {

lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

  559     return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op);
  702     return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
  842   case ISD::FP_TO_FP16:  // Same as FP_ROUND for softening purposes
  898   assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16);
  902   EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT;
 1888       return ISD::FP_TO_FP16;
 2039     case ISD::FP_TO_FP16:

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  122   case ISD::FP_TO_FP16:  Res = PromoteIntRes_FP_TO_FP16(N); break;
  304       return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, GetPromotedFloat(InOp));

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 4409     case ISD::FP_TO_FP16: {

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  335   case ISD::FP_TO_FP16:                 return "fp_to_fp16";

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

  302   setOperationAction(ISD::FP_TO_FP16, MVT::f64, Custom);
  303   setOperationAction(ISD::FP_TO_FP16, MVT::f32, Custom);
 1153   case ISD::FP_TO_FP16: return LowerFP_TO_FP16(Op, DAG);

lib/Target/AMDGPU/SIISelLowering.cpp

  471     setOperationAction(ISD::FP_TO_FP16, MVT::i16, Promote);
  472     AddPromotedToType(ISD::FP_TO_FP16, MVT::i16, MVT::i32);
 4578   SDValue FpToFp16 = DAG.getNode(ISD::FP_TO_FP16, DL, MVT::i32, Src);

lib/Target/ARM/ARMISelLowering.cpp

 1324       setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);
 1330       setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);

lib/Target/Mips/MipsISelLowering.cpp

  455   setOperationAction(ISD::FP_TO_FP16,        MVT::f32,   Expand);
  457   setOperationAction(ISD::FP_TO_FP16,        MVT::f64,   Expand);

lib/Target/RISCV/RISCVISelLowering.cpp

  150       ISD::FP_TO_FP16};

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  105     setOperationAction(ISD::FP_TO_FP16, T, Expand);

lib/Target/X86/X86ISelLowering.cpp

  375     setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
  382   setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);
  383   setOperationAction(ISD::FP_TO_FP16, MVT::f80, Expand);
  384   setOperationAction(ISD::FP_TO_FP16, MVT::f128, Expand);