reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc
70974 /*149642*/  /*SwitchOpcode*/ 12, TARGET_VAL(ISD::FCOS),// ->149657
gen/lib/Target/X86/X86GenDAGISel.inc
75484 /*159225*/  /*SwitchOpcode*/ 37, TARGET_VAL(ISD::FCOS),// ->159265
gen/lib/Target/X86/X86GenFastISel.inc
 5913   case ISD::FCOS: return fastEmit_ISD_FCOS_r(VT, RetVT, Op0, Op0IsKill);
include/llvm/CodeGen/BasicTTIImpl.h
 1215       ISDs.push_back(ISD::FCOS);
include/llvm/CodeGen/TargetLowering.h
  951       case ISD::STRICT_FCOS: EqOpc = ISD::FCOS; break;
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 2263     ? ISD::FCOS : ISD::FSIN;
 3114   case ISD::FCOS: {
 3123       if (Node->getOpcode() == ISD::FCOS)
 3845   case ISD::FCOS:
 4395   case ISD::FCOS:
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
   74     case ISD::FCOS:        R = SoftenFloatRes_FCOS(N); break;
 1147   case ISD::FCOS:       ExpandFloatRes_FCOS(N, Lo, Hi); break;
 2057     case ISD::FCOS:
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  414   case ISD::FCOS:
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
   82   case ISD::FCOS:
  894   case ISD::FCOS:
 2855   case ISD::FCOS:
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 4003   case ISD::FCOS: {
 7764   case ISD::STRICT_FCOS:       NewOpc = ISD::FCOS;       break;
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 6039     case Intrinsic::cos:       Opcode = ISD::FCOS;       break;
 7604         if (visitUnaryFloatCall(I, ISD::FCOS))
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  196   case ISD::FCOS:                       return "fcos";
lib/Target/AArch64/AArch64ISelLowering.cpp
  240   setOperationAction(ISD::FCOS, MVT::f128, Expand);
  351   setOperationAction(ISD::FCOS, MVT::f32, Expand);
  352   setOperationAction(ISD::FCOS, MVT::f64, Expand);
  371   setOperationAction(ISD::FCOS,    MVT::f16,   Promote);
  372   setOperationAction(ISD::FCOS,    MVT::v4f16, Expand);
  373   setOperationAction(ISD::FCOS,    MVT::v8f16, Expand);
  666     setOperationAction(ISD::FCOS, MVT::v1f64, Expand);
  829     setOperationAction(ISD::FCOS, VT, Expand);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  408     setOperationAction(ISD::FCOS, VT, Expand);
lib/Target/AMDGPU/R600ISelLowering.cpp
  140   setOperationAction(ISD::FCOS, MVT::f32, Custom);
  485   case ISD::FCOS:
  770   case ISD::FCOS:
lib/Target/AMDGPU/SIISelLowering.cpp
  428   setOperationAction(ISD::FCOS, MVT::f32, Custom);
  490     setOperationAction(ISD::FCOS, MVT::f16, Promote);
 4027   case ISD::FCOS:
 7963   case ISD::FCOS:
 8580   case ISD::FCOS:
 8774   case ISD::FCOS:
lib/Target/ARM/ARMISelLowering.cpp
  337       setOperationAction(ISD::FCOS, VT, Expand);
  782     setOperationAction(ISD::FCOS, MVT::v2f64, Expand);
  803     setOperationAction(ISD::FCOS, MVT::v4f32, Expand);
  819     setOperationAction(ISD::FCOS, MVT::v2f32, Expand);
  948     setOperationAction(ISD::FCOS,       MVT::f64, Expand);
 1300   setOperationAction(ISD::FCOS,      MVT::f32, Expand);
 1301   setOperationAction(ISD::FCOS,      MVT::f64, Expand);
 1375     setOperationAction(ISD::FCOS, MVT::f16, Promote);
lib/Target/Hexagon/HexagonISelLowering.cpp
 1383        {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS,
 1429     ISD::FCOS,    ISD::FPOW,    ISD::FLOG,    ISD::FLOG2,
lib/Target/Mips/MipsISelLowering.cpp
  438   setOperationAction(ISD::FCOS,              MVT::f32,   Expand);
  439   setOperationAction(ISD::FCOS,              MVT::f64,   Expand);
lib/Target/Mips/MipsSEISelLowering.cpp
  141     setOperationAction(ISD::FCOS, MVT::f16, Promote);
lib/Target/NVPTX/NVPTXISelLowering.cpp
  571   for (const auto &Op : {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS,
lib/Target/PowerPC/PPCISelLowering.cpp
  273   setOperationAction(ISD::FCOS , MVT::f64, Expand);
  278   setOperationAction(ISD::FCOS , MVT::f32, Expand);
  639       setOperationAction(ISD::FCOS, VT, Expand);
  914         setOperationAction(ISD::FCOS , MVT::f128, Expand);
  965     setOperationAction(ISD::FCOS , MVT::v4f64, Expand);
 1010     setOperationAction(ISD::FCOS , MVT::v4f32, Expand);
lib/Target/RISCV/RISCVISelLowering.cpp
  149       ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FP16_TO_FP,
lib/Target/Sparc/SparcISelLowering.cpp
 1617   setOperationAction(ISD::FCOS , MVT::f128, Expand);
 1622   setOperationAction(ISD::FCOS , MVT::f64, Expand);
 1627   setOperationAction(ISD::FCOS , MVT::f32, Expand);
lib/Target/SystemZ/SystemZISelLowering.cpp
  433       setOperationAction(ISD::FCOS, VT, Expand);
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
   93          {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA})
lib/Target/X86/X86ISelLowering.cpp
  545       setOperationAction(ISD::FCOS   , VT, Expand);
  576     setOperationAction(ISD::FCOS   , MVT::f32, Expand);
  582       setOperationAction(ISD::FCOS, MVT::f64, Expand);
  597       setOperationAction(ISD::FCOS   , VT, Expand);
  649     setOperationAction(ISD::FCOS   , MVT::f80, Expand);
  682     setOperationAction(ISD::FCOS,    MVT::f128, Expand);
  732     setOperationAction(ISD::FCOS,      VT, Expand);
 1831          {ISD::FCEIL, ISD::FCOS, ISD::FEXP, ISD::FFLOOR, ISD::FREM, ISD::FLOG,