reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

74393 /*164578*/  /*SwitchOpcode*/ 98|128,2/*354*/, TARGET_VAL(ISD::FCANONICALIZE),// ->164936

gen/lib/Target/PowerPC/PPCGenDAGISel.inc

37138 /* 94921*/      OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37143 /* 94929*/        OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37180 /* 95011*/      OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37191 /* 95030*/      OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37214 /* 95086*/        OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37261 /* 95206*/      OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37266 /* 95214*/        OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37303 /* 95296*/      OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37314 /* 95315*/      OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),
37337 /* 95371*/        OPC_CheckOpcode, TARGET_VAL(ISD::FCANONICALIZE),

include/llvm/CodeGen/BasicTTIImpl.h

 1236       ISDs.push_back(ISD::FCANONICALIZE);

lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

 2071     case ISD::FCANONICALIZE: R = PromoteFloatRes_UnaryOp(N); break;

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  447   case ISD::FCANONICALIZE:

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  104   case ISD::FCANONICALIZE:
  919   case ISD::FCANONICALIZE:
 2026     case ISD::FCANONICALIZE:
 2894   case ISD::FCANONICALIZE:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 4009   case ISD::FCANONICALIZE:

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 6046     case Intrinsic::canonicalize: Opcode = ISD::FCANONICALIZE; break;

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  261   case ISD::FCANONICALIZE:              return "fcanonicalize";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 6133         Quiet0 = DAG.getNode(ISD::FCANONICALIZE, dl, VT, Quiet0,
 6137         Quiet1 = DAG.getNode(ISD::FCANONICALIZE, dl, VT, Quiet1,

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

  432     setOperationAction(ISD::FCANONICALIZE, VT, Expand);
  529   case ISD::FCANONICALIZE:
 3778   case ISD::FCANONICALIZE:

lib/Target/AMDGPU/SIISelLowering.cpp

  616     setOperationAction(ISD::FCANONICALIZE, MVT::v2f16, Legal);
  645     setOperationAction(ISD::FCANONICALIZE, MVT::v4f16, Custom);
  721   setTargetDAGCombine(ISD::FCANONICALIZE);
 4060   case ISD::FCANONICALIZE:
 8571   case ISD::FCANONICALIZE:
 8716   if (Opcode == ISD::FCANONICALIZE)
 8945           NewElts[I] = DAG.getNode(ISD::FCANONICALIZE, SL, EltVT, Op);
 8978       SDValue Canon0 = DAG.getNode(ISD::FCANONICALIZE, SL, VT,
10007   case ISD::FCANONICALIZE: