reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
63 dbgs() << CurrentIdx << ": Rejected\n"); 66 CurrentIdx = OnFailResumeAt.pop_back_val(); 68 dbgs() << CurrentIdx << ": Resume at " << CurrentIdx << " (" 68 dbgs() << CurrentIdx << ": Resume at " << CurrentIdx << " (" 74 assert(CurrentIdx != ~0u && "Invalid MatchTable index"); 75 int64_t MatcherOpcode = MatchTable[CurrentIdx++]; 79 dbgs() << CurrentIdx << ": Begin try-block\n"); 80 OnFailResumeAt.push_back(MatchTable[CurrentIdx++]); 85 int64_t NewInsnID = MatchTable[CurrentIdx++]; 86 int64_t InsnID = MatchTable[CurrentIdx++]; 87 int64_t OpIdx = MatchTable[CurrentIdx++]; 96 dbgs() << CurrentIdx << ": Not a register\n"); 103 dbgs() << CurrentIdx << ": Is a physical register\n"); 118 dbgs() << CurrentIdx << ": MIs[" << NewInsnID 125 int64_t ExpectedBitsetID = MatchTable[CurrentIdx++]; 127 dbgs() << CurrentIdx 139 int64_t InsnID = MatchTable[CurrentIdx++]; 140 int64_t Expected = MatchTable[CurrentIdx++]; 146 dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID 157 int64_t InsnID = MatchTable[CurrentIdx++]; 158 int64_t LowerBound = MatchTable[CurrentIdx++]; 159 int64_t UpperBound = MatchTable[CurrentIdx++]; 160 int64_t Default = MatchTable[CurrentIdx++]; 166 dbgs() << CurrentIdx << ": GIM_SwitchOpcode(MIs[" << InsnID << "], [" 171 CurrentIdx = Default; 174 CurrentIdx = MatchTable[CurrentIdx + (Opcode - LowerBound)]; 174 CurrentIdx = MatchTable[CurrentIdx + (Opcode - LowerBound)]; 175 if (!CurrentIdx) { 176 CurrentIdx = Default; 184 int64_t InsnID = MatchTable[CurrentIdx++]; 185 int64_t OpIdx = MatchTable[CurrentIdx++]; 186 int64_t LowerBound = MatchTable[CurrentIdx++]; 187 int64_t UpperBound = MatchTable[CurrentIdx++]; 188 int64_t Default = MatchTable[CurrentIdx++]; 194 dbgs() << CurrentIdx << ": GIM_SwitchType(MIs[" << InsnID 204 CurrentIdx = Default; 210 CurrentIdx = Default; 215 CurrentIdx = Default; 218 CurrentIdx = MatchTable[CurrentIdx + (TypeID - LowerBound)]; 218 CurrentIdx = MatchTable[CurrentIdx + (TypeID - LowerBound)]; 219 if (!CurrentIdx) { 220 CurrentIdx = Default; 228 int64_t InsnID = MatchTable[CurrentIdx++]; 229 int64_t Expected = MatchTable[CurrentIdx++]; 231 dbgs() << CurrentIdx << ": GIM_CheckNumOperands(MIs[" 241 int64_t InsnID = MatchTable[CurrentIdx++]; 242 int64_t Predicate = MatchTable[CurrentIdx++]; 245 << CurrentIdx << ": GIM_CheckI64ImmPredicate(MIs[" 265 int64_t InsnID = MatchTable[CurrentIdx++]; 266 int64_t Predicate = MatchTable[CurrentIdx++]; 269 << CurrentIdx << ": GIM_CheckAPIntImmPredicate(MIs[" 287 int64_t InsnID = MatchTable[CurrentIdx++]; 288 int64_t Predicate = MatchTable[CurrentIdx++]; 291 << CurrentIdx << ": GIM_CheckAPFloatImmPredicate(MIs[" 306 int64_t InsnID = MatchTable[CurrentIdx++]; 307 int64_t Predicate = MatchTable[CurrentIdx++]; 310 << CurrentIdx << ": GIM_CheckCxxPredicate(MIs[" 321 int64_t InsnID = MatchTable[CurrentIdx++]; 322 AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++]; 324 dbgs() << CurrentIdx << ": GIM_CheckAtomicOrdering(MIs[" 338 int64_t InsnID = MatchTable[CurrentIdx++]; 339 AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++]; 341 dbgs() << CurrentIdx 356 int64_t InsnID = MatchTable[CurrentIdx++]; 357 AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++]; 359 dbgs() << CurrentIdx 374 int64_t InsnID = MatchTable[CurrentIdx++]; 375 int64_t MMOIdx = MatchTable[CurrentIdx++]; 377 const int NumAddrSpace = MatchTable[CurrentIdx++]; 387 const uint64_t LastIdx = CurrentIdx + NumAddrSpace; 395 unsigned AddrSpace = MatchTable[CurrentIdx++]; 407 CurrentIdx = LastIdx; 413 int64_t InsnID = MatchTable[CurrentIdx++]; 414 int64_t MMOIdx = MatchTable[CurrentIdx++]; 415 unsigned MinAlign = MatchTable[CurrentIdx++]; 428 dbgs() << CurrentIdx << ": GIM_CheckMemoryAlignment" 437 int64_t InsnID = MatchTable[CurrentIdx++]; 438 int64_t MMOIdx = MatchTable[CurrentIdx++]; 439 uint64_t Size = MatchTable[CurrentIdx++]; 442 dbgs() << CurrentIdx 468 int64_t InsnID = MatchTable[CurrentIdx++]; 469 int64_t MMOIdx = MatchTable[CurrentIdx++]; 470 int64_t OpIdx = MatchTable[CurrentIdx++]; 474 dbgs() << CurrentIdx << ": GIM_CheckMemorySize" 487 dbgs() << CurrentIdx << ": Not a register\n"); 518 int64_t InsnID = MatchTable[CurrentIdx++]; 519 int64_t OpIdx = MatchTable[CurrentIdx++]; 520 int64_t TypeID = MatchTable[CurrentIdx++]; 522 dbgs() << CurrentIdx << ": GIM_CheckType(MIs[" << InsnID 535 int64_t InsnID = MatchTable[CurrentIdx++]; 536 int64_t OpIdx = MatchTable[CurrentIdx++]; 537 int64_t SizeInBits = MatchTable[CurrentIdx++]; 540 dbgs() << CurrentIdx << ": GIM_CheckPointerToAny(MIs[" 566 int64_t InsnID = MatchTable[CurrentIdx++]; 567 int64_t OpIdx = MatchTable[CurrentIdx++]; 568 int64_t RCEnum = MatchTable[CurrentIdx++]; 570 dbgs() << CurrentIdx << ": GIM_CheckRegBankForClass(MIs[" 585 int64_t InsnID = MatchTable[CurrentIdx++]; 586 int64_t OpIdx = MatchTable[CurrentIdx++]; 587 int64_t RendererID = MatchTable[CurrentIdx++]; 588 int64_t ComplexPredicateID = MatchTable[CurrentIdx++]; 590 dbgs() << CurrentIdx << ": State.Renderers[" << RendererID 609 int64_t InsnID = MatchTable[CurrentIdx++]; 610 int64_t OpIdx = MatchTable[CurrentIdx++]; 611 int64_t Value = MatchTable[CurrentIdx++]; 613 dbgs() << CurrentIdx << ": GIM_CheckConstantInt(MIs[" 634 int64_t InsnID = MatchTable[CurrentIdx++]; 635 int64_t OpIdx = MatchTable[CurrentIdx++]; 636 int64_t Value = MatchTable[CurrentIdx++]; 638 dbgs() << CurrentIdx << ": GIM_CheckLiteralInt(MIs[" 651 int64_t InsnID = MatchTable[CurrentIdx++]; 652 int64_t OpIdx = MatchTable[CurrentIdx++]; 653 int64_t Value = MatchTable[CurrentIdx++]; 655 dbgs() << CurrentIdx << ": GIM_CheckIntrinsicID(MIs[" 666 int64_t InsnID = MatchTable[CurrentIdx++]; 667 int64_t OpIdx = MatchTable[CurrentIdx++]; 668 int64_t Value = MatchTable[CurrentIdx++]; 670 dbgs() << CurrentIdx << ": GIM_CheckCmpPredicate(MIs[" 681 int64_t InsnID = MatchTable[CurrentIdx++]; 682 int64_t OpIdx = MatchTable[CurrentIdx++]; 684 dbgs() << CurrentIdx << ": GIM_CheckIsMBB(MIs[" << InsnID 694 int64_t InsnID = MatchTable[CurrentIdx++]; 695 int64_t OpIdx = MatchTable[CurrentIdx++]; 697 dbgs() << CurrentIdx << ": GIM_CheckIsImm(MIs[" << InsnID 707 int64_t InsnID = MatchTable[CurrentIdx++]; 709 dbgs() << CurrentIdx << ": GIM_CheckIsSafeToFold(MIs[" 719 int64_t InsnID = MatchTable[CurrentIdx++]; 720 int64_t OpIdx = MatchTable[CurrentIdx++]; 721 int64_t OtherInsnID = MatchTable[CurrentIdx++]; 722 int64_t OtherOpIdx = MatchTable[CurrentIdx++]; 724 dbgs() << CurrentIdx << ": GIM_CheckIsSameOperand(MIs[" 738 dbgs() << CurrentIdx << ": GIM_Reject\n"); 744 int64_t OldInsnID = MatchTable[CurrentIdx++]; 745 uint64_t NewInsnID = MatchTable[CurrentIdx++]; 746 int64_t NewOpcode = MatchTable[CurrentIdx++]; 754 dbgs() << CurrentIdx << ": GIR_MutateOpcode(OutMIs[" 761 uint64_t NewInsnID = MatchTable[CurrentIdx++]; 762 int64_t Opcode = MatchTable[CurrentIdx++]; 769 dbgs() << CurrentIdx << ": GIR_BuildMI(OutMIs[" 775 int64_t NewInsnID = MatchTable[CurrentIdx++]; 776 int64_t OldInsnID = MatchTable[CurrentIdx++]; 777 int64_t OpIdx = MatchTable[CurrentIdx++]; 782 << CurrentIdx << ": GIR_Copy(OutMIs[" << NewInsnID 788 int64_t NewInsnID = MatchTable[CurrentIdx++]; 789 int64_t OldInsnID = MatchTable[CurrentIdx++]; 790 int64_t OpIdx = MatchTable[CurrentIdx++]; 791 int64_t ZeroReg = MatchTable[CurrentIdx++]; 799 dbgs() << CurrentIdx << ": GIR_CopyOrAddZeroReg(OutMIs[" 806 int64_t NewInsnID = MatchTable[CurrentIdx++]; 807 int64_t OldInsnID = MatchTable[CurrentIdx++]; 808 int64_t OpIdx = MatchTable[CurrentIdx++]; 809 int64_t SubRegIdx = MatchTable[CurrentIdx++]; 814 dbgs() << CurrentIdx << ": GIR_CopySubReg(OutMIs[" 821 int64_t InsnID = MatchTable[CurrentIdx++]; 822 int64_t RegNum = MatchTable[CurrentIdx++]; 826 dbgs() << CurrentIdx << ": GIR_AddImplicitDef(OutMIs[" 832 int64_t InsnID = MatchTable[CurrentIdx++]; 833 int64_t RegNum = MatchTable[CurrentIdx++]; 837 dbgs() << CurrentIdx << ": GIR_AddImplicitUse(OutMIs[" 843 int64_t InsnID = MatchTable[CurrentIdx++]; 844 int64_t RegNum = MatchTable[CurrentIdx++]; 845 uint64_t RegFlags = MatchTable[CurrentIdx++]; 850 dbgs() << CurrentIdx << ": GIR_AddRegister(OutMIs[" 856 int64_t InsnID = MatchTable[CurrentIdx++]; 857 int64_t TempRegID = MatchTable[CurrentIdx++]; 858 uint64_t TempRegFlags = MatchTable[CurrentIdx++]; 862 dbgs() << CurrentIdx << ": GIR_AddTempRegister(OutMIs[" 869 int64_t InsnID = MatchTable[CurrentIdx++]; 870 int64_t Imm = MatchTable[CurrentIdx++]; 874 dbgs() << CurrentIdx << ": GIR_AddImm(OutMIs[" << InsnID 880 int64_t InsnID = MatchTable[CurrentIdx++]; 881 int64_t RendererID = MatchTable[CurrentIdx++]; 886 dbgs() << CurrentIdx << ": GIR_ComplexRenderer(OutMIs[" 891 int64_t InsnID = MatchTable[CurrentIdx++]; 892 int64_t RendererID = MatchTable[CurrentIdx++]; 893 int64_t RenderOpID = MatchTable[CurrentIdx++]; 897 dbgs() << CurrentIdx 905 int64_t NewInsnID = MatchTable[CurrentIdx++]; 906 int64_t OldInsnID = MatchTable[CurrentIdx++]; 917 dbgs() << CurrentIdx << ": GIR_CopyConstantAsSImm(OutMIs[" 924 int64_t NewInsnID = MatchTable[CurrentIdx++]; 925 int64_t OldInsnID = MatchTable[CurrentIdx++]; 934 dbgs() << CurrentIdx << ": GIR_CopyFPConstantAsFPImm(OutMIs[" 940 int64_t InsnID = MatchTable[CurrentIdx++]; 941 int64_t OldInsnID = MatchTable[CurrentIdx++]; 942 int64_t RendererFnID = MatchTable[CurrentIdx++]; 945 dbgs() << CurrentIdx << ": GIR_CustomRenderer(OutMIs[" 953 int64_t InsnID = MatchTable[CurrentIdx++]; 954 int64_t OpIdx = MatchTable[CurrentIdx++]; 955 int64_t RCEnum = MatchTable[CurrentIdx++]; 960 dbgs() << CurrentIdx << ": GIR_ConstrainOperandRC(OutMIs[" 967 int64_t InsnID = MatchTable[CurrentIdx++]; 972 dbgs() << CurrentIdx 979 int64_t InsnID = MatchTable[CurrentIdx++]; 983 dbgs() << CurrentIdx << ": GIR_MergeMemOperands(OutMIs[" 986 while ((MergeInsnID = MatchTable[CurrentIdx++]) != 998 int64_t InsnID = MatchTable[CurrentIdx++]; 1003 dbgs() << CurrentIdx << ": GIR_EraseFromParent(MIs[" 1009 int64_t TempRegID = MatchTable[CurrentIdx++]; 1010 int64_t TypeID = MatchTable[CurrentIdx++]; 1015 dbgs() << CurrentIdx << ": TempRegs[" << TempRegID 1021 int64_t RuleID = MatchTable[CurrentIdx++]; 1026 << CurrentIdx << ": GIR_Coverage(" << RuleID << ")"); 1032 dbgs() << CurrentIdx << ": GIR_Done\n");