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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/CodeGen/GlobalISel/IRTranslator.cpp 754 MachineFunction *CurMF = FuncInfo.MF;
757 if (++BBI != FuncInfo.MF->end())
2243 FuncInfo.MF = MF;
lib/CodeGen/SelectionDAG/FastISel.cpp 857 FuncInfo.MF->getFrameInfo().setHasStackMap();
1007 TRI.getCallPreservedMask(*FuncInfo.MF, CC)));
1034 FuncInfo.MF->getFrameInfo().setHasPatchPoint();
1146 CLI.CallConv, *FuncInfo.MF, CLI.IsVarArg, Outs, CLI.RetTy->getContext());
1348 if (!FuncInfo.MF->getMMI().hasDebugInfo()) {
1450 if (!FuncInfo.MF->getMMI().hasDebugInfo()) {
1924 : FuncInfo(FuncInfo), MF(FuncInfo.MF), MRI(FuncInfo.MF->getRegInfo()),
1924 : FuncInfo(FuncInfo), MF(FuncInfo.MF), MRI(FuncInfo.MF->getRegInfo()),
1925 MFI(FuncInfo.MF->getFrameInfo()), MCP(*FuncInfo.MF->getConstantPool()),
1925 MFI(FuncInfo.MF->getFrameInfo()), MCP(*FuncInfo.MF->getConstantPool()),
1926 TM(FuncInfo.MF->getTarget()), DL(MF->getDataLayout()),
2024 TII.getRegClass(II, OpNum, &TRI, *FuncInfo.MF);
2433 return FuncInfo.MF->getMachineMemOperand(MachinePointerInfo(Ptr), Flags, Size,
lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp 84 MF = &mf;
85 TLI = MF->getSubtarget().getTargetLowering();
86 RegInfo = &MF->getRegInfo();
87 const TargetFrameLowering *TFI = MF->getSubtarget().getFrameLowering();
98 TLI->CanLowerReturn(CC, *MF, Fn->isVarArg(), Outs, Fn->getContext());
106 WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
126 WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
138 std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(Ty),
147 uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
154 FrameIndex = MF->getFrameInfo().CreateFixedObject(
156 MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
159 MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
175 MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
184 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
195 MF->getFrameInfo().setHasOpaqueSPAdjustment(true);
206 MF->getFrameInfo().setHasVAStart(true);
213 MF->getFrameInfo().setHasMustTailInVarArgFunc(true);
240 MF->setHasEHScopes(true);
241 MF->setHasEHFunclets(true);
242 MF->getFrameInfo().setHasOpaqueSPAdjustment(true);
255 MF->push_back(MBB);
282 ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
285 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
294 WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
317 WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
352 MF->getSubtarget().getTargetLowering()->getRegClassFor(VT, isDivergent));
363 const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
366 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
383 return CreateRegs(V->getType(), DA && !TLI->requiresUniformRegister(*MF, V) &&
417 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
520 MachineRegisterInfo &MRI = MF->getRegInfo();
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 2293 FuncInfo.MF->erase(SL->SwitchCases[i].ThisBB);
3996 assert(FuncInfo.MF->getFrameInfo().hasVarSizedObjects());
5432 bool IsInEntryBlock = FuncInfo.MBB == &FuncInfo.MF->front();
8745 FuncInfo.MF->getFrameInfo().setHasStackMap();
8896 FuncInfo.MF->getFrameInfo().setHasPatchPoint();
9533 MachineFrameInfo &MFI = FuncInfo->MF->getFrameInfo();
9542 RequiredAlignment = FuncInfo->MF->getDataLayout().getABITypeAlignment(
10024 if (++I == FuncInfo.MF->end())
10045 MachineFunction *CurMF = FuncInfo.MF;
10048 if (++BBI != FuncInfo.MF->end())
10389 LeftMBB = FuncInfo.MF->CreateMachineBasicBlock(W.MBB->getBasicBlock());
10390 FuncInfo.MF->insert(BBI, LeftMBB);
10405 RightMBB = FuncInfo.MF->CreateMachineBasicBlock(W.MBB->getBasicBlock());
10406 FuncInfo.MF->insert(BBI, RightMBB);
10473 FuncInfo.MF->CreateMachineBasicBlock(SwitchMBB->getBasicBlock());
10474 FuncInfo.MF->insert(BBI, PeeledSwitchMBB);
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 1294 MachineFunction *MF = FuncInfo->MF;
lib/CodeGen/SwitchLoweringUtils.cpp 231 MachineFunction *CurMF = FuncInfo.MF;
318 BitVector Dests(FuncInfo.MF->getNumBlockIDs());
367 BitVector Dests(FuncInfo.MF->getNumBlockIDs());
446 FuncInfo.MF->CreateMachineBasicBlock(SI->getParent());
lib/Target/AArch64/AArch64FastISel.cpp 296 &static_cast<const AArch64Subtarget &>(FuncInfo.MF->getSubtarget());
1131 MMO = FuncInfo.MF->getMachineMemOperand(
1132 MachinePointerInfo::getFixedStack(*FuncInfo.MF, FI, Offset), Flags,
2297 if (FuncInfo.MF->getFunction().hasFnAttribute(
3049 unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, RC);
3067 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context);
3141 MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
3142 MachinePointerInfo::getStack(*FuncInfo.MF, Addr.getOffset()),
3164 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context);
3312 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
3475 MachineFrameInfo &MFI = FuncInfo.MF->getFrameInfo();
3479 Register FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF));
3501 MachineFrameInfo &MFI = FuncInfo.MF->getFrameInfo();
3853 if (TLI.supportSplitCSR(FuncInfo.MF))
3866 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext());
lib/Target/AMDGPU/SIISelLowering.cpp10832 const MachineFunction * MF = FLI->MF;
lib/Target/ARM/ARMFastISel.cpp 127 &static_cast<const ARMSubtarget &>(funcInfo.MF->getSubtarget())),
129 TM(funcInfo.MF->getTarget()), TII(*Subtarget->getInstrInfo()),
131 AFI = funcInfo.MF->getInfo<ARMFunctionInfo>();
883 MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
884 MachinePointerInfo::getFixedStack(*FuncInfo.MF, FI, Offset), Flags,
1896 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context);
2046 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, RVLocs, *Context);
2101 if (TLI.supportSplitCSR(FuncInfo.MF))
2114 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext());
2218 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context);
2281 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
2326 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, RVLocs, *Context);
2425 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
2490 MachineFrameInfo &MFI = FuncInfo.MF->getFrameInfo();
2499 Register FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF));
3059 unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, RC);
3077 if (funcInfo.MF->getSubtarget<ARMSubtarget>().useFastISel())
lib/Target/Mips/MipsFastISel.cpp 257 : FastISel(funcInfo, libInfo), TM(funcInfo.MF->getTarget()),
258 Subtarget(&funcInfo.MF->getSubtarget<MipsSubtarget>()),
260 MFI = funcInfo.MF->getInfo<MipsFunctionInfo>();
1144 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context);
1267 MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
1268 MachinePointerInfo::getStack(*FuncInfo.MF, Addr.getOffset()),
1285 MipsCCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context);
1468 unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, Allocation[ArgNo].RC);
1571 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
1581 MIB.addSym(FuncInfo.MF->getContext().getOrCreateSymbol(
1705 MipsCCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs,
lib/Target/Mips/MipsISelLowering.cpp 544 static_cast<const MipsTargetMachine &>(funcInfo.MF->getTarget());
lib/Target/PowerPC/PPCFastISel.cpp 98 : FastISel(FuncInfo, LibInfo), TM(FuncInfo.MF->getTarget()),
99 PPCSubTarget(&FuncInfo.MF->getSubtarget<PPCSubtarget>()),
100 PPCFuncInfo(FuncInfo.MF->getInfo<PPCFunctionInfo>()),
535 MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
536 MachinePointerInfo::getFixedStack(*FuncInfo.MF, Addr.Base.FI,
681 MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
682 MachinePointerInfo::getFixedStack(*FuncInfo.MF, Addr.Base.FI,
1383 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, *Context);
1503 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context);
1585 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs, *Context);
1677 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
1691 if (TLI.supportSplitCSR(FuncInfo.MF))
1707 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, *Context);
2012 MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
2013 MachinePointerInfo::getConstantPool(*FuncInfo.MF),
2465 const PPCSubtarget &Subtarget = FuncInfo.MF->getSubtarget<PPCSubtarget>();
lib/Target/WebAssembly/WebAssemblyFastISel.cpp 198 Subtarget = &FuncInfo.MF->getSubtarget<WebAssemblySubtarget>();
lib/Target/X86/X86FastISel.cpp 63 Subtarget = &funcInfo.MF->getSubtarget<X86Subtarget>();
474 MIB->addMemOperand(*FuncInfo.MF, MMO);
651 MIB->addMemOperand(*FuncInfo.MF, MMO);
688 MIB->addMemOperand(*FuncInfo.MF, MMO);
745 AM.Base.Reg = getInstrInfo()->getGlobalBaseReg(FuncInfo.MF);
1148 FuncInfo.MF->getInfo<X86MachineFunctionInfo>();
1157 if (TLI.supportSplitCSR(FuncInfo.MF))
1194 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext());
2669 MachineFunction *MF = FuncInfo.MF;
3141 unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, RC);
3300 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, CLI.RetTy->getContext());
3420 MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
3421 MachinePointerInfo::getStack(*FuncInfo.MF, LocMemOffset),
3445 unsigned Base = getInstrInfo()->getGlobalBaseReg(FuncInfo.MF);
3521 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
3546 CCState CCRetInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs,
3781 PICBase = getInstrInfo()->getGlobalBaseReg(FuncInfo.MF);
3783 PICBase = getInstrInfo()->getGlobalBaseReg(FuncInfo.MF);
3799 MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
3800 MachinePointerInfo::getConstantPool(*FuncInfo.MF),
3802 MIB->addMemOperand(*FuncInfo.MF, MMO);
3943 *FuncInfo.MF, *MI, OpNo, AddrOps, FuncInfo.InsertPt, Size, Alignment,
3967 Result->addMemOperand(*FuncInfo.MF, createMachineMemOperandFor(LI));
3968 Result->cloneInstrSymbols(*FuncInfo.MF, *MI);