reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenDAGISel.inc

 7628 /* 16378*/            OPC_EmitInteger, MVT::i32, X86::sub_16bit,
19343 /* 38975*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
20699 /* 41968*/      OPC_EmitInteger, MVT::i32, X86::sub_16bit,
20723 /* 42032*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
20749 /* 42098*/      OPC_EmitInteger, MVT::i32, X86::sub_16bit,
39971 /* 83692*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
39976 /* 83710*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
50919 /*107552*/          OPC_EmitInteger, MVT::i32, X86::sub_16bit,
50946 /*107621*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
50957 /*107650*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
51024 /*107825*/      OPC_EmitInteger, MVT::i32, X86::sub_16bit,
51037 /*107858*/      OPC_EmitInteger, MVT::i32, X86::sub_16bit,
55041 /*116659*/          OPC_EmitInteger, MVT::i32, X86::sub_16bit,
55048 /*116673*/          OPC_EmitInteger, MVT::i32, X86::sub_16bit,
55265 /*117142*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
55292 /*117204*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
55310 /*117251*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
55513 /*117682*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
55934 /*118514*/          OPC_EmitInteger, MVT::i32, X86::sub_16bit,
55974 /*118611*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
56195 /*119024*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
56479 /*119596*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
56668 /*119976*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
58682 /*123681*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
58690 /*123701*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
58723 /*123785*/        OPC_EmitInteger, MVT::i32, X86::sub_16bit,
58754 /*123861*/      OPC_EmitInteger, MVT::i32, X86::sub_16bit,
58769 /*123904*/      OPC_EmitInteger, MVT::i32, X86::sub_16bit,
124105 /*255659*/              OPC_EmitInteger, MVT::i32, X86::sub_16bit,
126545 /*260202*/              OPC_EmitInteger, MVT::i32, X86::sub_16bit,
145238 /*297259*/              OPC_EmitInteger, MVT::i32, X86::sub_16bit,
147193 /*300812*/              OPC_EmitInteger, MVT::i32, X86::sub_16bit,
186974 /*377957*/              OPC_EmitInteger, MVT::i32, X86::sub_16bit,
187764 /*379388*/              OPC_EmitInteger, MVT::i32, X86::sub_16bit,
200036 /*404648*/          OPC_EmitInteger, MVT::i32, X86::sub_16bit,
200048 /*404679*/            OPC_EmitInteger, MVT::i32, X86::sub_16bit,
200059 /*404707*/            OPC_EmitInteger, MVT::i32, X86::sub_16bit,
200074 /*404746*/            OPC_EmitInteger, MVT::i32, X86::sub_16bit,
200085 /*404774*/            OPC_EmitInteger, MVT::i32, X86::sub_16bit,
229368 /*468140*/              OPC_EmitInteger, MVT::i32, X86::sub_16bit,
229391 /*468200*/              OPC_EmitInteger, MVT::i32, X86::sub_16bit,

gen/lib/Target/X86/X86GenFastISel.inc

 1999   return fastEmitInst_extractsubreg(MVT::i16, Op0, Op0IsKill, X86::sub_16bit);
 2015   return fastEmitInst_extractsubreg(MVT::i16, Op0, Op0IsKill, X86::sub_16bit);

gen/lib/Target/X86/X86GenRegisterInfo.inc

 8110     { X86::sub_8bit, X86::sub_8bit_hi, X86::sub_8bit_hi_phony, X86::sub_16bit, X86::sub_16bit_hi, 0, 0, 0, X86::sub_xmm, 0, },

lib/Target/X86/X86FastISel.cpp

 1566                                            X86::sub_16bit);
 1612                                            X86::sub_16bit);
 1961           .addReg(Zero32, 0, X86::sub_16bit);
 2643       unsigned RegIdx = X86::sub_16bit;
 3699                                         X86::sub_16bit);

lib/Target/X86/X86FlagsCopyLowering.cpp

  926     int SubRegIdx[] = {X86::NoSubRegister, X86::sub_8bit, X86::sub_16bit,

lib/Target/X86/X86ISelDAGToDAG.cpp

 4886                           CurDAG->getTargetConstant(X86::sub_16bit, dl,
 5066         SubRegOp = X86::sub_16bit;

lib/Target/X86/X86ISelLowering.cpp

31277       .addReg(NewCW, RegState::Kill, X86::sub_16bit);

lib/Target/X86/X86InstrInfo.cpp

  126       SubIdx = X86::sub_16bit;
  795   unsigned SubReg = Is8BitOp ? X86::sub_8bit : X86::sub_16bit;

lib/Target/X86/X86InstructionSelector.cpp

  207     SubIdx = X86::sub_16bit;
  748     SubIdx = X86::sub_16bit;
 1662             .addReg(Zero32, 0, X86::sub_16bit);

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 2293     unsigned SubRegImms[] = {X86::sub_8bit, X86::sub_16bit, X86::sub_32bit};