reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
16 extern const MCRegisterClass X86MCRegisterClasses[];
4230 RI->InitMCRegisterInfo(X86RegDesc, 282, RA, PC, X86MCRegisterClasses, 118, X86RegUnitRoots, 163, X86RegDiffLists, X86LaneMaskLists, X86RegStrings, X86RegClassStrings, X86SubRegIdxLists, 11,
lib/Target/X86/AsmParser/X86AsmParser.cpp1008 X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg) || 1009 X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg) || 1010 X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg))) { 1017 X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg) || 1018 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg) || 1019 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg) || 1020 X86MCRegisterClasses[X86::VR128XRegClassID].contains(IndexReg) || 1021 X86MCRegisterClasses[X86::VR256XRegClassID].contains(IndexReg) || 1022 X86MCRegisterClasses[X86::VR512RegClassID].contains(IndexReg))) { 1036 if (X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg) && 1044 X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg)) { 1050 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) && 1051 (X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg) || 1052 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg) || 1057 if (X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg) && 1058 (X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg) || 1059 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg) || 1064 if (X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg)) { 1065 if (X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg) || 1066 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg)) { 1127 X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo) || 1307 !X86MCRegisterClasses[RegClassID].contains(OrigReg)) { 1312 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(OrigReg)) 1314 else if (X86MCRegisterClasses[X86::GR32RegClassID].contains(OrigReg)) 1316 else if (X86MCRegisterClasses[X86::GR16RegClassID].contains(OrigReg)) 1883 if (!X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(RegNo)) 1922 !(X86MCRegisterClasses[X86::VR128XRegClassID].contains(IndexReg) || 1923 X86MCRegisterClasses[X86::VR256XRegClassID].contains(IndexReg) || 1924 X86MCRegisterClasses[X86::VR512RegClassID].contains(IndexReg)) && 1925 (X86MCRegisterClasses[X86::VR128XRegClassID].contains(BaseReg) || 1926 X86MCRegisterClasses[X86::VR256XRegClassID].contains(BaseReg) || 1927 X86MCRegisterClasses[X86::VR512RegClassID].contains(BaseReg))) 1931 X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg)) 2010 if (!X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(Reg)) 2116 X86MCRegisterClasses[X86::VK1RegClassID].contains(RegNo)) { 2295 if (X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg) && 2699 X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains( 2701 (X86MCRegisterClasses[X86::GR16RegClassID].contains(Op1.getReg()) || 2702 X86MCRegisterClasses[X86::GR32RegClassID].contains(Op1.getReg()))) { 3555 return X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(RegNo); 3758 if (!X86MCRegisterClasses[RegClassID].contains(RegNo)) { 3772 for (MCPhysReg Reg : X86MCRegisterClasses[RegClassID]) {lib/Target/X86/AsmParser/X86Operand.h
459 (X86MCRegisterClasses[X86::GR32RegClassID].contains(getReg()) || 460 X86MCRegisterClasses[X86::GR64RegClassID].contains(getReg())); 465 X86MCRegisterClasses[X86::VK1RegClassID].contains(getReg()); 470 X86MCRegisterClasses[X86::VK2RegClassID].contains(getReg()); 475 X86MCRegisterClasses[X86::VK4RegClassID].contains(getReg()); 480 X86MCRegisterClasses[X86::VK8RegClassID].contains(getReg()); 485 X86MCRegisterClasses[X86::VK16RegClassID].contains(getReg()); 504 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo))lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
75 X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg.getReg())) || 77 X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg.getReg()))) 213 X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) || 215 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg.getReg()))) 234 X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg.getReg())) || 236 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg.getReg())))lib/Target/X86/X86InsertPrefetch.cpp
85 X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) || 86 X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg)) && 88 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg) || 89 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg));