reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenDAGISel.inc
71084 /*149951*/          OPC_EmitInteger, MVT::i32, X86::RFP64RegClassID,
71220 /*150228*/          OPC_EmitInteger, MVT::i32, X86::RFP64RegClassID,
gen/lib/Target/X86/X86GenGlobalISel.inc
10919       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
10933       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
12742         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
12743         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
12744         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
13045         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
13046         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
13047         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
13348         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
13349         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
13350         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
13651         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
13652         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
13653         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
13908       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
13909       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
13956         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
14019       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
14090       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
14151       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
15027       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
15028       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
16695       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
16696       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
16746       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
16747       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
16853         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
16854         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
gen/lib/Target/X86/X86GenInstrInfo.inc
16747 static const MCOperandInfo OperandInfo74[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16747 static const MCOperandInfo OperandInfo74[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16768 static const MCOperandInfo OperandInfo95[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16768 static const MCOperandInfo OperandInfo95[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16768 static const MCOperandInfo OperandInfo95[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16769 static const MCOperandInfo OperandInfo96[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16769 static const MCOperandInfo OperandInfo96[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16811 static const MCOperandInfo OperandInfo138[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16811 static const MCOperandInfo OperandInfo138[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16811 static const MCOperandInfo OperandInfo138[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16821 static const MCOperandInfo OperandInfo148[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16821 static const MCOperandInfo OperandInfo148[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16821 static const MCOperandInfo OperandInfo148[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16868 static const MCOperandInfo OperandInfo195[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16871 static const MCOperandInfo OperandInfo198[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16911 static const MCOperandInfo OperandInfo238[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/X86/X86GenRegisterInfo.inc
 2653   { RFP64, RFP64Bits, 46, 7, sizeof(RFP64Bits), X86::RFP64RegClassID, 1, true },
 7040     &X86MCRegisterClasses[RFP64RegClassID],
lib/Target/X86/X86RegisterInfo.cpp
  164     case X86::RFP64RegClassID: