reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

gen/lib/Target/X86/X86GenRegisterInfo.inc

 4400   extern const TargetRegisterClass GR64_NOSPRegClass;

References

gen/lib/Target/X86/X86GenRegisterInfo.inc

 5752   &X86::GR64_NOSPRegClass,
 5792   &X86::GR64_NOSPRegClass,
 5808   &X86::GR64_NOSPRegClass,
 5845   &X86::GR64_NOSPRegClass,
 5871   &X86::GR64_NOSPRegClass,
 5896   &X86::GR64_NOSPRegClass,
 5923   &X86::GR64_NOSPRegClass,
 5948   &X86::GR64_NOSPRegClass,
 5990   &X86::GR64_NOSPRegClass,
 6000   &X86::GR64_NOSPRegClass,
 6011   &X86::GR64_NOSPRegClass,
 6037   &X86::GR64_NOSPRegClass,
 6047   &X86::GR64_NOSPRegClass,
 6079   &X86::GR64_NOSPRegClass,
 6092   &X86::GR64_NOSPRegClass,
 6125   &X86::GR64_NOSPRegClass,
 6157   &X86::GR64_NOSPRegClass,
 6175   &X86::GR64_NOSPRegClass,
 6203   &X86::GR64_NOSPRegClass,
 7772     &X86::GR64_NOSPRegClass,

lib/Target/X86/X86ISelLowering.cpp

31042     Register IReg64 = MRI->createVirtualRegister(&X86::GR64_NOSPRegClass);

lib/Target/X86/X86InstrInfo.cpp

  713       &X86::GR64_NOSPRegClass : &X86::GR32_NOSPRegClass;
  780   Register InRegLEA = RegInfo.createVirtualRegister(&X86::GR64_NOSPRegClass);
  845         InRegLEA2 = RegInfo.createVirtualRegister(&X86::GR64_NOSPRegClass);
  930                                            &X86::GR64_NOSPRegClass))
 6030       Subtarget.is64Bit() ? &X86::GR64_NOSPRegClass : &X86::GR32_NOSPRegClass);

lib/Target/X86/X86RegisterInfo.cpp

  202       return &X86::GR64_NOSPRegClass;

lib/Target/X86/X86SpeculativeLoadHardening.cpp

  414   PS.emplace(MF, &X86::GR64_NOSPRegClass);