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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 7156 case X86::EDI: OpKind = MCK_Reg34; break;
gen/lib/Target/X86/X86GenCallingConv.inc 198 X86::EDI, X86::ESI, X86::EDX, X86::ECX
707 X86::EBX, X86::EBP, X86::EDI, X86::ESI
834 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
1447 X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
1900 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
2363 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
3071 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
3641 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
3841 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
gen/lib/Target/X86/X86GenDAGISel.inc18623 /* 37520*/ OPC_EmitCopyToReg, 3, X86::EDI,
18631 /* 37534*/ OPC_EmitCopyToReg, 3, X86::EDI,
18702 /* 37650*/ OPC_EmitCopyToReg, 3, X86::EDI,
gen/lib/Target/X86/X86GenGlobalISel.inc10131 GIR_AddRegister, /*InsnID*/1, X86::EDI, /*AddRegisterRegFlags*/RegState::Define,
10177 GIR_AddRegister, /*InsnID*/1, X86::EDI, /*AddRegisterRegFlags*/RegState::Define,
gen/lib/Target/X86/X86GenInstrInfo.inc16586 static const MCPhysReg ImplicitList24[] = { X86::EDI, X86::ESI, X86::DF, 0 };
16587 static const MCPhysReg ImplicitList25[] = { X86::EDI, X86::ESI, X86::EFLAGS, 0 };
16604 static const MCPhysReg ImplicitList42[] = { X86::DX, X86::EDI, X86::DF, 0 };
16605 static const MCPhysReg ImplicitList43[] = { X86::EDI, 0 };
16622 static const MCPhysReg ImplicitList60[] = { X86::EDI, X86::ESI, 0 };
16637 static const MCPhysReg ImplicitList75[] = { X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, 0 };
16642 static const MCPhysReg ImplicitList80[] = { X86::ECX, X86::EDI, X86::ESI, 0 };
16644 static const MCPhysReg ImplicitList82[] = { X86::AL, X86::ECX, X86::EDI, 0 };
16645 static const MCPhysReg ImplicitList83[] = { X86::ECX, X86::EDI, 0 };
16648 static const MCPhysReg ImplicitList86[] = { X86::EAX, X86::ECX, X86::EDI, 0 };
16650 static const MCPhysReg ImplicitList88[] = { X86::AX, X86::ECX, X86::EDI, 0 };
16653 static const MCPhysReg ImplicitList91[] = { X86::AL, X86::EDI, X86::DF, 0 };
16654 static const MCPhysReg ImplicitList92[] = { X86::EDI, X86::EFLAGS, 0 };
16655 static const MCPhysReg ImplicitList93[] = { X86::EAX, X86::EDI, X86::DF, 0 };
16656 static const MCPhysReg ImplicitList94[] = { X86::RAX, X86::EDI, X86::DF, 0 };
16657 static const MCPhysReg ImplicitList95[] = { X86::AX, X86::EDI, X86::DF, 0 };
gen/lib/Target/X86/X86GenRegisterInfo.inc 1593 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP, X86::RBP,
1603 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP,
1613 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RBP,
1643 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1653 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1663 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::RBP,
1673 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP,
1693 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP,
1803 X86::EDI, X86::EBP,
1813 X86::ESI, X86::EDI,
1913 X86::EDI,
2796 { 7U, X86::EDI },
2841 { 7U, X86::EDI },
2963 { 7U, X86::EDI },
3008 { 7U, X86::EDI },
3050 { X86::EDI, -2U },
3200 { X86::EDI, 7U },
3350 { X86::EDI, 7U },
3500 { X86::EDI, -2U },
3650 { X86::EDI, 7U },
3800 { X86::EDI, 7U },
9998 static const MCPhysReg CSR_32_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0 };
10000 static const MCPhysReg CSR_32EHRet_SaveList[] = { X86::EAX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0 };
10002 static const MCPhysReg CSR_32_AllRegs_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, 0 };
10004 static const MCPhysReg CSR_32_AllRegs_AVX_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, 0 };
10006 static const MCPhysReg CSR_32_AllRegs_AVX512_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::K0, X86::K1, X86::K2, X86::K3, X86::K4, X86::K5, X86::K6, X86::K7, 0 };
10008 static const MCPhysReg CSR_32_AllRegs_SSE_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, 0 };
10010 static const MCPhysReg CSR_32_RegCall_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, 0 };
10012 static const MCPhysReg CSR_32_RegCall_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, 0 };
10056 static const MCPhysReg CSR_Win32_CFGuard_Check_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::ECX, 0 };
10058 static const MCPhysReg CSR_Win32_CFGuard_Check_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::ECX, 0 };
lib/Target/X86/AsmParser/X86AsmParser.cpp 1228 unsigned Basereg = is64BitMode() ? X86::RDI : (Parse32 ? X86::EDI : X86::DI);
1243 case X86::EDI:
1256 return IsSIReg ? X86::ESI : X86::EDI;
lib/Target/X86/AsmParser/X86Operand.h 397 (getMemBaseReg() == X86::RDI || getMemBaseReg() == X86::EDI ||
lib/Target/X86/Disassembler/X86Disassembler.cpp 270 static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
360 baseRegNo = insn.hasAdSize ? X86::EDI : X86::RDI;
362 baseRegNo = insn.hasAdSize ? X86::DI : X86::EDI;
365 baseRegNo = insn.hasAdSize ? X86::EDI : X86::DI;
507 ALL_REGS
552 ALL_SIB_BASES
567 EA_BASES_32BIT
645 ALL_EA_BASES
lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 505 case X86::EDI:
679 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp 1305 (siReg == X86::ESI && MI.getOperand(0).getReg() == X86::EDI) ||
1335 if ((!is32BitMode(STI) && siReg == X86::EDI) ||
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp 112 {codeview::RegisterId::EDI, X86::EDI},
612 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
640 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
677 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
713 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
714 return X86::EDI;
749 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp 299 case X86::EDI: OS << "$edi"; break;
lib/Target/X86/X86CallingConv.cpp 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI,
lib/Target/X86/X86FastISel.cpp 3118 X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
lib/Target/X86/X86FrameLowering.cpp 2259 return Primary ? X86::EBX : X86::EDI;
lib/Target/X86/X86ISelLowering.cpp30100 BuildMI(mallocMBB, DL, TII->get(X86::MOV32rr), X86::EDI)
30105 .addReg(X86::EDI, RegState::Implicit)
30326 case X86::EDI:
30347 case X86::EDI:
30377 AvailableRegs.append({X86::EAX, X86::ECX, X86::EDX, X86::EDI});
46067 return std::make_pair(X86::EDI, &X86::GR32_DIBPRegClass);
lib/Target/X86/X86RetpolineThunks.cpp 187 populateThunk(MF, X86::EDI);
lib/Target/X86/X86SelectionDAGInfo.cpp 57 X86::ECX, X86::EAX, X86::EDI};
158 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RDI : X86::EDI,
191 const unsigned DI = Use64BitRegs ? X86::RDI : X86::EDI;
303 X86::ECX, X86::ESI, X86::EDI};