|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 7153 case X86::ECX: OpKind = MCK_ECX; break;
gen/lib/Target/X86/X86GenCallingConv.inc 174 X86::ECX, X86::EDX, X86::R8D, X86::R9D
198 X86::EDI, X86::ESI, X86::EDX, X86::ECX
396 if (unsigned Reg = State.AllocateReg(X86::ECX)) {
406 X86::EAX, X86::EDX, X86::ECX
590 X86::ECX, X86::EDX
674 X86::ECX, X86::EDX
736 X86::ESI, X86::EBP, X86::EAX, X86::EDX, X86::ECX
834 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
1053 if (unsigned Reg = State.AllocateReg(X86::ECX)) {
1447 X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
1900 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
2109 if (unsigned Reg = State.AllocateReg(X86::ECX)) {
2244 X86::ECX, X86::EDX, X86::R8D, X86::R9D
2363 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
2700 X86::EAX, X86::EDX, X86::ECX
2969 X86::EAX, X86::EDX, X86::ECX
3071 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
3468 X86::EAX, X86::EDX, X86::ECX, X86::R8D
3641 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
3841 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
gen/lib/Target/X86/X86GenDAGISel.inc18547 /* 37401*/ OPC_EmitCopyToReg, 1, X86::ECX,
18663 /* 37588*/ OPC_EmitCopyToReg, 1, X86::ECX,
18785 /* 37778*/ OPC_EmitCopyToReg, 1, X86::ECX,
58451 /*123331*/ OPC_EmitCopyToReg, 1, X86::ECX,
58464 /*123355*/ OPC_EmitCopyToReg, 3, X86::ECX,
gen/lib/Target/X86/X86GenGlobalISel.inc10014 GIR_AddRegister, /*InsnID*/1, X86::ECX, /*AddRegisterRegFlags*/RegState::Define,
10084 GIR_AddRegister, /*InsnID*/1, X86::ECX, /*AddRegisterRegFlags*/RegState::Define,
10110 GIR_AddRegister, /*InsnID*/1, X86::ECX, /*AddRegisterRegFlags*/RegState::Define,
gen/lib/Target/X86/X86GenInstrInfo.inc16566 static const MCPhysReg ImplicitList4[] = { X86::EAX, X86::ECX, X86::EDX, 0 };
16590 static const MCPhysReg ImplicitList28[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, 0 };
16594 static const MCPhysReg ImplicitList32[] = { X86::EAX, X86::ECX, 0 };
16606 static const MCPhysReg ImplicitList44[] = { X86::RAX, X86::ECX, 0 };
16608 static const MCPhysReg ImplicitList46[] = { X86::ECX, 0 };
16619 static const MCPhysReg ImplicitList57[] = { X86::RAX, X86::ECX, X86::EDX, 0 };
16625 static const MCPhysReg ImplicitList63[] = { X86::ECX, X86::EAX, X86::EBX, 0 };
16626 static const MCPhysReg ImplicitList64[] = { X86::ECX, X86::EAX, 0 };
16632 static const MCPhysReg ImplicitList70[] = { X86::ECX, X86::EFLAGS, 0 };
16637 static const MCPhysReg ImplicitList75[] = { X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, 0 };
16641 static const MCPhysReg ImplicitList79[] = { X86::ECX, X86::DF, 0 };
16642 static const MCPhysReg ImplicitList80[] = { X86::ECX, X86::EDI, X86::ESI, 0 };
16644 static const MCPhysReg ImplicitList82[] = { X86::AL, X86::ECX, X86::EDI, 0 };
16645 static const MCPhysReg ImplicitList83[] = { X86::ECX, X86::EDI, 0 };
16648 static const MCPhysReg ImplicitList86[] = { X86::EAX, X86::ECX, X86::EDI, 0 };
16650 static const MCPhysReg ImplicitList88[] = { X86::AX, X86::ECX, X86::EDI, 0 };
16661 static const MCPhysReg ImplicitList99[] = { X86::EAX, X86::ECX, X86::EFLAGS, X86::DF, 0 };
16663 static const MCPhysReg ImplicitList101[] = { X86::EAX, X86::ECX, X86::EDX, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, X86::DF, 0 };
16670 static const MCPhysReg ImplicitList108[] = { X86::EDX, X86::EAX, X86::ECX, 0 };
gen/lib/Target/X86/X86GenRegisterInfo.inc 1593 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP, X86::RBP,
1603 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP,
1613 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RBP,
1643 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1653 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1663 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::RBP,
1673 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP,
1693 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP,
1723 X86::EAX, X86::ECX, X86::EDX, X86::EBX,
1733 X86::EAX, X86::ECX, X86::EDX, X86::ESP,
1743 X86::EAX, X86::ECX, X86::EDX,
1783 X86::ECX, X86::EBX,
1793 X86::EDX, X86::ECX,
1903 X86::ECX,
2790 { 1U, X86::ECX },
2835 { 1U, X86::ECX },
2957 { 1U, X86::ECX },
3002 { 1U, X86::ECX },
3049 { X86::ECX, -2U },
3199 { X86::ECX, 1U },
3349 { X86::ECX, 1U },
3499 { X86::ECX, -2U },
3649 { X86::ECX, 1U },
3799 { X86::ECX, 1U },
10002 static const MCPhysReg CSR_32_AllRegs_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, 0 };
10004 static const MCPhysReg CSR_32_AllRegs_AVX_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, 0 };
10006 static const MCPhysReg CSR_32_AllRegs_AVX512_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::K0, X86::K1, X86::K2, X86::K3, X86::K4, X86::K5, X86::K6, X86::K7, 0 };
10008 static const MCPhysReg CSR_32_AllRegs_SSE_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, 0 };
10056 static const MCPhysReg CSR_Win32_CFGuard_Check_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::ECX, 0 };
10058 static const MCPhysReg CSR_Win32_CFGuard_Check_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::ECX, 0 };
lib/Target/X86/Disassembler/X86Disassembler.cpp 270 static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
507 ALL_REGS
552 ALL_SIB_BASES
567 EA_BASES_32BIT
645 ALL_EA_BASES
lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 503 case X86::ECX:
679 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp 106 {codeview::RegisterId::ECX, X86::ECX},
622 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
634 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
671 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
707 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
708 return X86::ECX;
743 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX:
lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp 297 case X86::ECX: OS << "$ecx"; break;
lib/Target/X86/X86CallingConv.cpp 33 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI,
242 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX};
lib/Target/X86/X86ExpandPseudo.cpp 324 BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define);
326 BuildMI(MBB, MBBI, DL, TII->get(X86::PUSH32r)).addReg(X86::ECX);
lib/Target/X86/X86FastISel.cpp 1801 CReg = X86::ECX;
3118 X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
lib/Target/X86/X86FrameLowering.cpp 1079 Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;
2277 return Primary ? X86::EAX : X86::ECX;
2281 return Primary ? X86::ECX : X86::EAX;
lib/Target/X86/X86ISelDAGToDAG.cpp 4400 Chain = CurDAG->getCopyToReg(Chain, dl, X86::ECX, Node->getOperand(3),
lib/Target/X86/X86ISelLowering.cpp 4463 case X86::EAX: case X86::EDX: case X86::ECX:
23867 SDValue ecx = DAG.getCopyFromReg(Chain, DL, X86::ECX, MVT::i32, Glue);
24119 expandIntrinsicWChainHelper(Op.getNode(), dl, DAG, IntrData->Opc0, X86::ECX,
24321 unsigned StoreAddrReg = (PtrVT == MVT::i64) ? X86::RCX : X86::ECX;
24446 NestReg = X86::ECX;
28265 expandIntrinsicWChainHelper(N, dl, DAG, X86::RDPMC, X86::ECX, Subtarget,
28269 expandIntrinsicWChainHelper(N, dl, DAG, X86::XGETBV, X86::ECX, Subtarget,
28301 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX,
30320 case X86::ECX:
30341 case X86::ECX:
30377 AvailableRegs.append({X86::EAX, X86::ECX, X86::EDX, X86::EDI});
31393 RMBBI->definesRegister(X86::ECX) ||
46061 return std::make_pair(X86::ECX, &X86::GR32_CBRegClass);
lib/Target/X86/X86RetpolineThunks.cpp 183 populateThunk(MF, X86::ECX);
lib/Target/X86/X86SelectionDAGInfo.cpp 57 X86::ECX, X86::EAX, X86::EDI};
155 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RCX : X86::ECX,
190 const unsigned CX = Use64BitRegs ? X86::RCX : X86::ECX;
303 X86::ECX, X86::ESI, X86::EDI};
unittests/tools/llvm-exegesis/X86/TargetTest.cpp 169 const unsigned Reg = X86::ECX;