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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 7154 case X86::EBX: OpKind = MCK_EBX; break;
gen/lib/Target/X86/X86GenCallingConv.inc 707 X86::EBX, X86::EBP, X86::EDI, X86::ESI
gen/lib/Target/X86/X86GenDAGISel.inc18549 /* 37407*/ OPC_EmitCopyToReg, 3, X86::EBX,
gen/lib/Target/X86/X86GenGlobalISel.inc10078 GIR_AddRegister, /*InsnID*/3, X86::EBX, /*AddRegisterRegFlags*/RegState::Define,
gen/lib/Target/X86/X86GenInstrInfo.inc16567 static const MCPhysReg ImplicitList5[] = { X86::EAX, X86::EDX, X86::EBX, X86::EFLAGS, 0 };
16590 static const MCPhysReg ImplicitList28[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, 0 };
16625 static const MCPhysReg ImplicitList63[] = { X86::ECX, X86::EAX, X86::EBX, 0 };
16637 static const MCPhysReg ImplicitList75[] = { X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, 0 };
16669 static const MCPhysReg ImplicitList107[] = { X86::AL, X86::EBX, 0 };
gen/lib/Target/X86/X86GenRegisterInfo.inc 1593 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP, X86::RBP,
1603 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP,
1613 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RBP,
1643 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1653 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1663 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::RBP,
1673 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP,
1693 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP,
1723 X86::EAX, X86::ECX, X86::EDX, X86::EBX,
1773 X86::EBX, X86::ESI,
1783 X86::ECX, X86::EBX,
1853 X86::EBX,
2792 { 3U, X86::EBX },
2837 { 3U, X86::EBX },
2959 { 3U, X86::EBX },
3004 { 3U, X86::EBX },
3048 { X86::EBX, -2U },
3198 { X86::EBX, 3U },
3348 { X86::EBX, 3U },
3498 { X86::EBX, -2U },
3648 { X86::EBX, 3U },
3798 { X86::EBX, 3U },
9998 static const MCPhysReg CSR_32_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0 };
10000 static const MCPhysReg CSR_32EHRet_SaveList[] = { X86::EAX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0 };
10002 static const MCPhysReg CSR_32_AllRegs_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, 0 };
10004 static const MCPhysReg CSR_32_AllRegs_AVX_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, 0 };
10006 static const MCPhysReg CSR_32_AllRegs_AVX512_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::K0, X86::K1, X86::K2, X86::K3, X86::K4, X86::K5, X86::K6, X86::K7, 0 };
10008 static const MCPhysReg CSR_32_AllRegs_SSE_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, 0 };
10010 static const MCPhysReg CSR_32_RegCall_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, 0 };
10012 static const MCPhysReg CSR_32_RegCall_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, 0 };
10056 static const MCPhysReg CSR_Win32_CFGuard_Check_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::ECX, 0 };
10058 static const MCPhysReg CSR_Win32_CFGuard_Check_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::ECX, 0 };
lib/Target/X86/AsmParser/X86AsmParser.cpp 1770 unsigned RegNo = is64BitMode() ? X86::RBX : (Parse32 ? X86::EBX : X86::BX);
lib/Target/X86/Disassembler/X86Disassembler.cpp 270 static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
507 ALL_REGS
552 ALL_SIB_BASES
567 EA_BASES_32BIT
645 ALL_EA_BASES
lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 502 case X86::EBX:
679 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp 108 {codeview::RegisterId::EBX, X86::EBX},
624 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
636 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
673 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
709 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
710 return X86::EBX;
745 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX:
lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp 296 case X86::EBX: OS << "$ebx"; break;
lib/Target/X86/X86ExpandPseudo.cpp 354 Opcode == X86::LCMPXCHG8B_SAVE_EBX ? X86::EBX : X86::RBX;
lib/Target/X86/X86FastISel.cpp 3447 TII.get(TargetOpcode::COPY), X86::EBX).addReg(Base);
3525 MIB.addReg(X86::EBX, RegState::Implicit);
lib/Target/X86/X86FrameLowering.cpp 2259 return Primary ? X86::EBX : X86::EDI;
lib/Target/X86/X86ISelDAGToDAG.cpp 2535 AM.IndexReg = CurDAG->getRegister(X86::EBX, MVT::i32);
lib/Target/X86/X86ISelLowering.cpp 3860 unsigned(X86::EBX), DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(),
17971 SDValue Chain = DAG.getCopyToReg(DAG.getEntryNode(), dl, X86::EBX,
18004 SDValue Chain = DAG.getCopyToReg(DAG.getEntryNode(), dl, X86::EBX,
28315 (BasePtr == X86::RBX || BasePtr == X86::EBX)) {
28322 assert(((Regs64bit == (BasePtr == X86::RBX)) || BasePtr == X86::EBX) &&
28327 Regs64bit ? X86::RBX : X86::EBX,
28337 Regs64bit ? X86::RBX : X86::EBX, swapInL,
31392 RMBBI->definesRegister(X86::EBX) ||
31410 MI.getOpcode() == X86::LCMPXCHG8B_SAVE_EBX ? X86::EBX : X86::RBX;
46063 return std::make_pair(X86::EBX, &X86::GR32_BSIRegClass);
lib/Target/X86/X86MCInstLower.cpp 954 .addReg(X86::EBX)
960 .addReg(X86::EBX)
972 .addReg(X86::EBX)
lib/Target/X86/X86RegisterInfo.cpp 66 BasePtr = Use64BitReg ? X86::RBX : X86::EBX;