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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8292 { 834 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64 }, },
22517 { 16218 /* xorq */, X86::XOR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22884 { 820 /* clr */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64 }, },
36881 { 16192 /* xor */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
gen/lib/Target/X86/X86GenDAGISel.inc39060 /* 81761*/ OPC_MorphNodeTo2, TARGET_VAL(X86::XOR64rr), 0,
47944 /*100552*/ OPC_MorphNodeTo2, TARGET_VAL(X86::XOR64rr), 0,
gen/lib/Target/X86/X86GenFastISel.inc 8835 return fastEmitInst_rr(X86::XOR64rr, &X86::GR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 6351 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR64rr,
gen/lib/Target/X86/X86GenSubtargetInfo.inc22942 case X86::XOR64rr:
23120 case X86::XOR64rr:
lib/Target/X86/X86DomainReassignment.cpp 686 createReplacer(X86::XOR64rr, X86::KXORQrr);
lib/Target/X86/X86FrameLowering.cpp 649 BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg)
lib/Target/X86/X86ISelDAGToDAG.cpp 4593 case ISD::XOR: ROpc = X86::XOR64rr; MOpc = X86::XOR64rm; break;
lib/Target/X86/X86ISelLowering.cpp30438 unsigned XorRROpc = (PVT == MVT::i64) ? X86::XOR64rr : X86::XOR32rr;
30688 unsigned XorRROpc = (PVT == MVT::i64) ? X86::XOR64rr : X86::XOR32rr;
lib/Target/X86/X86InstrFoldTables.cpp 248 { X86::XOR64rr, X86::XOR64mr, 0 },
2974 { X86::XOR64rr, X86::XOR64rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3439 case X86::XOR8ri: case X86::XOR64rr: case X86::XOR32rr:
4010 MIB->getOpcode() == X86::XOR64_FP ? X86::XOR64rr : X86::XOR32rr;
7273 case X86::XOR64rr:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1336 case X86::XOR64rr: case X86::XOR64ri8: case X86::XOR64ri32: