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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8291 { 829 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32 }, },
22504 { 16201 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22883 { 820 /* clr */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32 }, },
36877 { 16192 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
gen/lib/Target/X86/X86GenDAGISel.inc39055 /* 81750*/ OPC_MorphNodeTo2, TARGET_VAL(X86::XOR32rr), 0,
47938 /*100540*/ OPC_MorphNodeTo2, TARGET_VAL(X86::XOR32rr), 0,
gen/lib/Target/X86/X86GenFastISel.inc 8829 return fastEmitInst_rr(X86::XOR32rr, &X86::GR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 6127 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR32rr,
gen/lib/Target/X86/X86GenSubtargetInfo.inc22941 case X86::XOR32rr:
23119 case X86::XOR32rr:
lib/Target/X86/X86DomainReassignment.cpp 685 createReplacer(X86::XOR32rr, X86::KXORDrr);
lib/Target/X86/X86ISelDAGToDAG.cpp 4583 case ISD::XOR: ROpc = X86::XOR32rr; MOpc = X86::XOR32rm; break;
lib/Target/X86/X86ISelLowering.cpp30438 unsigned XorRROpc = (PVT == MVT::i64) ? X86::XOR64rr : X86::XOR32rr;
30688 unsigned XorRROpc = (PVT == MVT::i64) ? X86::XOR64rr : X86::XOR32rr;
lib/Target/X86/X86InstrFoldTables.cpp 245 { X86::XOR32rr, X86::XOR32mr, 0 },
2973 { X86::XOR32rr, X86::XOR32rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3439 case X86::XOR8ri: case X86::XOR64rr: case X86::XOR32rr:
3913 BuildMI(MBB, MIB.getInstr(), DL, TII.get(X86::XOR32rr), Reg)
4010 MIB->getOpcode() == X86::XOR64_FP ? X86::XOR64rr : X86::XOR32rr;
4082 return Expand2AddrUndef(MIB, get(X86::XOR32rr));
4595 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(X86::XOR32rr), XReg)
4601 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(X86::XOR32rr), Reg)
7272 case X86::XOR32rr:
7645 case X86::XOR32rr: {
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1335 case X86::XOR32rr: case X86::XOR32ri: case X86::XOR32ri8:
unittests/tools/llvm-exegesis/X86/AssemblerTest.cpp 46 MCInstBuilder(XOR32rr).addReg(EAX).addReg(EAX).addReg(EAX),
unittests/tools/llvm-exegesis/X86/BenchmarkResultTest.cpp 66 ToDisk.Key.Instructions.push_back(MCInstBuilder(X86::XOR32rr)