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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc19312 { 14314 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33681 { 14314 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
gen/lib/Target/X86/X86GenDAGISel.inc47220 /* 98977*/ OPC_MorphNodeTo1, TARGET_VAL(X86::VPORQZ256rr), 0,
47240 /* 99014*/ OPC_MorphNodeTo1, TARGET_VAL(X86::VPORQZ256rr), 0,
47260 /* 99051*/ OPC_MorphNodeTo1, TARGET_VAL(X86::VPORQZ256rr), 0,
gen/lib/Target/X86/X86GenEVEX2VEXTables.inc 1117 { X86::VPORQZ256rr, X86::VPORYrr },
gen/lib/Target/X86/X86GenFastISel.inc 7267 return fastEmitInst_rr(X86::VPORQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7306 return fastEmitInst_rr(X86::VPORQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7387 return fastEmitInst_rr(X86::VPORQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 5205 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr,
5451 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr,
5521 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr,
lib/Target/X86/X86InstrFoldTables.cpp 2520 { X86::VPORQZ256rr, X86::VPORQZ256rm, 0 },
5375 { X86::VPORQZ256rr, X86::VPORQZ256rmb, TB_BCAST_Q },
lib/Target/X86/X86InstrInfo.cpp 6301 { X86::VORPSZ256rr, X86::VORPDZ256rr, X86::VPORQZ256rr, X86::VPORDZ256rr },
6532 { X86::VORPSYrr, X86::VORPDYrr, X86::VPORQZ256rr, X86::VPORDZ256rr },
6647 case X86::VPORQZ256rr: case X86::VPORQZ256rm:
6770 case X86::VPORQZ256rr: case X86::VPORQZ256rm:
7318 case X86::VPORQZ256rr:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 2101 : Is256Bit ? X86::VPORQZ256rr : X86::VPORQZrr;