|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc15363 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29731 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
gen/lib/Target/X86/X86GenDAGISel.inc35456 /* 73748*/ OPC_MorphNodeTo1, TARGET_VAL(X86::VMOVSSrr), 0,
35545 /* 73973*/ OPC_EmitNode1, TARGET_VAL(X86::VMOVSSrr), 0,
36470 /* 76146*/ OPC_MorphNodeTo1, TARGET_VAL(X86::VMOVSSrr), 0,
36559 /* 76371*/ OPC_EmitNode1, TARGET_VAL(X86::VMOVSSrr), 0,
238495 /*486767*/ OPC_MorphNodeTo1, TARGET_VAL(X86::VMOVSSrr), 0,
gen/lib/Target/X86/X86GenEVEX2VEXTables.inc 430 { X86::VMOVSSZrr, X86::VMOVSSrr },
gen/lib/Target/X86/X86GenFastISel.inc11078 return fastEmitInst_rr(X86::VMOVSSrr, &X86::VR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
lib/Target/X86/AsmParser/X86AsmParser.cpp 2919 case X86::VMOVSSrr: {
2931 case X86::VMOVSSrr: NewOpc = X86::VMOVSSrr_REV; break;
lib/Target/X86/MCTargetDesc/X86InstComments.cpp 1089 case X86::VMOVSSrr:
lib/Target/X86/X86InstrInfo.cpp 1584 case X86::VBLENDPSrri: Opc = X86::VMOVSSrr; Mask = 0x0F; break;
1652 case X86::VMOVSSrr:{
1661 case X86::VMOVSSrr: Opc = X86::VBLENDPSrri; Mask = 0x0E; break;
lib/Target/X86/X86MCInstLower.cpp 524 case X86::VMOVSSrr: {
531 case X86::VMOVSSrr: NewOpc = X86::VMOVSSrr_REV; break;