reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc

10436   { 7710 /* subq */, X86::SUB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25000   { 7684 /* sub */, X86::SUB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },

gen/lib/Target/X86/X86GenDAGISel.inc

39634 /* 82970*/        OPC_MorphNodeTo2, TARGET_VAL(X86::SUB64rr), 0,
44409 /* 92887*/          OPC_MorphNodeTo2, TARGET_VAL(X86::SUB64rr), 0,

gen/lib/Target/X86/X86GenFastISel.inc

 8161   return fastEmitInst_rr(X86::SUB64rr, &X86::GR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);

gen/lib/Target/X86/X86GenGlobalISel.inc

 1809         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB64rr,

gen/lib/Target/X86/X86GenSubtargetInfo.inc

22940   case X86::SUB64rr:
23118   case X86::SUB64rr:

lib/Target/X86/X86FlagsCopyLowering.cpp

  997     Sub = X86::SUB64rr;

lib/Target/X86/X86FrameLowering.cpp

  120   return isLP64 ? X86::SUB64rr : X86::SUB32rr;
  653   BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg)
  732   BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)

lib/Target/X86/X86ISelDAGToDAG.cpp

 4590       case ISD::SUB: ROpc = X86::SUB64rr; MOpc = X86::SUB64rm; break;

lib/Target/X86/X86ISelLowering.cpp

30073   BuildMI(BB, DL, TII->get(IsLP64 ? X86::SUB64rr:X86::SUB32rr), SPLimitVReg)
30729   unsigned SubRROpc = (PVT == MVT::i64) ? X86::SUB64rr : X86::SUB32rr;

lib/Target/X86/X86InstrFoldTables.cpp

  236   { X86::SUB64rr,     X86::SUB64mr,    0 },
 1518   { X86::SUB64rr,                  X86::SUB64rm,                  0 },

lib/Target/X86/X86InstrInfo.cpp

 3306   case X86::SUB64rr:
 3366   if (((FlagI.getOpcode() == X86::CMP64rr && OI.getOpcode() == X86::SUB64rr) ||
 3422   case X86::SUB8ri:    case X86::SUB64rr:  case X86::SUB32rr:
 3570   case X86::SUB64rr:
 3584     case X86::SUB64rr:   NewOpcode = X86::CMP64rr;   break;

lib/Target/X86/X86MacroFusion.cpp

  130   case X86::SUB64rr:

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 1332   case X86::SUB64rr:  case X86::SUB64ri8:  case X86::SUB64ri32:

lib/Target/X86/X86WinAllocaExpander.cpp

  257               TII->get(Is64BitAlloca ? X86::SUB64rr : X86::SUB32rr), StackPtr)