|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc10423 { 7693 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24996 { 7684 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
gen/lib/Target/X86/X86GenDAGISel.inc39628 /* 82958*/ OPC_MorphNodeTo2, TARGET_VAL(X86::SUB32rr), 0,
44403 /* 92875*/ OPC_MorphNodeTo2, TARGET_VAL(X86::SUB32rr), 0,
gen/lib/Target/X86/X86GenFastISel.inc 8155 return fastEmitInst_rr(X86::SUB32rr, &X86::GR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 1757 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB32rr,
gen/lib/Target/X86/X86GenSubtargetInfo.inc22939 case X86::SUB32rr:
23117 case X86::SUB32rr:
lib/Target/X86/X86FlagsCopyLowering.cpp 993 Sub = X86::SUB32rr;
lib/Target/X86/X86FrameLowering.cpp 120 return isLP64 ? X86::SUB64rr : X86::SUB32rr;
lib/Target/X86/X86ISelDAGToDAG.cpp 4580 case ISD::SUB: ROpc = X86::SUB32rr; MOpc = X86::SUB32rm; break;
lib/Target/X86/X86ISelLowering.cpp30073 BuildMI(BB, DL, TII->get(IsLP64 ? X86::SUB64rr:X86::SUB32rr), SPLimitVReg)
30729 unsigned SubRROpc = (PVT == MVT::i64) ? X86::SUB64rr : X86::SUB32rr;
lib/Target/X86/X86InstrFoldTables.cpp 233 { X86::SUB32rr, X86::SUB32mr, 0 },
1517 { X86::SUB32rr, X86::SUB32rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3307 case X86::SUB32rr:
3367 (FlagI.getOpcode() == X86::CMP32rr && OI.getOpcode() == X86::SUB32rr) ||
3422 case X86::SUB8ri: case X86::SUB64rr: case X86::SUB32rr:
3571 case X86::SUB32rr:
3585 case X86::SUB32rr: NewOpcode = X86::CMP32rr; break;
lib/Target/X86/X86MacroFusion.cpp 126 case X86::SUB32rr:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1331 case X86::SUB32rr: case X86::SUB32ri: case X86::SUB32ri8:
lib/Target/X86/X86WinAllocaExpander.cpp 257 TII->get(Is64BitAlloca ? X86::SUB64rr : X86::SUB32rr), StackPtr)