reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc

 9976   { 6584 /* pushl */, X86::PUSH32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
24534   { 6531 /* push */, X86::PUSH32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },

lib/Target/X86/X86CallFrameOptimization.cpp

  568         PushOpcode = Is64Bit ? X86::PUSH64r : X86::PUSH32r;

lib/Target/X86/X86ExpandPseudo.cpp

  326       BuildMI(MBB, MBBI, DL, TII->get(X86::PUSH32r)).addReg(X86::ECX);

lib/Target/X86/X86FrameLowering.cpp

  329           ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
 1110     BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
 1185          (MBBI->getOpcode() == X86::PUSH32r ||
 1256         BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
 2077   unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
 2435         BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))

lib/Target/X86/X86ISelLowering.cpp

30110     BuildMI(mallocMBB, DL, TII->get(X86::PUSH32r)).addReg(sizeVReg);
31238         MI.getOpcode() == X86::WRFLAGS32 ? X86::PUSH32r : X86::PUSH64r;

lib/Target/X86/X86InstrFoldTables.cpp

  325   { X86::PUSH32r,             X86::PUSH32rmm,           TB_FOLDED_LOAD },

lib/Target/X86/X86InstrInfo.cpp

  177   case X86::PUSH32r:
 4834        MI.getOpcode() == X86::PUSH16r || MI.getOpcode() == X86::PUSH32r ||

lib/Target/X86/X86WinAllocaExpander.cpp

  113   case X86::PUSH32r:
  220     BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
  234       BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))

tools/llvm-exegesis/lib/X86/Target.cpp

  120             Instr.Description->Opcode == X86::PUSH32r)