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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc18051 { 363, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #363 = ADD_Fp80m32
18052 { 364, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #364 = ADD_Fp80m64
18055 { 367, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #367 = ADD_FpI16m80
18058 { 370, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #370 = ADD_FpI32m80
18566 { 878, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #878 = DIVR_Fp80m32
18567 { 879, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #879 = DIVR_Fp80m64
18570 { 882, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #882 = DIVR_FpI16m80
18573 { 885, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #885 = DIVR_FpI32m80
18595 { 907, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #907 = DIV_Fp80m32
18596 { 908, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #908 = DIV_Fp80m64
18599 { 911, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #911 = DIV_FpI16m80
18602 { 914, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #914 = DIV_FpI32m80
19564 { 1876, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #1876 = MUL_Fp80m32
19565 { 1877, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #1877 = MUL_Fp80m64
19568 { 1880, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #1880 = MUL_FpI16m80
19571 { 1883, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #1883 = MUL_FpI32m80
20498 { 2810, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2810 = SUBR_Fp80m32
20499 { 2811, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2811 = SUBR_Fp80m64
20502 { 2814, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2814 = SUBR_FpI16m80
20505 { 2817, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2817 = SUBR_FpI32m80
20527 { 2839, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2839 = SUB_Fp80m32
20528 { 2840, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2840 = SUB_Fp80m64
20531 { 2843, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2843 = SUB_FpI16m80
20534 { 2846, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2846 = SUB_FpI32m80