|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc17962 { 274, 7, 1, 0, 18, 0|(1ULL<<MCID::MayLoad), 0x4c0000121ULL, ImplicitList1, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #274 = ADC32rm
17983 { 295, 7, 1, 0, 18, 0|(1ULL<<MCID::MayLoad), 0x3d80004821ULL, ImplicitList1, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #295 = ADCX32rm
18002 { 314, 7, 1, 0, 20, 0|(1ULL<<MCID::MayLoad), 0xc0000121ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #314 = ADD32rm
18064 { 376, 7, 1, 0, 18, 0|(1ULL<<MCID::MayLoad), 0x3d80005021ULL, ImplicitList1, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #376 = ADOX32rm
18095 { 407, 7, 1, 0, 20, 0|(1ULL<<MCID::MayLoad), 0x8c0000121ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #407 = AND32rm
18455 { 767, 7, 1, 0, 78, 0|(1ULL<<MCID::MayLoad), 0x3c400058a1ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #767 = CRC32r32m16
18456 { 768, 7, 1, 0, 78, 0|(1ULL<<MCID::MayLoad), 0x3c40005921ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #768 = CRC32r32m32
18457 { 769, 7, 1, 0, 78, 0|(1ULL<<MCID::MayLoad), 0x3c00005821ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #769 = CRC32r32m8
18749 { 1061, 7, 1, 0, 160, 0|(1ULL<<MCID::MayLoad), 0x2bc0002121ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #1061 = IMUL32rm
19084 { 1396, 7, 1, 0, 1002, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3041002121ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #1396 = LXADD32
19614 { 1926, 7, 1, 0, 20, 0|(1ULL<<MCID::MayLoad), 0x2c0000121ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #1926 = OR32rm
20250 { 2562, 7, 1, 0, 18, 0|(1ULL<<MCID::MayLoad), 0x6c0000121ULL, ImplicitList1, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #2562 = SBB32rm
20464 { 2776, 7, 1, 0, 20, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xac0000121ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #2776 = SUB32rm
32846 { 15158, 7, 1, 0, 766, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3040002121ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #15158 = XADD32rm
32859 { 15171, 7, 1, 0, 620, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x21c0000121ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #15171 = XCHG32rm
32890 { 15202, 7, 1, 0, 20, 0|(1ULL<<MCID::MayLoad), 0xcc0000121ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, // Inst #15202 = XOR32rm