|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc17948 { 260, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400800aaULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #260 = ADC16mi
17949 { 261, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c00200aaULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #261 = ADC16mi8
17957 { 269, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400c012aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #269 = ADC32mi
17958 { 270, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c002012aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #270 = ADC32mi8
17966 { 278, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x204011002aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #278 = ADC64mi32
17967 { 279, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c003002aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #279 = ADC64mi8
17975 { 287, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200002002aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #287 = ADC8mi
17976 { 288, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208002002aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #288 = ADC8mi8
17988 { 300, 6, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400800a8ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #300 = ADD16mi
17989 { 301, 6, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c00200a8ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #301 = ADD16mi8
17997 { 309, 6, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400c0128ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #309 = ADD32mi
17998 { 310, 6, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c0020128ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #310 = ADD32mi8
18006 { 318, 6, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2040110028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #318 = ADD64mi32
18007 { 319, 6, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c0030028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #319 = ADD64mi8
18015 { 327, 6, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2000020028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #327 = ADD8mi
18016 { 328, 6, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2080020028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #328 = ADD8mi8
18081 { 393, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400800acULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #393 = AND16mi
18082 { 394, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c00200acULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #394 = AND16mi8
18090 { 402, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400c012cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #402 = AND32mi
18091 { 403, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c002012cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #403 = AND32mi8
18099 { 411, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x204011002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #411 = AND64mi32
18100 { 412, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c003002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #412 = AND64mi8
18108 { 420, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200002002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #420 = AND8mi
18109 { 421, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208002002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #421 = AND8mi8
18225 { 537, 6, 0, 0, 54, 0|(1ULL<<MCID::MayLoad), 0x2e800220acULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #537 = BT16mi8
18229 { 541, 6, 0, 0, 54, 0|(1ULL<<MCID::MayLoad), 0x2e8002212cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #541 = BT32mi8
18233 { 545, 6, 0, 0, 54, 0|(1ULL<<MCID::MayLoad), 0x2e8003202cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #545 = BT64mi8
18237 { 549, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e800220afULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #549 = BTC16mi8
18241 { 553, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e8002212fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #553 = BTC32mi8
18245 { 557, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e8003202fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #557 = BTC64mi8
18249 { 561, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e800220aeULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #561 = BTR16mi8
18253 { 565, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e8002212eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #565 = BTR32mi8
18257 { 569, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e8003202eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #569 = BTR64mi8
18261 { 573, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e800220adULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #573 = BTS16mi8
18265 { 577, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e8002212dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #577 = BTS32mi8
18269 { 581, 6, 0, 0, 57, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2e8003202dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #581 = BTS64mi8
18376 { 688, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x20400800afULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #688 = CMP16mi
18377 { 689, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x20c00200afULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #689 = CMP16mi8
18385 { 697, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x20400c012fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #697 = CMP32mi
18386 { 698, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x20c002012fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #698 = CMP32mi8
18394 { 706, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x204011002fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #706 = CMP64mi32
18395 { 707, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x20c003002fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #707 = CMP64mi8
18403 { 715, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x200002002fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #715 = CMP8mi
18404 { 716, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x208002002fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #716 = CMP8mi8
18987 { 1299, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410800a8ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1299 = LOCK_ADD16mi
18988 { 1300, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c10200a8ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1300 = LOCK_ADD16mi8
18990 { 1302, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410c0128ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1302 = LOCK_ADD32mi
18991 { 1303, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c1020128ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1303 = LOCK_ADD32mi8
18993 { 1305, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2041110028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1305 = LOCK_ADD64mi32
18994 { 1306, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c1030028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1306 = LOCK_ADD64mi8
18996 { 1308, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2001020028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1308 = LOCK_ADD8mi
18998 { 1310, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410800acULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1310 = LOCK_AND16mi
18999 { 1311, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c10200acULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1311 = LOCK_AND16mi8
19001 { 1313, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410c012cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1313 = LOCK_AND32mi
19002 { 1314, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c102012cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1314 = LOCK_AND32mi8
19004 { 1316, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x204111002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1316 = LOCK_AND64mi32
19005 { 1317, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c103002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1317 = LOCK_AND64mi8
19007 { 1319, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200102002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1319 = LOCK_AND8mi
19017 { 1329, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410800a9ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1329 = LOCK_OR16mi
19018 { 1330, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c10200a9ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1330 = LOCK_OR16mi8
19020 { 1332, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410c0129ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1332 = LOCK_OR32mi
19021 { 1333, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c1020129ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1333 = LOCK_OR32mi8
19023 { 1335, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2041110029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1335 = LOCK_OR64mi32
19024 { 1336, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c1030029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1336 = LOCK_OR64mi8
19026 { 1338, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2001020029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1338 = LOCK_OR8mi
19029 { 1341, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410800adULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1341 = LOCK_SUB16mi
19030 { 1342, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c10200adULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1342 = LOCK_SUB16mi8
19032 { 1344, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410c012dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1344 = LOCK_SUB32mi
19033 { 1345, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c102012dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1345 = LOCK_SUB32mi8
19035 { 1347, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x204111002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1347 = LOCK_SUB64mi32
19036 { 1348, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c103002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1348 = LOCK_SUB64mi8
19038 { 1350, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200102002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1350 = LOCK_SUB8mi
19040 { 1352, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410800aeULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1352 = LOCK_XOR16mi
19041 { 1353, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c10200aeULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1353 = LOCK_XOR16mi8
19043 { 1355, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20410c012eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1355 = LOCK_XOR32mi
19044 { 1356, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c102012eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1356 = LOCK_XOR32mi8
19046 { 1358, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x204111002eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1358 = LOCK_XOR64mi32
19047 { 1359, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c103002eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1359 = LOCK_XOR64mi8
19049 { 1361, 6, 0, 0, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200102002eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1361 = LOCK_XOR8mi
19334 { 1646, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x31c00800a8ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr }, // Inst #1646 = MOV16mi
19353 { 1665, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x31c00c0128ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr }, // Inst #1665 = MOV32mi
19371 { 1683, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x31c0110028ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr }, // Inst #1683 = MOV64mi32
19390 { 1702, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x3180020028ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr }, // Inst #1702 = MOV8mi
19599 { 1911, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400800a9ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1911 = OR16mi
19600 { 1912, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c00200a9ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1912 = OR16mi8
19608 { 1920, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400c0129ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1920 = OR32mi
19609 { 1921, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c0020129ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1921 = OR32mi8
19610 { 1922, 6, 0, 0, 954, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20c1020129ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1922 = OR32mi8Locked
19618 { 1930, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2040110029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1930 = OR64mi32
19619 { 1931, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c0030029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1931 = OR64mi8
19627 { 1939, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2000020029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1939 = OR8mi
19628 { 1940, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2080020029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #1940 = OR8mi8
20033 { 2345, 6, 0, 0, 583, 0|(1ULL<<MCID::MayStore), 0x30400200aaULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2345 = RCL16mi
20039 { 2351, 6, 0, 0, 583, 0|(1ULL<<MCID::MayStore), 0x304002012aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2351 = RCL32mi
20045 { 2357, 6, 0, 0, 583, 0|(1ULL<<MCID::MayStore), 0x304003002aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2357 = RCL64mi
20051 { 2363, 6, 0, 0, 583, 0|(1ULL<<MCID::MayStore), 0x300002002aULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2363 = RCL8mi
20063 { 2375, 6, 0, 0, 583, 0|(1ULL<<MCID::MayStore), 0x30400200abULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2375 = RCR16mi
20069 { 2381, 6, 0, 0, 583, 0|(1ULL<<MCID::MayStore), 0x304002012bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2381 = RCR32mi
20075 { 2387, 6, 0, 0, 583, 0|(1ULL<<MCID::MayStore), 0x304003002bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2387 = RCR64mi
20081 { 2393, 6, 0, 0, 583, 0|(1ULL<<MCID::MayStore), 0x300002002bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2393 = RCR8mi
20134 { 2446, 6, 0, 0, 765, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x30400200a8ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2446 = ROL16mi
20140 { 2452, 6, 0, 0, 765, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3040020128ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2452 = ROL32mi
20146 { 2458, 6, 0, 0, 765, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3040030028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2458 = ROL64mi
20152 { 2464, 6, 0, 0, 765, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3000020028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2464 = ROL8mi
20158 { 2470, 6, 0, 0, 765, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x30400200a9ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2470 = ROR16mi
20164 { 2476, 6, 0, 0, 765, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3040020129ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2476 = ROR32mi
20170 { 2482, 6, 0, 0, 765, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3040030029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2482 = ROR64mi
20176 { 2488, 6, 0, 0, 765, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3000020029ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2488 = ROR8mi
20208 { 2520, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x30400200afULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2520 = SAR16mi
20214 { 2526, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x304002012fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2526 = SAR32mi
20220 { 2532, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x304003002fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2532 = SAR64mi
20226 { 2538, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x300002002fULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2538 = SAR8mi
20236 { 2548, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400800abULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2548 = SBB16mi
20237 { 2549, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c00200abULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2549 = SBB16mi8
20245 { 2557, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400c012bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2557 = SBB32mi
20246 { 2558, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c002012bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2558 = SBB32mi8
20254 { 2566, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x204011002bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2566 = SBB64mi32
20255 { 2567, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c003002bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2567 = SBB64mi8
20263 { 2575, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200002002bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2575 = SBB8mi
20264 { 2576, 6, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208002002bULL, ImplicitList1, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2576 = SBB8mi8
20300 { 2612, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x30400200acULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2612 = SHL16mi
20306 { 2618, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x304002012cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2618 = SHL32mi
20312 { 2624, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x304003002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2624 = SHL64mi
20318 { 2630, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x300002002cULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2630 = SHL8mi
20340 { 2652, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x30400200adULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2652 = SHR16mi
20346 { 2658, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x304002012dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2658 = SHR32mi
20352 { 2664, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x304003002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2664 = SHR64mi
20358 { 2670, 6, 0, 0, 585, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x300002002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2670 = SHR8mi
20450 { 2762, 6, 0, 0, 944, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400800adULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2762 = SUB16mi
20451 { 2763, 6, 0, 0, 944, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c00200adULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2763 = SUB16mi8
20459 { 2771, 6, 0, 0, 944, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400c012dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2771 = SUB32mi
20460 { 2772, 6, 0, 0, 944, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c002012dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2772 = SUB32mi8
20468 { 2780, 6, 0, 0, 944, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x204011002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2780 = SUB64mi32
20469 { 2781, 6, 0, 0, 944, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c003002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2781 = SUB64mi8
20477 { 2789, 6, 0, 0, 944, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200002002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2789 = SUB8mi
20478 { 2790, 6, 0, 0, 944, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208002002dULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2790 = SUB8mi8
20566 { 2878, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3dc00800a8ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2878 = TEST16mi
20571 { 2883, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3dc00c0128ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2883 = TEST32mi
20576 { 2888, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3dc0110028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2888 = TEST64mi32
20581 { 2893, 6, 0, 0, 41, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3d80020028ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #2893 = TEST8mi
32876 { 15188, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400800aeULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #15188 = XOR16mi
32877 { 15189, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c00200aeULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #15189 = XOR16mi8
32885 { 15197, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20400c012eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #15197 = XOR32mi
32886 { 15198, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c002012eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #15198 = XOR32mi8
32894 { 15206, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x204011002eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #15206 = XOR64mi32
32895 { 15207, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20c003002eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #15207 = XOR64mi8
32903 { 15215, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200002002eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #15215 = XOR8mi
32904 { 15216, 6, 0, 0, 954, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208002002eULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, // Inst #15216 = XOR8mi8